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verilog
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k0rrluna
0f57860554
basic alu & simple fixes
2024-12-15 03:51:29 +03:00
gowin
xorGate
2024-12-09 22:57:42 +03:00
iverilog
lab3
2024-12-12 01:05:57 +03:00
project
basic alu & simple fixes
2024-12-15 03:51:29 +03:00
tests
rearrangement
2024-12-01 02:01:08 +03:00
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2
MiB
Languages
Verilog
99.2%
Shell
0.5%
Coq
0.3%