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verilog

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k0rrluna 2024-07-09 20:53:40 +03:00
parent 60e4f65988
commit 610e059b8a
20 changed files with 809 additions and 0 deletions
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21
labs/lab6/bibp.v Normal file
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module bibp #(parameter UZUNLUK = 8)(
input [UZUNLUK + 2:0] buyruk,
output [UZUNLUK:0] sonuc
);
localparam halfUZUNLUK = UZUNLUK/2;
localparam [halfUZUNLUK - 1 : 0] v1 = buyruk[UZUNLUK - 1: halfUZUNLUK];
localparam [halfUZUNLUK - 1: 0] v2 = buyruk[halfUZUNLUK - 1 : 0];
always@(*) begin
case(buyruk[UZUNLUK + 2: UZUNLUK -1])
3'b000: sonuc = v1 + v2;
3'b001: sonuc = v1 - v2;
3'b010: sonuc = v1 & v2;
3'b011: sonuc = v1 | v2;
3'b100: sonuc = v1 ^ v2;
default: sonuc = v1 + v2;
endcase
end
endmodule

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labs/lab6/bibpTB.v Normal file
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module bibpTB();
parameter UZUNLUK = 8;
reg [UZUNLUK+2:0] buyruk;
wire [UZUNLUK/2:0] sonuc;
bibp uut(buyruk, sonuc);
initial begin
$dumpfile("vbibp.vcd");
$dumpvars;
buyruk = 11'b000_0101_0101; #10;
$finish;
end
endmodule

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tests/obj_dir/Vtest2.cpp Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Model implementation (design independent parts)
#include "Vtest2.h"
#include "Vtest2__Syms.h"
//============================================================
// Constructors
Vtest2::Vtest2(VerilatedContext* _vcontextp__, const char* _vcname__)
: VerilatedModel{*_vcontextp__}
, vlSymsp{new Vtest2__Syms(contextp(), _vcname__, this)}
, rootp{&(vlSymsp->TOP)}
{
// Register model with the context
contextp()->addModel(this);
}
Vtest2::Vtest2(const char* _vcname__)
: Vtest2(Verilated::threadContextp(), _vcname__)
{
}
//============================================================
// Destructor
Vtest2::~Vtest2() {
delete vlSymsp;
}
//============================================================
// Evaluation function
#ifdef VL_DEBUG
void Vtest2___024root___eval_debug_assertions(Vtest2___024root* vlSelf);
#endif // VL_DEBUG
void Vtest2___024root___eval_static(Vtest2___024root* vlSelf);
void Vtest2___024root___eval_initial(Vtest2___024root* vlSelf);
void Vtest2___024root___eval_settle(Vtest2___024root* vlSelf);
void Vtest2___024root___eval(Vtest2___024root* vlSelf);
void Vtest2::eval_step() {
VL_DEBUG_IF(VL_DBG_MSGF("+++++TOP Evaluate Vtest2::eval_step\n"); );
#ifdef VL_DEBUG
// Debug assertions
Vtest2___024root___eval_debug_assertions(&(vlSymsp->TOP));
#endif // VL_DEBUG
if (VL_UNLIKELY(!vlSymsp->__Vm_didInit)) {
vlSymsp->__Vm_didInit = true;
VL_DEBUG_IF(VL_DBG_MSGF("+ Initial\n"););
Vtest2___024root___eval_static(&(vlSymsp->TOP));
Vtest2___024root___eval_initial(&(vlSymsp->TOP));
Vtest2___024root___eval_settle(&(vlSymsp->TOP));
}
// MTask 0 start
VL_DEBUG_IF(VL_DBG_MSGF("MTask0 starting\n"););
Verilated::mtaskId(0);
VL_DEBUG_IF(VL_DBG_MSGF("+ Eval\n"););
Vtest2___024root___eval(&(vlSymsp->TOP));
// Evaluate cleanup
Verilated::endOfThreadMTask(vlSymsp->__Vm_evalMsgQp);
Verilated::endOfEval(vlSymsp->__Vm_evalMsgQp);
}
//============================================================
// Events and timing
bool Vtest2::eventsPending() { return !vlSymsp->TOP.__VdlySched.empty(); }
uint64_t Vtest2::nextTimeSlot() { return vlSymsp->TOP.__VdlySched.nextTimeSlot(); }
//============================================================
// Utilities
const char* Vtest2::name() const {
return vlSymsp->name();
}
//============================================================
// Invoke final blocks
void Vtest2___024root___eval_final(Vtest2___024root* vlSelf);
VL_ATTR_COLD void Vtest2::final() {
Vtest2___024root___eval_final(&(vlSymsp->TOP));
}
//============================================================
// Implementations of abstract methods from VerilatedModel
const char* Vtest2::hierName() const { return vlSymsp->name(); }
const char* Vtest2::modelName() const { return "Vtest2"; }
unsigned Vtest2::threads() const { return 1; }

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tests/obj_dir/Vtest2.h Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Primary model header
//
// This header should be included by all source files instantiating the design.
// The class here is then constructed to instantiate the design.
// See the Verilator manual for examples.
#ifndef VERILATED_VTEST2_H_
#define VERILATED_VTEST2_H_ // guard
#include "verilated.h"
class Vtest2__Syms;
class Vtest2___024root;
// This class is the main interface to the Verilated model
class Vtest2 VL_NOT_FINAL : public VerilatedModel {
private:
// Symbol table holding complete model state (owned by this class)
Vtest2__Syms* const vlSymsp;
public:
// PORTS
// The application code writes and reads these signals to
// propagate new values into/out from the Verilated model.
// CELLS
// Public to allow access to /* verilator public */ items.
// Otherwise the application code can consider these internals.
// Root instance pointer to allow access to model internals,
// including inlined /* verilator public_flat_* */ items.
Vtest2___024root* const rootp;
// CONSTRUCTORS
/// Construct the model; called by application code
/// If contextp is null, then the model will use the default global context
/// If name is "", then makes a wrapper with a
/// single model invisible with respect to DPI scope names.
explicit Vtest2(VerilatedContext* contextp, const char* name = "TOP");
explicit Vtest2(const char* name = "TOP");
/// Destroy the model; called (often implicitly) by application code
virtual ~Vtest2();
private:
VL_UNCOPYABLE(Vtest2); ///< Copying not allowed
public:
// API METHODS
/// Evaluate the model. Application must call when inputs change.
void eval() { eval_step(); }
/// Evaluate when calling multiple units/models per time step.
void eval_step();
/// Evaluate at end of a timestep for tracing, when using eval_step().
/// Application must call after all eval() and before time changes.
void eval_end_step() {}
/// Simulation complete, run final blocks. Application must call on completion.
void final();
/// Are there scheduled events to handle?
bool eventsPending();
/// Returns time at next time slot. Aborts if !eventsPending()
uint64_t nextTimeSlot();
/// Retrieve name of this model instance (as passed to constructor).
const char* name() const;
// Abstract methods from VerilatedModel
const char* hierName() const override final;
const char* modelName() const override final;
unsigned threads() const override final;
} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
#endif // guard

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# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Makefile for building Verilated archive or executable
#
# Execute this makefile from the object directory:
# make -f Vtest2.mk
default: Vtest2
### Constants...
# Perl executable (from $PERL)
PERL = perl
# Path to Verilator kit (from $VERILATOR_ROOT)
VERILATOR_ROOT = /usr/share/verilator
# SystemC include directory with systemc.h (from $SYSTEMC_INCLUDE)
SYSTEMC_INCLUDE ?=
# SystemC library directory with libsystemc.a (from $SYSTEMC_LIBDIR)
SYSTEMC_LIBDIR ?=
### Switches...
# C++ code coverage 0/1 (from --prof-c)
VM_PROFC = 0
# SystemC output mode? 0/1 (from --sc)
VM_SC = 0
# Legacy or SystemC output mode? 0/1 (from --sc)
VM_SP_OR_SC = $(VM_SC)
# Deprecated
VM_PCLI = 1
# Deprecated: SystemC architecture to find link library path (from $SYSTEMC_ARCH)
VM_SC_TARGET_ARCH = linux
### Vars...
# Design prefix (from --prefix)
VM_PREFIX = Vtest2
# Module prefix (from --prefix)
VM_MODPREFIX = Vtest2
# User CFLAGS (from -CFLAGS on Verilator command line)
VM_USER_CFLAGS = \
-DVL_TIME_CONTEXT \
# User LDLIBS (from -LDFLAGS on Verilator command line)
VM_USER_LDLIBS = \
# User .cpp files (from .cpp's on Verilator command line)
VM_USER_CLASSES = \
# User .cpp directories (from .cpp's on Verilator command line)
VM_USER_DIR = \
### Default rules...
# Include list of all generated classes
include Vtest2_classes.mk
# Include global rules
include $(VERILATOR_ROOT)/include/verilated.mk
### Executable rules... (from --exe)
VPATH += $(VM_USER_DIR)
### Link rules... (from --exe)
Vtest2: $(VK_USER_OBJS) $(VK_GLOBAL_OBJS) $(VM_PREFIX)__ALL.a $(VM_HIER_LIBS)
$(LINK) $(LDFLAGS) $^ $(LOADLIBES) $(LDLIBS) $(LIBS) $(SC_LIBS) -o $@
# Verilated -*- Makefile -*-

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tests/obj_dir/Vtest2__Syms.cpp Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "Vtest2__Syms.h"
#include "Vtest2.h"
#include "Vtest2___024root.h"
// FUNCTIONS
Vtest2__Syms::~Vtest2__Syms()
{
}
Vtest2__Syms::Vtest2__Syms(VerilatedContext* contextp, const char* namep, Vtest2* modelp)
: VerilatedSyms{contextp}
// Setup internal state of the Syms class
, __Vm_modelp{modelp}
// Setup module instances
, TOP{this, namep}
{
// Configure time unit / time precision
_vm_contextp__->timeunit(-12);
_vm_contextp__->timeprecision(-12);
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOP.__Vconfigure(true);
}

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tests/obj_dir/Vtest2__Syms.h Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table internal header
//
// Internal details; most calling programs do not need this header,
// unless using verilator public meta comments.
#ifndef VERILATED_VTEST2__SYMS_H_
#define VERILATED_VTEST2__SYMS_H_ // guard
#include "verilated.h"
// INCLUDE MODEL CLASS
#include "Vtest2.h"
// INCLUDE MODULE CLASSES
#include "Vtest2___024root.h"
// SYMS CLASS (contains all model state)
class Vtest2__Syms final : public VerilatedSyms {
public:
// INTERNAL STATE
Vtest2* const __Vm_modelp;
bool __Vm_didInit = false;
// MODULE INSTANCE STATE
Vtest2___024root TOP;
// CONSTRUCTORS
Vtest2__Syms(VerilatedContext* contextp, const char* namep, Vtest2* modelp);
~Vtest2__Syms();
// METHODS
const char* name() { return TOP.name(); }
} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
#endif // guard

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tests/obj_dir/Vtest2___024root.h Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design internal header
// See Vtest2.h for the primary calling header
#ifndef VERILATED_VTEST2___024ROOT_H_
#define VERILATED_VTEST2___024ROOT_H_ // guard
#include "verilated.h"
#include "verilated_timing.h"
class Vtest2__Syms;
class Vtest2___024root final : public VerilatedModule {
public:
// DESIGN SPECIFIC STATE
CData/*0:0*/ __VactContinue;
IData/*31:0*/ __VactIterCount;
VlDelayScheduler __VdlySched;
VlTriggerVec<1> __VactTriggered;
VlTriggerVec<1> __VnbaTriggered;
// INTERNAL VARIABLES
Vtest2__Syms* const vlSymsp;
// CONSTRUCTORS
Vtest2___024root(Vtest2__Syms* symsp, const char* v__name);
~Vtest2___024root();
VL_UNCOPYABLE(Vtest2___024root);
// INTERNAL METHODS
void __Vconfigure(bool first);
} VL_ATTR_ALIGNED(VL_CACHE_LINE_BYTES);
#endif // guard

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tests/obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0.cpp Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vtest2.h for the primary calling header
#include "verilated.h"
#include "Vtest2___024root.h"
VlCoroutine Vtest2___024root___eval_initial__TOP__0(Vtest2___024root* vlSelf);
void Vtest2___024root___eval_initial(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_initial\n"); );
// Body
Vtest2___024root___eval_initial__TOP__0(vlSelf);
}
void Vtest2___024root___eval_act(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_act\n"); );
}
void Vtest2___024root___eval_nba(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_nba\n"); );
}
void Vtest2___024root___eval_triggers__act(Vtest2___024root* vlSelf);
#ifdef VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___dump_triggers__act(Vtest2___024root* vlSelf);
#endif // VL_DEBUG
void Vtest2___024root___timing_resume(Vtest2___024root* vlSelf);
#ifdef VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___dump_triggers__nba(Vtest2___024root* vlSelf);
#endif // VL_DEBUG
void Vtest2___024root___eval(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval\n"); );
// Init
VlTriggerVec<1> __VpreTriggered;
IData/*31:0*/ __VnbaIterCount;
CData/*0:0*/ __VnbaContinue;
// Body
__VnbaIterCount = 0U;
__VnbaContinue = 1U;
while (__VnbaContinue) {
__VnbaContinue = 0U;
vlSelf->__VnbaTriggered.clear();
vlSelf->__VactIterCount = 0U;
vlSelf->__VactContinue = 1U;
while (vlSelf->__VactContinue) {
vlSelf->__VactContinue = 0U;
Vtest2___024root___eval_triggers__act(vlSelf);
if (vlSelf->__VactTriggered.any()) {
vlSelf->__VactContinue = 1U;
if (VL_UNLIKELY((0x64U < vlSelf->__VactIterCount))) {
#ifdef VL_DEBUG
Vtest2___024root___dump_triggers__act(vlSelf);
#endif
VL_FATAL_MT("test2Tb.v", 1, "", "Active region did not converge.");
}
vlSelf->__VactIterCount = ((IData)(1U)
+ vlSelf->__VactIterCount);
__VpreTriggered.andNot(vlSelf->__VactTriggered, vlSelf->__VnbaTriggered);
vlSelf->__VnbaTriggered.set(vlSelf->__VactTriggered);
Vtest2___024root___timing_resume(vlSelf);
Vtest2___024root___eval_act(vlSelf);
}
}
if (vlSelf->__VnbaTriggered.any()) {
__VnbaContinue = 1U;
if (VL_UNLIKELY((0x64U < __VnbaIterCount))) {
#ifdef VL_DEBUG
Vtest2___024root___dump_triggers__nba(vlSelf);
#endif
VL_FATAL_MT("test2Tb.v", 1, "", "NBA region did not converge.");
}
__VnbaIterCount = ((IData)(1U) + __VnbaIterCount);
Vtest2___024root___eval_nba(vlSelf);
}
}
}
void Vtest2___024root___timing_resume(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___timing_resume\n"); );
// Body
if (vlSelf->__VactTriggered.at(0U)) {
vlSelf->__VdlySched.resume();
}
}
#ifdef VL_DEBUG
void Vtest2___024root___eval_debug_assertions(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_debug_assertions\n"); );
}
#endif // VL_DEBUG

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tests/obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0__Slow.cpp Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vtest2.h for the primary calling header
#include "verilated.h"
#include "Vtest2___024root.h"
VL_ATTR_COLD void Vtest2___024root___eval_static(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_static\n"); );
}
VL_ATTR_COLD void Vtest2___024root___eval_final(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_final\n"); );
}
VL_ATTR_COLD void Vtest2___024root___eval_settle(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_settle\n"); );
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___dump_triggers__act(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___dump_triggers__act\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VactTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
if (vlSelf->__VactTriggered.at(0U)) {
VL_DBG_MSGF(" 'act' region trigger index 0 is active: @([true] __VdlySched.awaitingCurrentTime())\n");
}
}
#endif // VL_DEBUG
#ifdef VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___dump_triggers__nba(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___dump_triggers__nba\n"); );
// Body
if ((1U & (~ (IData)(vlSelf->__VnbaTriggered.any())))) {
VL_DBG_MSGF(" No triggers active\n");
}
if (vlSelf->__VnbaTriggered.at(0U)) {
VL_DBG_MSGF(" 'nba' region trigger index 0 is active: @([true] __VdlySched.awaitingCurrentTime())\n");
}
}
#endif // VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___ctor_var_reset(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___ctor_var_reset\n"); );
// Body
}

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tests/obj_dir/Vtest2___024root__DepSet_hef21559d__0.cpp Normal file
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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vtest2.h for the primary calling header
#include "verilated.h"
#include "Vtest2__Syms.h"
#include "Vtest2___024root.h"
VL_INLINE_OPT VlCoroutine Vtest2___024root___eval_initial__TOP__0(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_initial__TOP__0\n"); );
// Init
VlWide<3>/*95:0*/ __Vtemp_h8200ba1e__0;
// Body
__Vtemp_h8200ba1e__0[0U] = 0x2e766364U;
__Vtemp_h8200ba1e__0[1U] = 0x73743276U;
__Vtemp_h8200ba1e__0[2U] = 0x7465U;
vlSymsp->_vm_contextp__->dumpfile(VL_CVT_PACK_STR_NW(3, __Vtemp_h8200ba1e__0));
VL_PRINTF_MT("-Info: test2Tb.v:10: $dumpvar ignored, as Verilated without --trace\n");
VL_WRITEF("Success!\n");
co_await vlSelf->__VdlySched.delay(0xaU, "test2Tb.v",
12);
VL_FINISH_MT("test2Tb.v", 13, "");
}
#ifdef VL_DEBUG
VL_ATTR_COLD void Vtest2___024root___dump_triggers__act(Vtest2___024root* vlSelf);
#endif // VL_DEBUG
void Vtest2___024root___eval_triggers__act(Vtest2___024root* vlSelf) {
if (false && vlSelf) {} // Prevent unused
Vtest2__Syms* const __restrict vlSymsp VL_ATTR_UNUSED = vlSelf->vlSymsp;
VL_DEBUG_IF(VL_DBG_MSGF("+ Vtest2___024root___eval_triggers__act\n"); );
// Body
vlSelf->__VactTriggered.at(0U) = vlSelf->__VdlySched.awaitingCurrentTime();
#ifdef VL_DEBUG
if (VL_UNLIKELY(vlSymsp->_vm_contextp__->debug())) {
Vtest2___024root___dump_triggers__act(vlSelf);
}
#endif
}

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// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Design implementation internals
// See Vtest2.h for the primary calling header
#include "verilated.h"
#include "Vtest2__Syms.h"
#include "Vtest2___024root.h"
void Vtest2___024root___ctor_var_reset(Vtest2___024root* vlSelf);
Vtest2___024root::Vtest2___024root(Vtest2__Syms* symsp, const char* v__name)
: VerilatedModule{v__name}
, __VdlySched{*symsp->_vm_contextp__}
, vlSymsp{symsp}
{
// Reset structure values
Vtest2___024root___ctor_var_reset(this);
}
void Vtest2___024root::__Vconfigure(bool first) {
if (false && first) {} // Prevent unused
}
Vtest2___024root::~Vtest2___024root() {
}

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// Verilated -*- C++ -*-
// DESCRIPTION: main() calling loop, created with Verilator --main
#include "verilated.h"
#include "Vtest2.h"
//======================
int main(int argc, char** argv, char**) {
// Setup context, defaults, and parse command line
Verilated::debug(0);
const std::unique_ptr<VerilatedContext> contextp{new VerilatedContext};
contextp->commandArgs(argc, argv);
// Construct the Verilated model, from Vtop.h generated from Verilating
const std::unique_ptr<Vtest2> topp{new Vtest2{contextp.get()}};
// Simulate until $finish
while (!contextp->gotFinish()) {
// Evaluate model
topp->eval();
// Advance time
if (!topp->eventsPending()) break;
contextp->time(topp->nextTimeSlot());
}
if (!contextp->gotFinish()) {
VL_DEBUG_IF(VL_PRINTF("+ Exiting without $finish; no events left\n"););
}
// Final model cleanup
topp->final();
return 0;
}

1
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obj_dir/Vtest2.cpp obj_dir/Vtest2.h obj_dir/Vtest2.mk obj_dir/Vtest2__Syms.cpp obj_dir/Vtest2__Syms.h obj_dir/Vtest2___024root.h obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0.cpp obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0__Slow.cpp obj_dir/Vtest2___024root__DepSet_hef21559d__0.cpp obj_dir/Vtest2___024root__Slow.cpp obj_dir/Vtest2__main.cpp obj_dir/Vtest2__ver.d obj_dir/Vtest2_classes.mk : /usr/bin/verilator_bin /usr/bin/verilator_bin test2.v test2Tb.v

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tests/obj_dir/Vtest2__verFiles.dat Normal file
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# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
C "--binary test2.v test2Tb.v"
S 12244816 28045 1719496600 881980186 1680199511 0 "/usr/bin/verilator_bin"
T 2951 45746 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2.cpp"
T 2664 45745 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2.h"
T 1740 45754 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2.mk"
T 754 45743 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2__Syms.cpp"
T 911 45744 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2__Syms.h"
T 890 45747 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2___024root.h"
T 4152 45751 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0.cpp"
T 2575 45749 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2___024root__DepSet_h3c5fcca7__0__Slow.cpp"
T 1695 45750 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2___024root__DepSet_hef21559d__0.cpp"
T 680 45748 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2___024root__Slow.cpp"
T 964 45752 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2__main.cpp"
T 461 45755 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2__ver.d"
T 0 0 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2__verFiles.dat"
T 1626 45753 1720543752 100522297 1720543752 100522297 "obj_dir/Vtest2_classes.mk"
S 99 45716 1720540105 686454811 1720540105 686454811 "test2.v"
S 203 45721 1720543725 320527164 1720543725 320527164 "test2Tb.v"

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# Verilated -*- Makefile -*-
# DESCRIPTION: Verilator output: Make include file with class lists
#
# This file lists generated Verilated files, for including in higher level makefiles.
# See Vtest2.mk for the caller.
### Switches...
# C11 constructs required? 0/1 (always on now)
VM_C11 = 1
# Timing enabled? 0/1
VM_TIMING = 1
# Coverage output mode? 0/1 (from --coverage)
VM_COVERAGE = 0
# Parallel builds? 0/1 (from --output-split)
VM_PARALLEL_BUILDS = 0
# Tracing output mode? 0/1 (from --trace/--trace-fst)
VM_TRACE = 0
# Tracing output mode in VCD format? 0/1 (from --trace)
VM_TRACE_VCD = 0
# Tracing output mode in FST format? 0/1 (from --trace-fst)
VM_TRACE_FST = 0
### Object file lists...
# Generated module classes, fast-path, compile with highest optimization
VM_CLASSES_FAST += \
Vtest2 \
Vtest2___024root__DepSet_hef21559d__0 \
Vtest2___024root__DepSet_h3c5fcca7__0 \
Vtest2__main \
# Generated module classes, non-fast-path, compile with low/medium optimization
VM_CLASSES_SLOW += \
Vtest2___024root__Slow \
Vtest2___024root__DepSet_h3c5fcca7__0__Slow \
# Generated support classes, fast-path, compile with highest optimization
VM_SUPPORT_FAST += \
# Generated support classes, non-fast-path, compile with low/medium optimization
VM_SUPPORT_SLOW += \
Vtest2__Syms \
# Global classes, need linked once per executable, fast-path, compile with highest optimization
VM_GLOBAL_FAST += \
verilated \
verilated_timing \
verilated_threads \
# Global classes, need linked once per executable, non-fast-path, compile with low/medium optimization
VM_GLOBAL_SLOW += \
# Verilated -*- Makefile -*-

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#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x55b1a99faed0 .scope module, "test2Tb" "test2Tb" 2 1;
.timescale 0 0;
v0x55b1a9a0cbd0_0 .var "a", 3 0;
v0x55b1a9a0cc90_0 .net "b", 6 0, L_0x55b1a9a1d1d0; 1 drivers
S_0x55b1a99fb060 .scope module, "uut" "test2" 2 5, 3 1 0, S_0x55b1a99faed0;
.timescale 0 0;
.port_info 0 /INPUT 4 "a";
.port_info 1 /OUTPUT 7 "b";
L_0x7f3e40949018 .functor BUFT 1, C4<0000001>, C4<0>, C4<0>, C4<0>;
v0x55b1a99c1cf0_0 .net/2s *"_ivl_0", 6 0, L_0x7f3e40949018; 1 drivers
v0x55b1a9a0c440_0 .net *"_ivl_10", 6 0, L_0x55b1a9a1d090; 1 drivers
L_0x7f3e409490f0 .functor BUFT 1, C4<0000010>, C4<0>, C4<0>, C4<0>;
v0x55b1a9a0c520_0 .net/2s *"_ivl_12", 6 0, L_0x7f3e409490f0; 1 drivers
v0x55b1a9a0c5e0_0 .net *"_ivl_2", 31 0, L_0x55b1a9a0cd90; 1 drivers
L_0x7f3e40949060 .functor BUFT 1, C4<0000000000000000000000000000>, C4<0>, C4<0>, C4<0>;
v0x55b1a9a0c6c0_0 .net *"_ivl_5", 27 0, L_0x7f3e40949060; 1 drivers
L_0x7f3e409490a8 .functor BUFT 1, C4<00000000000000000000000000000001>, C4<0>, C4<0>, C4<0>;
v0x55b1a9a0c7f0_0 .net/2u *"_ivl_6", 31 0, L_0x7f3e409490a8; 1 drivers
v0x55b1a9a0c8d0_0 .net *"_ivl_8", 31 0, L_0x55b1a9a1cf20; 1 drivers
v0x55b1a9a0c9b0_0 .net "a", 3 0, v0x55b1a9a0cbd0_0; 1 drivers
v0x55b1a9a0ca90_0 .net "b", 6 0, L_0x55b1a9a1d1d0; alias, 1 drivers
L_0x55b1a9a0cd90 .concat [ 4 28 0 0], v0x55b1a9a0cbd0_0, L_0x7f3e40949060;
L_0x55b1a9a1cf20 .arith/sum 32, L_0x55b1a9a0cd90, L_0x7f3e409490a8;
L_0x55b1a9a1d090 .shift/l 7, L_0x7f3e40949018, L_0x55b1a9a1cf20;
L_0x55b1a9a1d1d0 .arith/sub 7, L_0x55b1a9a1d090, L_0x7f3e409490f0;
.scope S_0x55b1a99faed0;
T_0 ;
%vpi_call 2 9 "$dumpfile", "test2v.vcd" {0 0 0};
%vpi_call 2 10 "$dumpvars" {0 0 0};
%vpi_call 2 11 "$display", "Success!" {0 0 0};
%pushi/vec4 5, 0, 4;
%store/vec4 v0x55b1a9a0cbd0_0, 0, 4;
%delay 10, 0;
%vpi_call 2 13 "$finish" {0 0 0};
%end;
.thread T_0;
# The file index is used to find the file name in the following table.
:file_names 4;
"N/A";
"<interactive>";
"test2Tb.v";
"test2.v";

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module test2 (
input [3:0] a,
output [6:0] b
);
assign b = (1 << (a + 1)) - 2;
endmodule

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module test2Tb();
reg [3:0] a;
wire [6:0] b;
test2 uut(a,b);
initial begin
$dumpfile("test2v.vcd");
$dumpvars;
$display("Success!");
a = 4'd5; #10;
$finish;
end
endmodule

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tests/test2v.vcd Normal file
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$date
Tue Jul 9 19:50:51 2024
$end
$version
Icarus Verilog
$end
$timescale
1s
$end
$scope module test2Tb $end
$var wire 7 ! b [6:0] $end
$var reg 4 " a [3:0] $end
$scope module uut $end
$var wire 4 # a [3:0] $end
$var wire 7 $ b [6:0] $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
b111110 $
b101 #
b101 "
b111110 !
$end
#10