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kaltinsoy
/
verilog
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verilog
/
gowin
/
bttn
/
impl
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k0rrluna
8003e7f253
fpga
2025-01-23 05:25:40 +03:00
..
gwsynthesis
fpga
2025-01-23 05:25:40 +03:00
pnr
fpga
2025-01-23 05:25:40 +03:00
temp
final fpga
2025-01-21 05:12:57 +03:00
bttn_process_config.json
fpga
2025-01-23 05:25:40 +03:00
bttn_process_config.jsonZone.Identifier
final fpga
2025-01-21 05:12:57 +03:00