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verilog/gowin/bttn
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k0rrluna 8003e7f253 fpga
2025-01-23 05:25:40 +03:00
..
impl
fpga
2025-01-23 05:25:40 +03:00
src
fpga
2025-01-23 05:25:40 +03:00
bttn.gprj
final fpga
2025-01-21 05:12:57 +03:00
bttn.gprj.user
fpga
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bttn.gprj.userZone.Identifier
final fpga
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bttn.gprjZone.Identifier
final fpga
2025-01-21 05:12:57 +03:00