4-bit ALU

project/subtraction.vcd

@@ -0,0 +1,408 @@
+$date
+	Sat Dec 14 04:55:25 2024
+$end
+$version
+	Icarus Verilog
+$end
+$timescale
+	1s
+$end
+$scope module subtractionTB $end
+$var wire 1 ! overflow $end
+$var wire 5 " Y [4:0] $end
+$var reg 4 # A [3:0] $end
+$var reg 4 $ B [3:0] $end
+$scope module uut $end
+$var wire 4 % A [3:0] $end
+$var wire 4 & B [3:0] $end
+$var wire 4 ' xB [3:0] $end
+$var wire 1 ( overflow $end
+$var wire 5 ) notB [4:0] $end
+$var wire 5 * Y1 [4:0] $end
+$var wire 5 + Y [4:0] $end
+$scope module a1 $end
+$var wire 4 , A [3:0] $end
+$var wire 4 - B [3:0] $end
+$var wire 5 . Y [4:0] $end
+$var wire 4 / Carry4 [3:0] $end
+$scope module f1 $end
+$var wire 1 0 A $end
+$var wire 1 1 B $end
+$var wire 1 2 Carry $end
+$var wire 1 3 CarryO $end
+$var wire 1 4 xor1 $end
+$var wire 1 5 and2 $end
+$var wire 1 6 and1 $end
+$var wire 1 7 Sum $end
+$scope module h1 $end
+$var wire 1 0 A $end
+$var wire 1 1 B $end
+$var wire 1 6 Carry $end
+$var wire 1 4 Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 4 A $end
+$var wire 1 2 B $end
+$var wire 1 5 Carry $end
+$var wire 1 7 Sum $end
+$upscope $end
+$upscope $end
+$scope module f2 $end
+$var wire 1 8 A $end
+$var wire 1 9 B $end
+$var wire 1 : Carry $end
+$var wire 1 ; CarryO $end
+$var wire 1 < xor1 $end
+$var wire 1 = and2 $end
+$var wire 1 > and1 $end
+$var wire 1 ? Sum $end
+$scope module h1 $end
+$var wire 1 8 A $end
+$var wire 1 9 B $end
+$var wire 1 > Carry $end
+$var wire 1 < Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 < A $end
+$var wire 1 : B $end
+$var wire 1 = Carry $end
+$var wire 1 ? Sum $end
+$upscope $end
+$upscope $end
+$scope module f3 $end
+$var wire 1 @ A $end
+$var wire 1 A B $end
+$var wire 1 B Carry $end
+$var wire 1 C CarryO $end
+$var wire 1 D xor1 $end
+$var wire 1 E and2 $end
+$var wire 1 F and1 $end
+$var wire 1 G Sum $end
+$scope module h1 $end
+$var wire 1 @ A $end
+$var wire 1 A B $end
+$var wire 1 F Carry $end
+$var wire 1 D Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 D A $end
+$var wire 1 B B $end
+$var wire 1 E Carry $end
+$var wire 1 G Sum $end
+$upscope $end
+$upscope $end
+$scope module h1 $end
+$var wire 1 H A $end
+$var wire 1 I B $end
+$var wire 1 J Carry $end
+$var wire 1 K Sum $end
+$upscope $end
+$upscope $end
+$scope module a2 $end
+$var wire 4 L A [3:0] $end
+$var wire 4 M B [3:0] $end
+$var wire 5 N Y [4:0] $end
+$var wire 4 O Carry4 [3:0] $end
+$scope module f1 $end
+$var wire 1 P A $end
+$var wire 1 Q B $end
+$var wire 1 R Carry $end
+$var wire 1 S CarryO $end
+$var wire 1 T xor1 $end
+$var wire 1 U and2 $end
+$var wire 1 V and1 $end
+$var wire 1 W Sum $end
+$scope module h1 $end
+$var wire 1 P A $end
+$var wire 1 Q B $end
+$var wire 1 V Carry $end
+$var wire 1 T Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 T A $end
+$var wire 1 R B $end
+$var wire 1 U Carry $end
+$var wire 1 W Sum $end
+$upscope $end
+$upscope $end
+$scope module f2 $end
+$var wire 1 X A $end
+$var wire 1 Y B $end
+$var wire 1 Z Carry $end
+$var wire 1 [ CarryO $end
+$var wire 1 \ xor1 $end
+$var wire 1 ] and2 $end
+$var wire 1 ^ and1 $end
+$var wire 1 _ Sum $end
+$scope module h1 $end
+$var wire 1 X A $end
+$var wire 1 Y B $end
+$var wire 1 ^ Carry $end
+$var wire 1 \ Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 \ A $end
+$var wire 1 Z B $end
+$var wire 1 ] Carry $end
+$var wire 1 _ Sum $end
+$upscope $end
+$upscope $end
+$scope module f3 $end
+$var wire 1 ` A $end
+$var wire 1 a B $end
+$var wire 1 b Carry $end
+$var wire 1 c CarryO $end
+$var wire 1 d xor1 $end
+$var wire 1 e and2 $end
+$var wire 1 f and1 $end
+$var wire 1 g Sum $end
+$scope module h1 $end
+$var wire 1 ` A $end
+$var wire 1 a B $end
+$var wire 1 f Carry $end
+$var wire 1 d Sum $end
+$upscope $end
+$scope module h2 $end
+$var wire 1 d A $end
+$var wire 1 b B $end
+$var wire 1 e Carry $end
+$var wire 1 g Sum $end
+$upscope $end
+$upscope $end
+$scope module h1 $end
+$var wire 1 h A $end
+$var wire 1 i B $end
+$var wire 1 j Carry $end
+$var wire 1 k Sum $end
+$upscope $end
+$upscope $end
+$scope module od1 $end
+$var wire 4 l A [3:0] $end
+$var wire 1 m AandSum $end
+$var wire 4 n B [3:0] $end
+$var wire 5 o Y [4:0] $end
+$var wire 1 p detect1 $end
+$var wire 1 q detect2 $end
+$var wire 1 r opC $end
+$var wire 2 s opCode [1:0] $end
+$var wire 1 ( overflowDetect $end
+$var wire 1 t sign1 $end
+$var wire 1 u sign2 $end
+$var wire 1 v sign3 $end
+$var wire 1 w sign4 $end
+$upscope $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
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+$end
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