verilog
This commit is contained in:
		| @@ -1,14 +1,24 @@ | ||||
| module bibp #(parameter UZUNLUK = 8)( | ||||
|     input [UZUNLUK + 2:0] buyruk, | ||||
|     output [UZUNLUK:0] sonuc | ||||
| /*    output reg [(UZUNLUK/2) - 1:0] v1, | ||||
|     output reg [(UZUNLUK/2) - 1:0] v2, */ | ||||
|     output reg [(UZUNLUK/2):0] sonuc | ||||
| ); | ||||
|  | ||||
| localparam halfUZUNLUK = UZUNLUK/2; | ||||
| localparam [halfUZUNLUK - 1 : 0] v1 = buyruk[UZUNLUK - 1: halfUZUNLUK]; | ||||
| localparam [halfUZUNLUK - 1: 0] v2 = buyruk[halfUZUNLUK - 1 : 0]; | ||||
| /*    localparam halfUZUNLUK = UZUNLUK / 2; | ||||
|     localparam v1 = buyruk[UZUNLUK - 1 : halfUZUNLUK]; | ||||
|     localparam v2 = buyruk[halfUZUNLUK - 1 : 0];  | ||||
| */ | ||||
|  | ||||
| /*assign v1 = buyruk[UZUNLUK - 1 : UZUNLUK/2]; | ||||
| assign v2 = buyruk[UZUNLUK/2  : 0];*/ | ||||
|  | ||||
| wire [(UZUNLUK/2) - 1:0] v1,v2; | ||||
|  | ||||
| always@(*) begin | ||||
|     case(buyruk[UZUNLUK + 2: UZUNLUK -1]) | ||||
|     v1 = buyruk[UZUNLUK - 1 : UZUNLUK/2]; | ||||
|     v2 = buyruk[(UZUNLUK/2) - 1 : 0]; | ||||
|     case(buyruk[UZUNLUK+2:UZUNLUK-1]) | ||||
|         3'b000: sonuc = v1 + v2; | ||||
|         3'b001: sonuc = v1 - v2; | ||||
|         3'b010: sonuc = v1 & v2; | ||||
|   | ||||
| @@ -4,13 +4,13 @@ parameter UZUNLUK = 8; | ||||
| reg [UZUNLUK+2:0] buyruk; | ||||
| wire [UZUNLUK/2:0] sonuc; | ||||
|  | ||||
| bibp uut(buyruk, sonuc); | ||||
| bibp #(.UZUNLUK(UZUNLUK)) uut(.buyruk(buyruk), .sonuc(sonuc)); | ||||
|  | ||||
| initial begin | ||||
|     $dumpfile("vbibp.vcd"); | ||||
|     $dumpvars; | ||||
|  | ||||
|     buyruk = 11'b000_0101_0101; #10; | ||||
|     buyruk = 11'b001_0101_0100; #10; | ||||
|     $finish; | ||||
| end | ||||
| endmodule | ||||
							
								
								
									
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							| @@ -0,0 +1,34 @@ | ||||
| $date | ||||
| 	Thu Jul 11 19:23:34 2024 | ||||
| $end | ||||
| $version | ||||
| 	Icarus Verilog | ||||
| $end | ||||
| $timescale | ||||
| 	1s | ||||
| $end | ||||
| $scope module bibpTB $end | ||||
| $var wire 4 ! v2 [3:0] $end | ||||
| $var wire 4 " v1 [3:0] $end | ||||
| $var wire 5 # sonuc [4:0] $end | ||||
| $var reg 11 $ buyruk [10:0] $end | ||||
| $scope module uut $end | ||||
| $var wire 11 % buyruk [10:0] $end | ||||
| $var reg 5 & sonuc [4:0] $end | ||||
| $var reg 4 ' v1 [3:0] $end | ||||
| $var reg 4 ( v2 [3:0] $end | ||||
| $upscope $end | ||||
| $upscope $end | ||||
| $enddefinitions $end | ||||
| #0 | ||||
| $dumpvars | ||||
| b100 ( | ||||
| b101 ' | ||||
| b100 & | ||||
| b101010100 % | ||||
| b101010100 $ | ||||
| b100 # | ||||
| b101 " | ||||
| b100 ! | ||||
| $end | ||||
| #10 | ||||
							
								
								
									
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							| @@ -0,0 +1,126 @@ | ||||
| #! /usr/bin/vvp | ||||
| :ivl_version "11.0 (stable)"; | ||||
| :ivl_delay_selection "TYPICAL"; | ||||
| :vpi_time_precision + 0; | ||||
| :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi"; | ||||
| :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi"; | ||||
| :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; | ||||
| :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; | ||||
| :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; | ||||
| S_0x5634a3f74fe0 .scope module, "bibpTB" "bibpTB" 2 1; | ||||
|  .timescale 0 0; | ||||
| P_0x5634a3f60060 .param/l "UZUNLUK" 0 2 3, +C4<00000000000000000000000000001000>; | ||||
| v0x5634a3f87b40_0 .var "buyruk", 10 0; | ||||
| v0x5634a3f87c20_0 .net "sonuc", 4 0, v0x5634a3f877e0_0;  1 drivers | ||||
| v0x5634a3f87cf0_0 .net "v1", 3 0, v0x5634a3f878c0_0;  1 drivers | ||||
| v0x5634a3f87df0_0 .net "v2", 3 0, v0x5634a3f879b0_0;  1 drivers | ||||
| S_0x5634a3f751c0 .scope module, "uut" "bibp" 2 9, 3 1 0, S_0x5634a3f74fe0; | ||||
|  .timescale 0 0; | ||||
|     .port_info 0 /INPUT 11 "buyruk"; | ||||
|     .port_info 1 /OUTPUT 4 "v1"; | ||||
|     .port_info 2 /OUTPUT 4 "v2"; | ||||
|     .port_info 3 /OUTPUT 5 "sonuc"; | ||||
| P_0x5634a3f753a0 .param/l "UZUNLUK" 0 3 1, +C4<00000000000000000000000000001000>; | ||||
| v0x5634a3f38cf0_0 .net "buyruk", 10 0, v0x5634a3f87b40_0;  1 drivers | ||||
| v0x5634a3f877e0_0 .var "sonuc", 4 0; | ||||
| v0x5634a3f878c0_0 .var "v1", 3 0; | ||||
| v0x5634a3f879b0_0 .var "v2", 3 0; | ||||
| E_0x5634a3f39630 .event edge, v0x5634a3f38cf0_0, v0x5634a3f878c0_0, v0x5634a3f879b0_0; | ||||
|     .scope S_0x5634a3f751c0; | ||||
| T_0 ; | ||||
|     %wait E_0x5634a3f39630; | ||||
|     %load/vec4 v0x5634a3f38cf0_0; | ||||
|     %parti/s 4, 4, 4; | ||||
|     %store/vec4 v0x5634a3f878c0_0, 0, 4; | ||||
|     %load/vec4 v0x5634a3f38cf0_0; | ||||
|     %parti/s 4, 0, 2; | ||||
|     %store/vec4 v0x5634a3f879b0_0, 0, 4; | ||||
|     %load/vec4 v0x5634a3f38cf0_0; | ||||
|     %parti/s 4, 7, 4; | ||||
|     %dup/vec4; | ||||
|     %pushi/vec4 0, 0, 4; | ||||
|     %cmp/u; | ||||
|     %jmp/1 T_0.0, 6; | ||||
|     %dup/vec4; | ||||
|     %pushi/vec4 1, 0, 4; | ||||
|     %cmp/u; | ||||
|     %jmp/1 T_0.1, 6; | ||||
|     %dup/vec4; | ||||
|     %pushi/vec4 2, 0, 4; | ||||
|     %cmp/u; | ||||
|     %jmp/1 T_0.2, 6; | ||||
|     %dup/vec4; | ||||
|     %pushi/vec4 3, 0, 4; | ||||
|     %cmp/u; | ||||
|     %jmp/1 T_0.3, 6; | ||||
|     %dup/vec4; | ||||
|     %pushi/vec4 4, 0, 4; | ||||
|     %cmp/u; | ||||
|     %jmp/1 T_0.4, 6; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %add; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.0 ; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %add; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.1 ; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %sub; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.2 ; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %and; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.3 ; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %or; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.4 ; | ||||
|     %load/vec4 v0x5634a3f878c0_0; | ||||
|     %pad/u 5; | ||||
|     %load/vec4 v0x5634a3f879b0_0; | ||||
|     %pad/u 5; | ||||
|     %xor; | ||||
|     %store/vec4 v0x5634a3f877e0_0, 0, 5; | ||||
|     %jmp T_0.6; | ||||
| T_0.6 ; | ||||
|     %pop/vec4 1; | ||||
|     %jmp T_0; | ||||
|     .thread T_0, $push; | ||||
|     .scope S_0x5634a3f74fe0; | ||||
| T_1 ; | ||||
|     %vpi_call 2 12 "$dumpfile", "vbibp.vcd" {0 0 0}; | ||||
|     %vpi_call 2 13 "$dumpvars" {0 0 0}; | ||||
|     %pushi/vec4 340, 0, 11; | ||||
|     %store/vec4 v0x5634a3f87b40_0, 0, 11; | ||||
|     %delay 10, 0; | ||||
|     %vpi_call 2 16 "$finish" {0 0 0}; | ||||
|     %end; | ||||
|     .thread T_1; | ||||
| # The file index is used to find the file name in the following table. | ||||
| :file_names 4; | ||||
|     "N/A"; | ||||
|     "<interactive>"; | ||||
|     "bibpTB.v"; | ||||
|     "bibp.v"; | ||||
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