diff --git a/gowin/bibp/bibp.gprj b/gowin/bibp/bibp.gprj
new file mode 100644
index 0000000..b678c02
--- /dev/null
+++ b/gowin/bibp/bibp.gprj
@@ -0,0 +1,10 @@
+
+
+
+ FPGA
+ 5
+ gw2a18c-011
+
+
+
+
diff --git a/gowin/bibp/bibp.gprj.user b/gowin/bibp/bibp.gprj.user
new file mode 100644
index 0000000..2f8c319
--- /dev/null
+++ b/gowin/bibp/bibp.gprj.user
@@ -0,0 +1,13 @@
+
+
+
+ 1.0
+
+
+
+
+
+
+
+ 000000ff00000001fd00000002000000000000018e000003e5fc0200000001fc00000063000003e50000000000fffffffaffffffff0200000003fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000000000000000fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000000000000000fb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff00000000000000000000000300000ab00000027efc0100000001fc0000000000000ab0000000da00fffffffa000000010100000002fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000009e00fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000da00ffffff0000091a000003e500000004000000040000000800000008fc000000010000000200000003000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e004500640069007401000000bdffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c007301000001a5ffffffff0000000000000000
+
diff --git a/gowin/bibp/impl/bibp_process_config.json b/gowin/bibp/impl/bibp_process_config.json
new file mode 100644
index 0000000..3d0366a
--- /dev/null
+++ b/gowin/bibp/impl/bibp_process_config.json
@@ -0,0 +1,88 @@
+{
+ "BACKGROUND_PROGRAMMING" : "off",
+ "COMPRESS" : false,
+ "CPU" : false,
+ "CRC_CHECK" : true,
+ "Clock_Route_Order" : 0,
+ "Correct_Hold_Violation" : true,
+ "DONE" : false,
+ "DOWNLOAD_SPEED" : "default",
+ "Disable_Insert_Pad" : false,
+ "ENABLE_CTP" : false,
+ "ENABLE_MERGE_MODE" : false,
+ "ENCRYPTION_KEY" : false,
+ "ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
+ "ERROR_DECTION_AND_CORRECTION" : false,
+ "ERROR_DECTION_ONLY" : false,
+ "ERROR_INJECTION" : false,
+ "EXTERNAL_MASTER_CONFIG_CLOCK" : false,
+ "Enable_DSRM" : false,
+ "FORMAT" : "binary",
+ "FREQUENCY_DIVIDER" : "",
+ "Generate_Constraint_File_of_Ports" : false,
+ "Generate_IBIS_File" : false,
+ "Generate_Plain_Text_Timing_Report" : false,
+ "Generate_Post_PNR_Simulation_Model_File" : false,
+ "Generate_Post_Place_File" : false,
+ "Generate_SDF_File" : false,
+ "Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
+ "Global_Freq" : "default",
+ "GwSyn_Loop_Limit" : 2000,
+ "HOTBOOT" : false,
+ "I2C" : false,
+ "I2C_SLAVE_ADDR" : "00",
+ "IncludePath" : [
+
+ ],
+ "Incremental_Compile" : "",
+ "Initialize_Primitives" : false,
+ "JTAG" : false,
+ "MODE_IO" : false,
+ "MSPI" : false,
+ "MSPI_JUMP" : false,
+ "MULTIBOOT_ADDRESS_WIDTH" : "24",
+ "MULTIBOOT_MODE" : "Normal",
+ "MULTIBOOT_SPI_FLASH_ADDRESS" : "00000000",
+ "MULTIJUMP_ADDRESS_WIDTH" : "24",
+ "MULTIJUMP_MODE" : "Normal",
+ "MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
+ "Multi_Boot" : true,
+ "OUTPUT_BASE_NAME" : "bibp",
+ "POWER_ON_RESET_MONITOR" : true,
+ "PRINT_BSRAM_VALUE" : true,
+ "PROGRAM_DONE_BYPASS" : false,
+ "PlaceInRegToIob" : true,
+ "PlaceIoRegToIob" : true,
+ "PlaceOutRegToIob" : true,
+ "Place_Option" : "0",
+ "Process_Configuration_Verion" : "1.0",
+ "Promote_Physical_Constraint_Warning_to_Error" : true,
+ "READY" : false,
+ "RECONFIG_N" : false,
+ "Ram_RW_Check" : false,
+ "Replicate_Resources" : false,
+ "Report_Auto-Placed_Io_Information" : false,
+ "Route_Maxfan" : 23,
+ "Route_Option" : "0",
+ "Run_Timing_Driven" : true,
+ "SECURE_MODE" : false,
+ "SECURITY_BIT" : true,
+ "SEU_HANDLER" : false,
+ "SEU_HANDLER_CHECKSUM" : false,
+ "SEU_HANDLER_MODE" : "auto",
+ "SSPI" : false,
+ "STOP_SEU_HANDLER" : false,
+ "Show_All_Warnings" : false,
+ "Synthesize_tool" : "GowinSyn",
+ "TclPre" : "",
+ "TopModule" : "",
+ "USERCODE" : "default",
+ "Unused_Pin" : "As_input_tri_stated_with_pull_up",
+ "VCCAUX" : 3.3,
+ "VCCX" : "3.3",
+ "VHDL_Standard" : "VHDL_Std_1993",
+ "Verilog_Standard" : "Vlg_Std_2001",
+ "WAKE_UP" : "0",
+ "show_all_warnings" : false,
+ "turn_off_bg" : false
+}
\ No newline at end of file
diff --git a/gowin/bibp/impl/gwsynthesis/bibp.log b/gowin/bibp/impl/gwsynthesis/bibp.log
new file mode 100644
index 0000000..6fdc861
--- /dev/null
+++ b/gowin/bibp/impl/gwsynthesis/bibp.log
@@ -0,0 +1,14 @@
+GowinSynthesis start
+Running parser ...
+Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v'
+ERROR (EX3812) : 'buyruk' is not a constant("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":7)
+ERROR (EX3812) : 'buyruk' is not a constant("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":8)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":12)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":13)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":14)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":15)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":16)
+ERROR (EX3900) : Procedural assignment to a non-register 'sonuc' is not permitted("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":17)
+ERROR (EX3928) : Module 'bibp' is ignored due to previous errors("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v":21)
+Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bibp\src\bibp.v' ignored due to errors
+GowinSynthesis finish
diff --git a/gowin/bibp/impl/gwsynthesis/bibp.prj b/gowin/bibp/impl/gwsynthesis/bibp.prj
new file mode 100644
index 0000000..7d1e082
--- /dev/null
+++ b/gowin/bibp/impl/gwsynthesis/bibp.prj
@@ -0,0 +1,19 @@
+
+
+
+ beta
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
diff --git a/gowin/bibp/impl/temp/rtl_parser_arg.json b/gowin/bibp/impl/temp/rtl_parser_arg.json
new file mode 100644
index 0000000..6e991db
--- /dev/null
+++ b/gowin/bibp/impl/temp/rtl_parser_arg.json
@@ -0,0 +1,17 @@
+{
+ "Device" : "GW2A-18C",
+ "Files" : [
+ {
+ "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bibp/src/bibp.v",
+ "Type" : "verilog"
+ }
+ ],
+ "IncludePath" : [
+
+ ],
+ "LoopLimit" : 2000,
+ "ResultFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bibp/impl/temp/rtl_parser.result",
+ "Top" : "",
+ "VerilogStd" : "verilog_2001",
+ "VhdlStd" : "vhdl_93"
+}
\ No newline at end of file
diff --git a/gowin/bibp/src/bibp.v b/gowin/bibp/src/bibp.v
new file mode 100644
index 0000000..01a2f6c
--- /dev/null
+++ b/gowin/bibp/src/bibp.v
@@ -0,0 +1,21 @@
+module bibp #(parameter UZUNLUK = 8)(
+ input [UZUNLUK + 2:0] buyruk,
+ output [UZUNLUK:0] sonuc
+);
+
+ localparam halfUZUNLUK = UZUNLUK / 2;
+ localparam v1 = buyruk[UZUNLUK + 2 - 1 : halfUZUNLUK];
+ localparam v2 = buyruk[halfUZUNLUK - 1 : 0];
+
+always@(*) begin
+ case(buyruk[UZUNLUK + 2: UZUNLUK -1])
+ 3'b000: sonuc = v1 + v2;
+ 3'b001: sonuc = v1 - v2;
+ 3'b010: sonuc = v1 & v2;
+ 3'b011: sonuc = v1 | v2;
+ 3'b100: sonuc = v1 ^ v2;
+ default: sonuc = v1 + v2;
+ endcase
+end
+
+endmodule
\ No newline at end of file
diff --git a/labs/lab6/bibp.v b/labs/lab6/bibp.v
index 3683e7b..2245e97 100644
--- a/labs/lab6/bibp.v
+++ b/labs/lab6/bibp.v
@@ -1,14 +1,24 @@
module bibp #(parameter UZUNLUK = 8)(
input [UZUNLUK + 2:0] buyruk,
- output [UZUNLUK:0] sonuc
+/* output reg [(UZUNLUK/2) - 1:0] v1,
+ output reg [(UZUNLUK/2) - 1:0] v2, */
+ output reg [(UZUNLUK/2):0] sonuc
);
-localparam halfUZUNLUK = UZUNLUK/2;
-localparam [halfUZUNLUK - 1 : 0] v1 = buyruk[UZUNLUK - 1: halfUZUNLUK];
-localparam [halfUZUNLUK - 1: 0] v2 = buyruk[halfUZUNLUK - 1 : 0];
+/* localparam halfUZUNLUK = UZUNLUK / 2;
+ localparam v1 = buyruk[UZUNLUK - 1 : halfUZUNLUK];
+ localparam v2 = buyruk[halfUZUNLUK - 1 : 0];
+*/
+
+/*assign v1 = buyruk[UZUNLUK - 1 : UZUNLUK/2];
+assign v2 = buyruk[UZUNLUK/2 : 0];*/
+
+wire [(UZUNLUK/2) - 1:0] v1,v2;
always@(*) begin
- case(buyruk[UZUNLUK + 2: UZUNLUK -1])
+ v1 = buyruk[UZUNLUK - 1 : UZUNLUK/2];
+ v2 = buyruk[(UZUNLUK/2) - 1 : 0];
+ case(buyruk[UZUNLUK+2:UZUNLUK-1])
3'b000: sonuc = v1 + v2;
3'b001: sonuc = v1 - v2;
3'b010: sonuc = v1 & v2;
diff --git a/labs/lab6/bibpTB.v b/labs/lab6/bibpTB.v
index c4964b9..cfd8f55 100644
--- a/labs/lab6/bibpTB.v
+++ b/labs/lab6/bibpTB.v
@@ -4,13 +4,13 @@ parameter UZUNLUK = 8;
reg [UZUNLUK+2:0] buyruk;
wire [UZUNLUK/2:0] sonuc;
-bibp uut(buyruk, sonuc);
+bibp #(.UZUNLUK(UZUNLUK)) uut(.buyruk(buyruk), .sonuc(sonuc));
initial begin
$dumpfile("vbibp.vcd");
$dumpvars;
- buyruk = 11'b000_0101_0101; #10;
+ buyruk = 11'b001_0101_0100; #10;
$finish;
end
endmodule
\ No newline at end of file
diff --git a/labs/lab6/vbibp.vcd b/labs/lab6/vbibp.vcd
new file mode 100644
index 0000000..93488ad
--- /dev/null
+++ b/labs/lab6/vbibp.vcd
@@ -0,0 +1,34 @@
+$date
+ Thu Jul 11 19:23:34 2024
+$end
+$version
+ Icarus Verilog
+$end
+$timescale
+ 1s
+$end
+$scope module bibpTB $end
+$var wire 4 ! v2 [3:0] $end
+$var wire 4 " v1 [3:0] $end
+$var wire 5 # sonuc [4:0] $end
+$var reg 11 $ buyruk [10:0] $end
+$scope module uut $end
+$var wire 11 % buyruk [10:0] $end
+$var reg 5 & sonuc [4:0] $end
+$var reg 4 ' v1 [3:0] $end
+$var reg 4 ( v2 [3:0] $end
+$upscope $end
+$upscope $end
+$enddefinitions $end
+#0
+$dumpvars
+b100 (
+b101 '
+b100 &
+b101010100 %
+b101010100 $
+b100 #
+b101 "
+b100 !
+$end
+#10
diff --git a/labs/lab6/vvbibp b/labs/lab6/vvbibp
new file mode 100644
index 0000000..a334409
--- /dev/null
+++ b/labs/lab6/vvbibp
@@ -0,0 +1,126 @@
+#! /usr/bin/vvp
+:ivl_version "11.0 (stable)";
+:ivl_delay_selection "TYPICAL";
+:vpi_time_precision + 0;
+:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
+:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
+:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
+:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
+:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
+S_0x5634a3f74fe0 .scope module, "bibpTB" "bibpTB" 2 1;
+ .timescale 0 0;
+P_0x5634a3f60060 .param/l "UZUNLUK" 0 2 3, +C4<00000000000000000000000000001000>;
+v0x5634a3f87b40_0 .var "buyruk", 10 0;
+v0x5634a3f87c20_0 .net "sonuc", 4 0, v0x5634a3f877e0_0; 1 drivers
+v0x5634a3f87cf0_0 .net "v1", 3 0, v0x5634a3f878c0_0; 1 drivers
+v0x5634a3f87df0_0 .net "v2", 3 0, v0x5634a3f879b0_0; 1 drivers
+S_0x5634a3f751c0 .scope module, "uut" "bibp" 2 9, 3 1 0, S_0x5634a3f74fe0;
+ .timescale 0 0;
+ .port_info 0 /INPUT 11 "buyruk";
+ .port_info 1 /OUTPUT 4 "v1";
+ .port_info 2 /OUTPUT 4 "v2";
+ .port_info 3 /OUTPUT 5 "sonuc";
+P_0x5634a3f753a0 .param/l "UZUNLUK" 0 3 1, +C4<00000000000000000000000000001000>;
+v0x5634a3f38cf0_0 .net "buyruk", 10 0, v0x5634a3f87b40_0; 1 drivers
+v0x5634a3f877e0_0 .var "sonuc", 4 0;
+v0x5634a3f878c0_0 .var "v1", 3 0;
+v0x5634a3f879b0_0 .var "v2", 3 0;
+E_0x5634a3f39630 .event edge, v0x5634a3f38cf0_0, v0x5634a3f878c0_0, v0x5634a3f879b0_0;
+ .scope S_0x5634a3f751c0;
+T_0 ;
+ %wait E_0x5634a3f39630;
+ %load/vec4 v0x5634a3f38cf0_0;
+ %parti/s 4, 4, 4;
+ %store/vec4 v0x5634a3f878c0_0, 0, 4;
+ %load/vec4 v0x5634a3f38cf0_0;
+ %parti/s 4, 0, 2;
+ %store/vec4 v0x5634a3f879b0_0, 0, 4;
+ %load/vec4 v0x5634a3f38cf0_0;
+ %parti/s 4, 7, 4;
+ %dup/vec4;
+ %pushi/vec4 0, 0, 4;
+ %cmp/u;
+ %jmp/1 T_0.0, 6;
+ %dup/vec4;
+ %pushi/vec4 1, 0, 4;
+ %cmp/u;
+ %jmp/1 T_0.1, 6;
+ %dup/vec4;
+ %pushi/vec4 2, 0, 4;
+ %cmp/u;
+ %jmp/1 T_0.2, 6;
+ %dup/vec4;
+ %pushi/vec4 3, 0, 4;
+ %cmp/u;
+ %jmp/1 T_0.3, 6;
+ %dup/vec4;
+ %pushi/vec4 4, 0, 4;
+ %cmp/u;
+ %jmp/1 T_0.4, 6;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %add;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.0 ;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %add;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.1 ;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %sub;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.2 ;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %and;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.3 ;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %or;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.4 ;
+ %load/vec4 v0x5634a3f878c0_0;
+ %pad/u 5;
+ %load/vec4 v0x5634a3f879b0_0;
+ %pad/u 5;
+ %xor;
+ %store/vec4 v0x5634a3f877e0_0, 0, 5;
+ %jmp T_0.6;
+T_0.6 ;
+ %pop/vec4 1;
+ %jmp T_0;
+ .thread T_0, $push;
+ .scope S_0x5634a3f74fe0;
+T_1 ;
+ %vpi_call 2 12 "$dumpfile", "vbibp.vcd" {0 0 0};
+ %vpi_call 2 13 "$dumpvars" {0 0 0};
+ %pushi/vec4 340, 0, 11;
+ %store/vec4 v0x5634a3f87b40_0, 0, 11;
+ %delay 10, 0;
+ %vpi_call 2 16 "$finish" {0 0 0};
+ %end;
+ .thread T_1;
+# The file index is used to find the file name in the following table.
+:file_names 4;
+ "N/A";
+ "";
+ "bibpTB.v";
+ "bibp.v";