kaltinsoy
  • Joined on 2023-10-16
kaltinsoy pushed to main at kaltinsoy/4-bit-ALU 2025-01-23 07:10:21 +03:00
4cae830727 github language
kaltinsoy pushed to main at kaltinsoy/4-bit-ALU 2025-01-23 07:09:12 +03:00
9315033686 Fix Verilog file syntax highlighting
kaltinsoy pushed to main at kaltinsoy/4-bit-ALU 2025-01-23 07:06:21 +03:00
7194531692 Fix Verilog file syntax highlighting
kaltinsoy pushed to main at kaltinsoy/4-bit-ALU 2025-01-23 07:03:20 +03:00
3947f28bb5 Update README.md
kaltinsoy pushed to main at kaltinsoy/4-bit-ALU 2025-01-23 06:58:49 +03:00
8f854d046b initial commit
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-23 05:25:51 +03:00
8003e7f253 fpga
kaltinsoy created repository kaltinsoy/4-bit-ALU 2025-01-23 03:06:06 +03:00
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-21 05:13:11 +03:00
e91a8471ac final fpga
6b83c0f2e7 merge
8e613a767e tangFpga
Compare 3 commits »
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-20 15:16:40 +03:00
15916a2c53 bttnTB
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-19 14:01:20 +03:00
a007343feb fpga added
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-15 22:21:47 +03:00
4b2009e207 selector&bcd
kaltinsoy pushed to main at kaltinsoy/java 2025-01-13 03:59:34 +03:00
aea61f2076 lab7
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-12 07:23:37 +03:00
3d71f7e69f fpga
kaltinsoy pushed to main at kaltinsoy/java 2025-01-10 05:02:00 +03:00
a5b35aabb3 lab 4
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-08 01:05:53 +03:00
39d8168cc0 some random things
kaltinsoy pushed to main at kaltinsoy/verilog 2025-01-03 05:10:07 +03:00
ceede4abc3 Merge branch 'main' of ssh://ssh.ras-pi.tr/kaltinsoy/verilog
44a86fb2c0 selector
Compare 2 commits »
kaltinsoy pushed to main at kaltinsoy/java 2024-12-31 14:58:42 +03:00
b050db6dce labs
kaltinsoy pushed to main at kaltinsoy/verilog 2024-12-26 14:51:25 +03:00
4ca5ab1995 overflow fix
kaltinsoy pushed to main at kaltinsoy/verilog 2024-12-26 01:45:04 +03:00
fc2c438ec8 overflow fix2
kaltinsoy pushed to main at kaltinsoy/verilog 2024-12-26 01:23:34 +03:00
59169c0fff overflow fix