29 lines
564 B
Verilog
29 lines
564 B
Verilog
module bttnTB();
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reg [3:0] A,B;
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reg [2:0] opCodeA;
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reg [1:0] select;
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wire [1:0] led;
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wire [11:0] Y;
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bttn uut (
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.A(A),
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.B(B),
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.opCodeA(opCodeA),
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.select(select),
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.led(led),
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.Y(Y)
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);
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initial begin
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$dumpfile("bttn.vcd");
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$dumpvars;
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A = 4'b1111; B = 4'b1111; opCodeA = 3'b000; select = 2'b01; #5;
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A = 4'b0000; B = 4'b1111; opCodeA = 3'b001; select = 2'b01; #5;
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A = 4'b1111; B = 4'b0001; opCodeA = 3'b001; select = 2'b01; #5;
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A = 4'b1111; B = 4'b0001; opCodeA = 3'b001; select = 2'b11; #5;
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$finish;
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end
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endmodule
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