13 lines
171 B
Verilog
13 lines
171 B
Verilog
module halfsubtraction (
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input A, B,
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output Difference, Borrow
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);
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wire notA;
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xor xo1 (Difference, A, B);
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not a1 (notA, A);
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and an1 (Borrow, notA, B);
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endmodule
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