13 lines
187 B
Verilog
13 lines
187 B
Verilog
module andGate (
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input wire A_i,
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input wire B_i,
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output wire Y_o
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);
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wire nand_out;
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nand nand1 (nand_out, A_i, B_i);
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nand nand2 (Y_o, nand_out, nand_out);
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endmodule
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