54 lines
1.5 KiB
Plaintext
54 lines
1.5 KiB
Plaintext
[
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/fullAdder.v",
|
|
"InstLine" : 1,
|
|
"InstName" : "fullAdder",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/fullAdder.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "fullAdder",
|
|
"SubInsts" : [
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/fullAdder.v",
|
|
"InstLine" : 7,
|
|
"InstName" : "h0",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/halfAdder.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "halfAdder"
|
|
},
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/fullAdder.v",
|
|
"InstLine" : 8,
|
|
"InstName" : "h1",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/halfAdder.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "halfAdder"
|
|
}
|
|
]
|
|
},
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/mult2bit.v",
|
|
"InstLine" : 1,
|
|
"InstName" : "mult2bit",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/mult2bit.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "mult2bit",
|
|
"SubInsts" : [
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/mult2bit.v",
|
|
"InstLine" : 14,
|
|
"InstName" : "h0",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/halfAdder.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "halfAdder"
|
|
},
|
|
{
|
|
"InstFile" : "C:/cygwin64/home/koray/verilog/lab3/src/mult2bit.v",
|
|
"InstLine" : 15,
|
|
"InstName" : "h1",
|
|
"ModuleFile" : "C:/cygwin64/home/koray/verilog/lab3/src/halfAdder.v",
|
|
"ModuleLine" : 1,
|
|
"ModuleName" : "halfAdder"
|
|
}
|
|
]
|
|
}
|
|
] |