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verilog
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kaltinsoy
1cb96c9f9a
formatter test
2024-12-02 02:29:57 +03:00
bit3-ledTest
rearrangement
2024-12-01 02:01:08 +03:00
gowin
rearrangement
2024-12-01 02:01:08 +03:00
iverilog
formatter test
2024-12-02 02:29:57 +03:00
tests
rearrangement
2024-12-01 02:01:08 +03:00
S
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1.1
MiB
Languages
Verilog
99.2%
Shell
0.5%
Coq
0.3%