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nand2tetris

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k0rrluna
2024-12-10 01:25:05 +03:00
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commit c1d75786ef
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iverilog/nand2tetris/nands/xor/xorGate.v Normal file
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module xorGate (
input A_i,
input B_i,
output F_o
);
wire nand1_out, nand2_out, nand3_out;
nand nand1(nand1_out, A_i, B_i);
nand nand2(nand2_out, A_i, nand1_out);
nand nand3(nand3_out, B_i, nand1_out);
nand nand4(F_o, nand3_out, nand2_out);
endmodule