nand2tetris
This commit is contained in:
12
iverilog/nand2tetris/nands/and/andGate.v
Normal file
12
iverilog/nand2tetris/nands/and/andGate.v
Normal file
@ -0,0 +1,12 @@
|
||||
module andGate (
|
||||
input A_i,
|
||||
input B_i,
|
||||
output Y_o
|
||||
);
|
||||
|
||||
wire nand_out;
|
||||
|
||||
nand nand1 (nand_out, A_i, B_i);
|
||||
nand nand2 (Y_o, nand_out, nand_out);
|
||||
|
||||
endmodule
|
Reference in New Issue
Block a user