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binarytobcd

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This commit is contained in:
k0rrluna 2024-12-23 02:57:13 +03:00
parent c5af5cfeda
commit 2f91f173de
10 changed files with 5491 additions and 3351 deletions
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3151
project0.2/ALU
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6
project0.2/ALU.v
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@ -2,7 +2,7 @@ module ALU (
input [3:0] A, B, input [3:0] A, B,
input CarryIN, input CarryIN,
input [2:0] opCodeA, input [2:0] opCodeA,
output [7:0] Y, output [11:0] bcd,
output CarryOUT, overflow output CarryOUT, overflow
); );
@ -13,7 +13,7 @@ wire [3:0] add_Y, sub_Y;
wire [3:0] resultA, resultO, resultX, lUOutput1; wire [3:0] resultA, resultO, resultX, lUOutput1;
wire [3:0] aUtemp1, aUtemp2, lUOutput2; wire [3:0] aUtemp1, aUtemp2, lUOutput2;
wire [3:0] wireY, wireLA; wire [3:0] wireY, wireLA;
wire [7:0] opwireM, wireM; wire [7:0] opwireM, wireM, Y;
opCode opCd (.A(opCodeA), .opCode(opCode8)); opCode opCd (.A(opCodeA), .opCode(opCode8));
@ -73,5 +73,7 @@ or o36 (Y[5], 1'b0, wireM[5]);
or o37 (Y[6], 1'b0, wireM[6]); or o37 (Y[6], 1'b0, wireM[6]);
or o38 (Y[7], 1'b0, wireM[7]); or o38 (Y[7], 1'b0, wireM[7]);
BinaryToBCD btod1(.binary(Y), .bcd(bcd)); // WIRE Y BINARY!!!!
endmodule endmodule

4558
project0.2/ALU.vcd
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4
project0.2/ALUTB.v
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@ -3,16 +3,16 @@ module ALUTB ();
reg [3:0] A, B; reg [3:0] A, B;
reg CarryIN; reg CarryIN;
reg [2:0] opCodeA; reg [2:0] opCodeA;
wire [7:0] Y;
wire CarryOUT, overflow; wire CarryOUT, overflow;
wire [11:0] bcd;
ALU uut( ALU uut(
.A(A), .A(A),
.B(B), .B(B),
.CarryIN(CarryIN), .CarryIN(CarryIN),
.opCodeA(opCodeA), .opCodeA(opCodeA),
.Y(Y),
.CarryOUT(CarryOUT), .CarryOUT(CarryOUT),
.bcd(bcd),
.overflow(overflow) .overflow(overflow)
); );

79
project0.2/BinaryToBCD.v Normal file
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@ -0,0 +1,79 @@
module BinaryToBCD (
input [7:0] binary,
output [11:0] bcd
);
wire empty1, empty2;
wire [3:0] dab1, dab2, dab3, dab4, dab5;
and a111 (empty1, 1'b0, 1'b0);
and a000 (empty2, 1'b0, 1'b0);
and a222 (bcd[11], 1'b0, 1'b0);
and a223 (bcd[10], 1'b0, 1'b0);
dabble d1t (.A((empty1)),
.B(binary[7]),
.C(binary[6]),
.D(binary[5]),
.X(dab1[0]),
.Y(dab1[1]),
.Z(dab1[2]),
.E(dab1[3]));
dabble d2u (.A((dab1[1])),
.B(dab1[2]),
.C(dab1[3]),
.D(binary[4]),
.X(dab2[0]),
.Y(dab2[1]),
.Z(dab2[2]),
.E(dab2[3]));
dabble d3v (.A((dab2[1])),
.B(dab2[2]),
.C(dab2[3]),
.D(binary[3]),
.X(dab3[0]),
.Y(dab3[1]),
.Z(dab3[2]),
.E(dab3[3]));
dabble d4w (.A((empty2)),
.B(dab1[0]),
.C(dab2[0]),
.D(dab3[0]),
.X(bcd[9]),
.Y(dab4[1]),
.Z(dab4[2]),
.E(dab4[3]));
dabble d5x (.A((dab3[1])),
.B(dab3[2]),
.C(dab3[3]),
.D(binary[2]),
.X(dab5[0]),
.Y(dab5[1]),
.Z(dab5[2]),
.E(dab5[3]));
dabble d6y (.A((dab4[1])),
.B(dab4[2]),
.C(dab4[3]),
.D(dab5[0]),
.X(bcd[8]),
.Y(bcd[7]),
.Z(bcd[6]),
.E(bcd[5]));
dabble d7z (.A((dab5[1])),
.B(dab5[2]),
.C(dab5[3]),
.D(binary[1]),
.X(bcd[4]),
.Y(bcd[3]),
.Z(bcd[2]),
.E(bcd[1]));
or o1 (bcd[0], binary[0], 1'b0);
endmodule

568
project0.2/BinaryToBCD.vcd Normal file
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@ -0,0 +1,568 @@
$date
Mon Dec 23 02:48:47 2024
$end
$version
Icarus Verilog
$end
$timescale
1s
$end
$scope module BinaryToBCDTB $end
$var wire 12 ! bcd [11:0] $end
$var reg 8 " binary [7:0] $end
$scope module uut $end
$var wire 8 # binary [7:0] $end
$var wire 1 $ empty1 $end
$var wire 1 % empty2 $end
$var wire 4 & dab5 [3:0] $end
$var wire 4 ' dab4 [3:0] $end
$var wire 4 ( dab3 [3:0] $end
$var wire 4 ) dab2 [3:0] $end
$var wire 4 * dab1 [3:0] $end
$var wire 12 + bcd [11:0] $end
$scope module d1t $end
$var wire 1 $ A $end
$var wire 1 , B $end
$var wire 1 - C $end
$var wire 1 . D $end
$var wire 1 / E $end
$var wire 1 0 X $end
$var wire 1 1 Y $end
$var wire 1 2 Z $end
$var wire 1 3 nor1 $end
$var wire 1 4 nor2 $end
$var wire 1 5 nor3 $end
$var wire 1 6 or1 $end
$var wire 1 7 xor1 $end
$var wire 1 8 xor2 $end
$upscope $end
$scope module d2u $end
$var wire 1 9 A $end
$var wire 1 : B $end
$var wire 1 ; C $end
$var wire 1 < D $end
$var wire 1 = E $end
$var wire 1 > X $end
$var wire 1 ? Y $end
$var wire 1 @ Z $end
$var wire 1 A nor1 $end
$var wire 1 B nor2 $end
$var wire 1 C nor3 $end
$var wire 1 D or1 $end
$var wire 1 E xor1 $end
$var wire 1 F xor2 $end
$upscope $end
$scope module d3v $end
$var wire 1 G A $end
$var wire 1 H B $end
$var wire 1 I C $end
$var wire 1 J D $end
$var wire 1 K E $end
$var wire 1 L X $end
$var wire 1 M Y $end
$var wire 1 N Z $end
$var wire 1 O nor1 $end
$var wire 1 P nor2 $end
$var wire 1 Q nor3 $end
$var wire 1 R or1 $end
$var wire 1 S xor1 $end
$var wire 1 T xor2 $end
$upscope $end
$scope module d4w $end
$var wire 1 % A $end
$var wire 1 U B $end
$var wire 1 V C $end
$var wire 1 W D $end
$var wire 1 X E $end
$var wire 1 Y X $end
$var wire 1 Z Y $end
$var wire 1 [ Z $end
$var wire 1 \ nor1 $end
$var wire 1 ] nor2 $end
$var wire 1 ^ nor3 $end
$var wire 1 _ or1 $end
$var wire 1 ` xor1 $end
$var wire 1 a xor2 $end
$upscope $end
$scope module d5x $end
$var wire 1 b A $end
$var wire 1 c B $end
$var wire 1 d C $end
$var wire 1 e D $end
$var wire 1 f E $end
$var wire 1 g X $end
$var wire 1 h Y $end
$var wire 1 i Z $end
$var wire 1 j nor1 $end
$var wire 1 k nor2 $end
$var wire 1 l nor3 $end
$var wire 1 m or1 $end
$var wire 1 n xor1 $end
$var wire 1 o xor2 $end
$upscope $end
$scope module d6y $end
$var wire 1 p A $end
$var wire 1 q B $end
$var wire 1 r C $end
$var wire 1 s D $end
$var wire 1 t E $end
$var wire 1 u X $end
$var wire 1 v Y $end
$var wire 1 w Z $end
$var wire 1 x nor1 $end
$var wire 1 y nor2 $end
$var wire 1 z nor3 $end
$var wire 1 { or1 $end
$var wire 1 | xor1 $end
$var wire 1 } xor2 $end
$upscope $end
$scope module d7z $end
$var wire 1 ~ A $end
$var wire 1 !" B $end
$var wire 1 "" C $end
$var wire 1 #" D $end
$var wire 1 $" E $end
$var wire 1 %" X $end
$var wire 1 &" Y $end
$var wire 1 '" Z $end
$var wire 1 (" nor1 $end
$var wire 1 )" nor2 $end
$var wire 1 *" nor3 $end
$var wire 1 +" or1 $end
$var wire 1 ," xor1 $end
$var wire 1 -" xor2 $end
$upscope $end
$upscope $end
$upscope $end
$enddefinitions $end
#0
$dumpvars
0-"
0,"
1+"
0*"
1)"
1("
0'"
0&"
0%"
0$"
0#"
0""
0!"
0~
0}
0|
1{
0z
1y
1x
0w
0v
0u
0t
0s
0r
0q
0p
0o
0n
1m
0l
1k
1j
0i
0h
0g
0f
0e
0d
0c
0b
0a
0`
1_
0^
1]
1\
0[
0Z
0Y
0X
0W
0V
0U
0T
0S
1R
0Q
1P
1O
0N
0M
0L
0K
0J
0I
0H
0G
0F
0E
1D
0C
1B
1A
0@
0?
0>
0=
0<
0;
0:
09
08
07
16
05
14
13
02
01
00
0/
0.
0-
0,
b0 +
b0 *
b0 )
b0 (
b0z '
b0 &
0%
0$
b0 #
b0 "
b0 !
$end
#10
1%"
1*"
0("
1!"
0k
b100 &
1i
1o
0P
1d
0)"
1S
b1000 (
1K
1,"
b10000 !
b10000 +
0$"
1J
1#"
b1010 "
b1010 #
#20
0%"
1$"
0*"
0y
b1000010 !
b1000010 +
1w
1("
1}
0!"
0]
1r
1k
b0 &
0i
1`
b100z '
1X
0o
1W
0d
1L
b1 (
0K
1Q
0O
1H
0B
b100 )
1@
1F
04
1;
17
b1000 *
1/
1.
b101010 "
b101010 #
#30
1&"
0+"
1v
0,"
1y
0{
1~
0u
1h
0z
0m
0x
1q
1c
0'"
1[
1N
0w
0|
0t
1-"
1a
1T
1O
0}
0s
0""
1%"
0$"
1V
1I
0H
0]
0r
0g
0f
1*"
1>
1=
b1001 )
0@
0`
b10z '
0X
0l
0("
1C
0D
0W
0n
0j
0!"
0A
0L
0b
1k
b10 &
0i
1:
0Q
0M
0o
b1100 *
12
0P
1R
0d
18
0S
b100 (
0K
b10011001 !
b10011001 +
1-
0J
b1100011 "
b1100011 #
#40
1w
1n
1b
1M
1}
1u
0R
1r
1z
0v
1`
b110z '
1X
1!"
0y
1{
1G
1W
1i
1|
0t
1?
1L
1m
1s
1""
1%"
1Q
0j
1g
1f
1*"
0)"
0O
0c
1l
0("
1-"
19
0H
0N
0k
0~
0:
11
1F
0@
1T
1o
b1101 &
0h
0&"
0'"
02
14
06
0;
0D
0I
0d
0+"
03
08
07
b10 *
0/
0E
b11 )
0=
0S
b11 (
0K
0,"
b101010011 !
b101010011 +
1$"
1,
0-
0.
1<
1J
0#"
b10011001 "
b10011001 #
#50
0t
1{
1w
0y
1}
1%"
0|
0u
1r
1*"
0s
0z
1X
1o
0("
0g
1x
0_
0l
0q
0c
0`
1j
b100z '
0[
0N
1Y
0W
1d
0b
1a
1^
0L
1K
b1000 (
0M
0&"
1V
0I
0H
0\
0F
0Q
1R
1>
0=
0@
1U
1S
1O
0T
1C
1D
10
0G
0~
1!"
1:
1E
0A
15
b1 )
0?
0h
1i
1-"
1'"
12
09
04
16
0;
1m
1""
1+"
18
01
17
b101 *
0/
1n
b1100 &
1f
1,"
b1001010101 !
b1001010101 +
0$"
1-
1.
1e
1#"
b11111111 "
b11111111 #
#60

40
project0.2/BinaryToBCDTB.v Normal file
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@ -0,0 +1,40 @@
module BinaryToBCDTB;
// Testbench signals
reg [7:0] binary;
wire [11:0] bcd; // Output BCD
// Instantiate the BinaryToBCD module
BinaryToBCD uut (
.binary(binary),
.bcd(bcd)
);
// Testbench procedure
initial begin
$monitor("Time: %0t | Binary: %b | BCD: %b (Hundreds: %d, Tens: %d, Ones: %d)",
$time, binary, bcd, bcd[11:8], bcd[7:4], bcd[3:0]);
$dumpfile("BinaryToBCD.vcd");
$dumpvars;
// Test cases
binary = 8'b00000000; // Decimal: 0
#10;
binary = 8'b00001010; // Decimal: 10
#10;
binary = 8'b00101010; // Decimal: 42
#10;
binary = 8'b01100011; // Decimal: 99
#10;
binary = 8'b10011001; // Decimal: 153
#10;
binary = 8'b11111111; // Decimal: 255
#10;
// End simulation
$finish;
end
endmodule

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@ -0,0 +1,362 @@
#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x56140140d330 .scope module, "BinaryToBCDTB" "BinaryToBCDTB" 2 1;
.timescale 0 0;
v0x561401436a70_0 .net "bcd", 11 0, L_0x56140143cdd0; 1 drivers
v0x561401436b30_0 .var "binary", 7 0;
S_0x56140140a900 .scope module, "uut" "BinaryToBCD" 2 7, 3 1 0, S_0x56140140d330;
.timescale 0 0;
.port_info 0 /INPUT 8 "binary";
.port_info 1 /OUTPUT 12 "bcd";
L_0x7f952d86e018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x7f952d86e060 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x561401413c60 .functor AND 1, L_0x7f952d86e018, L_0x7f952d86e060, C4<1>, C4<1>;
L_0x7f952d86e0a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x7f952d86e0f0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x561401436c90 .functor AND 1, L_0x7f952d86e0a8, L_0x7f952d86e0f0, C4<1>, C4<1>;
L_0x7f952d86e138 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x7f952d86e180 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x561401436df0 .functor AND 1, L_0x7f952d86e138, L_0x7f952d86e180, C4<1>, C4<1>;
L_0x7f952d86e1c8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x7f952d86e210 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x561401436f80 .functor AND 1, L_0x7f952d86e1c8, L_0x7f952d86e210, C4<1>, C4<1>;
L_0x7f952d86e258 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>;
L_0x56140143d200 .functor OR 1, L_0x56140143d2c0, L_0x7f952d86e258, C4<0>, C4<0>;
v0x561401435620_0 .net/2u *"_ivl_0", 0 0, L_0x7f952d86e018; 1 drivers
v0x561401435720_0 .net/2u *"_ivl_10", 0 0, L_0x7f952d86e138; 1 drivers
v0x561401435800_0 .net/2u *"_ivl_12", 0 0, L_0x7f952d86e180; 1 drivers
v0x5614014358c0_0 .net *"_ivl_132", 0 0, L_0x56140143d200; 1 drivers
v0x5614014359a0_0 .net *"_ivl_136", 0 0, L_0x56140143d2c0; 1 drivers
v0x561401435a80_0 .net/2u *"_ivl_137", 0 0, L_0x7f952d86e258; 1 drivers
v0x561401435b60_0 .net *"_ivl_14", 0 0, L_0x561401436f80; 1 drivers
o0x7f952d8b8e48 .functor BUFZ 1, C4<z>; HiZ drive
; Elide local net with no drivers, v0x561401435c40_0 name=_ivl_141
v0x561401435d20_0 .net/2u *"_ivl_16", 0 0, L_0x7f952d86e1c8; 1 drivers
v0x561401435e90_0 .net/2u *"_ivl_18", 0 0, L_0x7f952d86e210; 1 drivers
v0x561401435f70_0 .net/2u *"_ivl_2", 0 0, L_0x7f952d86e060; 1 drivers
v0x561401436050_0 .net/2u *"_ivl_4", 0 0, L_0x7f952d86e0a8; 1 drivers
v0x561401436130_0 .net/2u *"_ivl_6", 0 0, L_0x7f952d86e0f0; 1 drivers
v0x561401436210_0 .net *"_ivl_8", 0 0, L_0x561401436df0; 1 drivers
v0x5614014362f0_0 .net "bcd", 11 0, L_0x56140143cdd0; alias, 1 drivers
v0x5614014363d0_0 .net "binary", 7 0, v0x561401436b30_0; 1 drivers
v0x5614014364b0_0 .net "dab1", 3 0, L_0x561401437c20; 1 drivers
v0x561401436590_0 .net "dab2", 3 0, L_0x561401438a60; 1 drivers
v0x561401436670_0 .net "dab3", 3 0, L_0x561401439840; 1 drivers
v0x561401436750_0 .net "dab4", 3 0, L_0x56140143d510; 1 drivers
v0x561401436830_0 .net "dab5", 3 0, L_0x56140143b080; 1 drivers
v0x561401436910_0 .net "empty1", 0 0, L_0x561401413c60; 1 drivers
v0x5614014369b0_0 .net "empty2", 0 0, L_0x561401436c90; 1 drivers
L_0x561401437960 .part v0x561401436b30_0, 7, 1;
L_0x561401437a50 .part v0x561401436b30_0, 6, 1;
L_0x561401437af0 .part v0x561401436b30_0, 5, 1;
L_0x561401437c20 .concat8 [ 1 1 1 1], L_0x561401437500, L_0x561401437670, L_0x5614014377d0, L_0x561401437840;
L_0x561401438630 .part L_0x561401437c20, 1, 1;
L_0x561401438760 .part L_0x561401437c20, 2, 1;
L_0x561401438840 .part L_0x561401437c20, 3, 1;
L_0x561401438970 .part v0x561401436b30_0, 4, 1;
L_0x561401438a60 .concat8 [ 1 1 1 1], L_0x5614014381d0, L_0x561401438340, L_0x5614014384a0, L_0x561401438510;
L_0x5614014393d0 .part L_0x561401438a60, 1, 1;
L_0x561401439560 .part L_0x561401438a60, 2, 1;
L_0x561401439600 .part L_0x561401438a60, 3, 1;
L_0x5614014397a0 .part v0x561401436b30_0, 3, 1;
L_0x561401439840 .concat8 [ 1 1 1 1], L_0x561401438fb0, L_0x5614014390e0, L_0x561401439240, L_0x5614014392b0;
L_0x56140143a190 .part L_0x561401437c20, 0, 1;
L_0x56140143a230 .part L_0x561401438a60, 0, 1;
L_0x56140143a360 .part L_0x561401439840, 0, 1;
L_0x56140143acc0 .part L_0x561401439840, 1, 1;
L_0x56140143ae90 .part L_0x561401439840, 2, 1;
L_0x56140143af30 .part L_0x561401439840, 3, 1;
L_0x56140143adf0 .part v0x561401436b30_0, 2, 1;
L_0x56140143b080 .concat8 [ 1 1 1 1], L_0x56140143a8a0, L_0x56140143a9d0, L_0x56140143ab30, L_0x56140143aba0;
L_0x56140143bac0 .part L_0x56140143d510, 1, 1;
L_0x56140143bbf0 .part L_0x56140143d510, 2, 1;
L_0x56140143bd60 .part L_0x56140143d510, 3, 1;
L_0x56140143be00 .part L_0x56140143b080, 0, 1;
L_0x56140143c840 .part L_0x56140143b080, 1, 1;
L_0x56140143c970 .part L_0x56140143b080, 2, 1;
L_0x56140143cb90 .part L_0x56140143b080, 3, 1;
L_0x56140143cc30 .part v0x561401436b30_0, 1, 1;
LS_0x56140143cdd0_0_0 .concat8 [ 1 1 1 1], L_0x56140143d200, L_0x56140143c720, L_0x56140143c6b0, L_0x56140143c550;
LS_0x56140143cdd0_0_4 .concat8 [ 1 1 1 1], L_0x56140143c420, L_0x56140143b9a0, L_0x56140143b930, L_0x56140143b7d0;
LS_0x56140143cdd0_0_8 .concat8 [ 1 1 1 1], L_0x56140143b6a0, L_0x561401439d70, L_0x561401436f80, L_0x561401436df0;
L_0x56140143cdd0 .concat8 [ 4 4 4 0], LS_0x56140143cdd0_0_0, LS_0x56140143cdd0_0_4, LS_0x56140143cdd0_0_8;
L_0x56140143d2c0 .part v0x561401436b30_0, 0, 1;
L_0x56140143d510 .concat [ 1 1 1 1], o0x7f952d8b8e48, L_0x561401439ea0, L_0x56140143a000, L_0x56140143a070;
S_0x561401408560 .scope module, "d1t" "dabble" 3 14, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x5614014370c0 .functor XOR 1, L_0x561401413c60, L_0x561401437af0, C4<0>, C4<0>;
L_0x561401437130 .functor NOR 1, L_0x561401413c60, L_0x561401437960, C4<0>, C4<0>;
L_0x561401437200 .functor XOR 1, L_0x561401413c60, L_0x561401437a50, C4<0>, C4<0>;
L_0x5614014372d0 .functor NOR 1, L_0x5614014370c0, L_0x561401437200, C4<0>, C4<0>;
L_0x5614014373f0 .functor NOR 1, L_0x5614014372d0, L_0x561401437130, C4<0>, C4<0>;
L_0x561401437500 .functor BUF 1, L_0x5614014373f0, C4<0>, C4<0>, C4<0>;
L_0x561401437600 .functor OR 1, L_0x5614014370c0, L_0x561401437130, C4<0>, C4<0>;
L_0x561401437670 .functor NOR 1, L_0x561401437600, L_0x561401437a50, C4<0>, C4<0>;
L_0x5614014377d0 .functor AND 1, L_0x561401437600, L_0x561401437200, C4<1>, C4<1>;
L_0x561401437840 .functor XOR 1, L_0x5614014373f0, L_0x561401437af0, C4<0>, C4<0>;
v0x56140140b5f0_0 .net "A", 0 0, L_0x561401413c60; alias, 1 drivers
v0x56140140b2e0_0 .net "B", 0 0, L_0x561401437960; 1 drivers
v0x56140140afa0_0 .net "C", 0 0, L_0x561401437a50; 1 drivers
v0x561401412b80_0 .net "D", 0 0, L_0x561401437af0; 1 drivers
v0x561401412e90_0 .net "E", 0 0, L_0x561401437840; 1 drivers
v0x5614014131a0_0 .net "X", 0 0, L_0x561401437500; 1 drivers
v0x561401413450_0 .net "Y", 0 0, L_0x561401437670; 1 drivers
v0x56140142f5e0_0 .net "Z", 0 0, L_0x5614014377d0; 1 drivers
v0x56140142f6a0_0 .net "nor1", 0 0, L_0x561401437130; 1 drivers
v0x56140142f760_0 .net "nor2", 0 0, L_0x5614014372d0; 1 drivers
v0x56140142f820_0 .net "nor3", 0 0, L_0x5614014373f0; 1 drivers
v0x56140142f8e0_0 .net "or1", 0 0, L_0x561401437600; 1 drivers
v0x56140142f9a0_0 .net "xor1", 0 0, L_0x5614014370c0; 1 drivers
v0x56140142fa60_0 .net "xor2", 0 0, L_0x561401437200; 1 drivers
S_0x56140142fc20 .scope module, "d2u" "dabble" 3 23, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x561401437de0 .functor XOR 1, L_0x561401438630, L_0x561401438970, C4<0>, C4<0>;
L_0x561401437e50 .functor NOR 1, L_0x561401438630, L_0x561401438760, C4<0>, C4<0>;
L_0x561401437f10 .functor XOR 1, L_0x561401438630, L_0x561401438840, C4<0>, C4<0>;
L_0x561401437f80 .functor NOR 1, L_0x561401437de0, L_0x561401437f10, C4<0>, C4<0>;
L_0x5614014380c0 .functor NOR 1, L_0x561401437f80, L_0x561401437e50, C4<0>, C4<0>;
L_0x5614014381d0 .functor BUF 1, L_0x5614014380c0, C4<0>, C4<0>, C4<0>;
L_0x5614014382d0 .functor OR 1, L_0x561401437de0, L_0x561401437e50, C4<0>, C4<0>;
L_0x561401438340 .functor NOR 1, L_0x5614014382d0, L_0x561401438840, C4<0>, C4<0>;
L_0x5614014384a0 .functor AND 1, L_0x5614014382d0, L_0x561401437f10, C4<1>, C4<1>;
L_0x561401438510 .functor XOR 1, L_0x5614014380c0, L_0x561401438970, C4<0>, C4<0>;
v0x56140142fef0_0 .net "A", 0 0, L_0x561401438630; 1 drivers
v0x56140142ffb0_0 .net "B", 0 0, L_0x561401438760; 1 drivers
v0x561401430070_0 .net "C", 0 0, L_0x561401438840; 1 drivers
v0x561401430110_0 .net "D", 0 0, L_0x561401438970; 1 drivers
v0x5614014301d0_0 .net "E", 0 0, L_0x561401438510; 1 drivers
v0x5614014302e0_0 .net "X", 0 0, L_0x5614014381d0; 1 drivers
v0x5614014303a0_0 .net "Y", 0 0, L_0x561401438340; 1 drivers
v0x561401430460_0 .net "Z", 0 0, L_0x5614014384a0; 1 drivers
v0x561401430520_0 .net "nor1", 0 0, L_0x561401437e50; 1 drivers
v0x5614014305e0_0 .net "nor2", 0 0, L_0x561401437f80; 1 drivers
v0x5614014306a0_0 .net "nor3", 0 0, L_0x5614014380c0; 1 drivers
v0x561401430760_0 .net "or1", 0 0, L_0x5614014382d0; 1 drivers
v0x561401430820_0 .net "xor1", 0 0, L_0x561401437de0; 1 drivers
v0x5614014308e0_0 .net "xor2", 0 0, L_0x561401437f10; 1 drivers
S_0x561401430aa0 .scope module, "d3v" "dabble" 3 32, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x561401438bf0 .functor XOR 1, L_0x5614014393d0, L_0x5614014397a0, C4<0>, C4<0>;
L_0x561401438c60 .functor NOR 1, L_0x5614014393d0, L_0x561401439560, C4<0>, C4<0>;
L_0x561401438d20 .functor XOR 1, L_0x5614014393d0, L_0x561401439600, C4<0>, C4<0>;
L_0x561401438d90 .functor NOR 1, L_0x561401438bf0, L_0x561401438d20, C4<0>, C4<0>;
L_0x561401438ea0 .functor NOR 1, L_0x561401438d90, L_0x561401438c60, C4<0>, C4<0>;
L_0x561401438fb0 .functor BUF 1, L_0x561401438ea0, C4<0>, C4<0>, C4<0>;
L_0x561401439070 .functor OR 1, L_0x561401438bf0, L_0x561401438c60, C4<0>, C4<0>;
L_0x5614014390e0 .functor NOR 1, L_0x561401439070, L_0x561401439600, C4<0>, C4<0>;
L_0x561401439240 .functor AND 1, L_0x561401439070, L_0x561401438d20, C4<1>, C4<1>;
L_0x5614014392b0 .functor XOR 1, L_0x561401438ea0, L_0x5614014397a0, C4<0>, C4<0>;
v0x561401430d50_0 .net "A", 0 0, L_0x5614014393d0; 1 drivers
v0x561401430e10_0 .net "B", 0 0, L_0x561401439560; 1 drivers
v0x561401430ed0_0 .net "C", 0 0, L_0x561401439600; 1 drivers
v0x561401430f70_0 .net "D", 0 0, L_0x5614014397a0; 1 drivers
v0x561401431030_0 .net "E", 0 0, L_0x5614014392b0; 1 drivers
v0x561401431140_0 .net "X", 0 0, L_0x561401438fb0; 1 drivers
v0x561401431200_0 .net "Y", 0 0, L_0x5614014390e0; 1 drivers
v0x5614014312c0_0 .net "Z", 0 0, L_0x561401439240; 1 drivers
v0x561401431380_0 .net "nor1", 0 0, L_0x561401438c60; 1 drivers
v0x5614014314d0_0 .net "nor2", 0 0, L_0x561401438d90; 1 drivers
v0x561401431590_0 .net "nor3", 0 0, L_0x561401438ea0; 1 drivers
v0x561401431650_0 .net "or1", 0 0, L_0x561401439070; 1 drivers
v0x561401431710_0 .net "xor1", 0 0, L_0x561401438bf0; 1 drivers
v0x5614014317d0_0 .net "xor2", 0 0, L_0x561401438d20; 1 drivers
S_0x561401431990 .scope module, "d4w" "dabble" 3 41, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x561401439730 .functor XOR 1, L_0x561401436c90, L_0x56140143a360, C4<0>, C4<0>;
L_0x561401439a00 .functor NOR 1, L_0x561401436c90, L_0x56140143a190, C4<0>, C4<0>;
L_0x561401439b00 .functor XOR 1, L_0x561401436c90, L_0x56140143a230, C4<0>, C4<0>;
L_0x561401439b70 .functor NOR 1, L_0x561401439730, L_0x561401439b00, C4<0>, C4<0>;
L_0x561401439c60 .functor NOR 1, L_0x561401439b70, L_0x561401439a00, C4<0>, C4<0>;
L_0x561401439d70 .functor BUF 1, L_0x561401439c60, C4<0>, C4<0>, C4<0>;
L_0x561401439e30 .functor OR 1, L_0x561401439730, L_0x561401439a00, C4<0>, C4<0>;
L_0x561401439ea0 .functor NOR 1, L_0x561401439e30, L_0x56140143a230, C4<0>, C4<0>;
L_0x56140143a000 .functor AND 1, L_0x561401439e30, L_0x561401439b00, C4<1>, C4<1>;
L_0x56140143a070 .functor XOR 1, L_0x561401439c60, L_0x56140143a360, C4<0>, C4<0>;
v0x561401431c40_0 .net "A", 0 0, L_0x561401436c90; alias, 1 drivers
v0x561401431d20_0 .net "B", 0 0, L_0x56140143a190; 1 drivers
v0x561401431de0_0 .net "C", 0 0, L_0x56140143a230; 1 drivers
v0x561401431e80_0 .net "D", 0 0, L_0x56140143a360; 1 drivers
v0x561401431f40_0 .net "E", 0 0, L_0x56140143a070; 1 drivers
v0x561401432050_0 .net "X", 0 0, L_0x561401439d70; 1 drivers
v0x561401432110_0 .net "Y", 0 0, L_0x561401439ea0; 1 drivers
v0x5614014321d0_0 .net "Z", 0 0, L_0x56140143a000; 1 drivers
v0x561401432290_0 .net "nor1", 0 0, L_0x561401439a00; 1 drivers
v0x5614014323e0_0 .net "nor2", 0 0, L_0x561401439b70; 1 drivers
v0x5614014324a0_0 .net "nor3", 0 0, L_0x561401439c60; 1 drivers
v0x561401432560_0 .net "or1", 0 0, L_0x561401439e30; 1 drivers
v0x561401432620_0 .net "xor1", 0 0, L_0x561401439730; 1 drivers
v0x5614014326e0_0 .net "xor2", 0 0, L_0x561401439b00; 1 drivers
S_0x5614014328a0 .scope module, "d5x" "dabble" 3 50, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x56140143a450 .functor XOR 1, L_0x56140143acc0, L_0x56140143adf0, C4<0>, C4<0>;
L_0x56140143a4c0 .functor NOR 1, L_0x56140143acc0, L_0x56140143ae90, C4<0>, C4<0>;
L_0x56140143a580 .functor XOR 1, L_0x56140143acc0, L_0x56140143af30, C4<0>, C4<0>;
L_0x56140143a620 .functor NOR 1, L_0x56140143a450, L_0x56140143a580, C4<0>, C4<0>;
L_0x56140143a790 .functor NOR 1, L_0x56140143a620, L_0x56140143a4c0, C4<0>, C4<0>;
L_0x56140143a8a0 .functor BUF 1, L_0x56140143a790, C4<0>, C4<0>, C4<0>;
L_0x56140143a960 .functor OR 1, L_0x56140143a450, L_0x56140143a4c0, C4<0>, C4<0>;
L_0x56140143a9d0 .functor NOR 1, L_0x56140143a960, L_0x56140143af30, C4<0>, C4<0>;
L_0x56140143ab30 .functor AND 1, L_0x56140143a960, L_0x56140143a580, C4<1>, C4<1>;
L_0x56140143aba0 .functor XOR 1, L_0x56140143a790, L_0x56140143adf0, C4<0>, C4<0>;
v0x561401432ba0_0 .net "A", 0 0, L_0x56140143acc0; 1 drivers
v0x561401432c80_0 .net "B", 0 0, L_0x56140143ae90; 1 drivers
v0x561401432d40_0 .net "C", 0 0, L_0x56140143af30; 1 drivers
v0x561401432de0_0 .net "D", 0 0, L_0x56140143adf0; 1 drivers
v0x561401432ea0_0 .net "E", 0 0, L_0x56140143aba0; 1 drivers
v0x561401432fb0_0 .net "X", 0 0, L_0x56140143a8a0; 1 drivers
v0x561401433070_0 .net "Y", 0 0, L_0x56140143a9d0; 1 drivers
v0x561401433130_0 .net "Z", 0 0, L_0x56140143ab30; 1 drivers
v0x5614014331f0_0 .net "nor1", 0 0, L_0x56140143a4c0; 1 drivers
v0x561401433340_0 .net "nor2", 0 0, L_0x56140143a620; 1 drivers
v0x561401433400_0 .net "nor3", 0 0, L_0x56140143a790; 1 drivers
v0x5614014334c0_0 .net "or1", 0 0, L_0x56140143a960; 1 drivers
v0x561401433580_0 .net "xor1", 0 0, L_0x56140143a450; 1 drivers
v0x561401433640_0 .net "xor2", 0 0, L_0x56140143a580; 1 drivers
S_0x561401433800 .scope module, "d6y" "dabble" 3 59, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x56140143b280 .functor XOR 1, L_0x56140143bac0, L_0x56140143be00, C4<0>, C4<0>;
L_0x56140143b2f0 .functor NOR 1, L_0x56140143bac0, L_0x56140143bbf0, C4<0>, C4<0>;
L_0x56140143b3b0 .functor XOR 1, L_0x56140143bac0, L_0x56140143bd60, C4<0>, C4<0>;
L_0x56140143b420 .functor NOR 1, L_0x56140143b280, L_0x56140143b3b0, C4<0>, C4<0>;
L_0x56140143b590 .functor NOR 1, L_0x56140143b420, L_0x56140143b2f0, C4<0>, C4<0>;
L_0x56140143b6a0 .functor BUF 1, L_0x56140143b590, C4<0>, C4<0>, C4<0>;
L_0x56140143b760 .functor OR 1, L_0x56140143b280, L_0x56140143b2f0, C4<0>, C4<0>;
L_0x56140143b7d0 .functor NOR 1, L_0x56140143b760, L_0x56140143bd60, C4<0>, C4<0>;
L_0x56140143b930 .functor AND 1, L_0x56140143b760, L_0x56140143b3b0, C4<1>, C4<1>;
L_0x56140143b9a0 .functor XOR 1, L_0x56140143b590, L_0x56140143be00, C4<0>, C4<0>;
v0x561401433ab0_0 .net "A", 0 0, L_0x56140143bac0; 1 drivers
v0x561401433b90_0 .net "B", 0 0, L_0x56140143bbf0; 1 drivers
v0x561401433c50_0 .net "C", 0 0, L_0x56140143bd60; 1 drivers
v0x561401433cf0_0 .net "D", 0 0, L_0x56140143be00; 1 drivers
v0x561401433db0_0 .net "E", 0 0, L_0x56140143b9a0; 1 drivers
v0x561401433ec0_0 .net "X", 0 0, L_0x56140143b6a0; 1 drivers
v0x561401433f80_0 .net "Y", 0 0, L_0x56140143b7d0; 1 drivers
v0x561401434040_0 .net "Z", 0 0, L_0x56140143b930; 1 drivers
v0x561401434100_0 .net "nor1", 0 0, L_0x56140143b2f0; 1 drivers
v0x561401434250_0 .net "nor2", 0 0, L_0x56140143b420; 1 drivers
v0x561401434310_0 .net "nor3", 0 0, L_0x56140143b590; 1 drivers
v0x5614014343d0_0 .net "or1", 0 0, L_0x56140143b760; 1 drivers
v0x561401434490_0 .net "xor1", 0 0, L_0x56140143b280; 1 drivers
v0x561401434550_0 .net "xor2", 0 0, L_0x56140143b3b0; 1 drivers
S_0x561401434710 .scope module, "d7z" "dabble" 3 68, 4 1 0, S_0x56140140a900;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
L_0x56140143bfd0 .functor XOR 1, L_0x56140143c840, L_0x56140143cc30, C4<0>, C4<0>;
L_0x56140143c040 .functor NOR 1, L_0x56140143c840, L_0x56140143c970, C4<0>, C4<0>;
L_0x56140143c100 .functor XOR 1, L_0x56140143c840, L_0x56140143cb90, C4<0>, C4<0>;
L_0x56140143c1a0 .functor NOR 1, L_0x56140143bfd0, L_0x56140143c100, C4<0>, C4<0>;
L_0x56140143c310 .functor NOR 1, L_0x56140143c1a0, L_0x56140143c040, C4<0>, C4<0>;
L_0x56140143c420 .functor BUF 1, L_0x56140143c310, C4<0>, C4<0>, C4<0>;
L_0x56140143c4e0 .functor OR 1, L_0x56140143bfd0, L_0x56140143c040, C4<0>, C4<0>;
L_0x56140143c550 .functor NOR 1, L_0x56140143c4e0, L_0x56140143cb90, C4<0>, C4<0>;
L_0x56140143c6b0 .functor AND 1, L_0x56140143c4e0, L_0x56140143c100, C4<1>, C4<1>;
L_0x56140143c720 .functor XOR 1, L_0x56140143c310, L_0x56140143cc30, C4<0>, C4<0>;
v0x5614014349c0_0 .net "A", 0 0, L_0x56140143c840; 1 drivers
v0x561401434aa0_0 .net "B", 0 0, L_0x56140143c970; 1 drivers
v0x561401434b60_0 .net "C", 0 0, L_0x56140143cb90; 1 drivers
v0x561401434c00_0 .net "D", 0 0, L_0x56140143cc30; 1 drivers
v0x561401434cc0_0 .net "E", 0 0, L_0x56140143c720; 1 drivers
v0x561401434dd0_0 .net "X", 0 0, L_0x56140143c420; 1 drivers
v0x561401434e90_0 .net "Y", 0 0, L_0x56140143c550; 1 drivers
v0x561401434f50_0 .net "Z", 0 0, L_0x56140143c6b0; 1 drivers
v0x561401435010_0 .net "nor1", 0 0, L_0x56140143c040; 1 drivers
v0x561401435160_0 .net "nor2", 0 0, L_0x56140143c1a0; 1 drivers
v0x561401435220_0 .net "nor3", 0 0, L_0x56140143c310; 1 drivers
v0x5614014352e0_0 .net "or1", 0 0, L_0x56140143c4e0; 1 drivers
v0x5614014353a0_0 .net "xor1", 0 0, L_0x56140143bfd0; 1 drivers
v0x561401435460_0 .net "xor2", 0 0, L_0x56140143c100; 1 drivers
.scope S_0x56140140d330;
T_0 ;
%vpi_call 2 14 "$monitor", "Time: %0t | Binary: %b | BCD: %b (Hundreds: %d, Tens: %d, Ones: %d)", $time, v0x561401436b30_0, v0x561401436a70_0, &PV<v0x561401436a70_0, 8, 4>, &PV<v0x561401436a70_0, 4, 4>, &PV<v0x561401436a70_0, 0, 4> {0 0 0};
%vpi_call 2 16 "$dumpfile", "BinaryToBCD.vcd" {0 0 0};
%vpi_call 2 17 "$dumpvars" {0 0 0};
%pushi/vec4 0, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%pushi/vec4 10, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%pushi/vec4 42, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%pushi/vec4 99, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%pushi/vec4 153, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%pushi/vec4 255, 0, 8;
%store/vec4 v0x561401436b30_0, 0, 8;
%delay 10, 0;
%vpi_call 2 38 "$finish" {0 0 0};
%end;
.thread T_0;
# The file index is used to find the file name in the following table.
:file_names 5;
"N/A";
"<interactive>";
"BinaryToBCDTB.v";
"BinaryToBCD.v";
"dabble.v";

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#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x5621d16e7df0 .scope module, "dabble" "dabble" 2 1;
.timescale 0 0;
.port_info 0 /INPUT 1 "A";
.port_info 1 /INPUT 1 "B";
.port_info 2 /INPUT 1 "C";
.port_info 3 /INPUT 1 "D";
.port_info 4 /OUTPUT 1 "X";
.port_info 5 /OUTPUT 1 "Y";
.port_info 6 /OUTPUT 1 "Z";
.port_info 7 /OUTPUT 1 "E";
o0x7f27d282c018 .functor BUFZ 1, C4<z>; HiZ drive
o0x7f27d282c0a8 .functor BUFZ 1, C4<z>; HiZ drive
L_0x5621d1732e70 .functor XOR 1, o0x7f27d282c018, o0x7f27d282c0a8, C4<0>, C4<0>;
o0x7f27d282c048 .functor BUFZ 1, C4<z>; HiZ drive
L_0x5621d1732f60 .functor NOR 1, o0x7f27d282c018, o0x7f27d282c048, C4<0>, C4<0>;
o0x7f27d282c078 .functor BUFZ 1, C4<z>; HiZ drive
L_0x5621d1733000 .functor XOR 1, o0x7f27d282c018, o0x7f27d282c078, C4<0>, C4<0>;
L_0x5621d17330d0 .functor NOR 1, L_0x5621d1732e70, L_0x5621d1733000, C4<0>, C4<0>;
L_0x5621d1733240 .functor NOR 1, L_0x5621d17330d0, L_0x5621d1732f60, C4<0>, C4<0>;
L_0x5621d1733350 .functor BUF 1, L_0x5621d1733240, C4<0>, C4<0>, C4<0>;
L_0x5621d1733450 .functor OR 1, L_0x5621d1732e70, L_0x5621d1732f60, C4<0>, C4<0>;
L_0x5621d17334c0 .functor NOR 1, L_0x5621d1733450, o0x7f27d282c078, C4<0>, C4<0>;
L_0x5621d1733620 .functor AND 1, L_0x5621d1733450, L_0x5621d1733000, C4<1>, C4<1>;
L_0x5621d1733690 .functor XOR 1, L_0x5621d1733240, o0x7f27d282c0a8, C4<0>, C4<0>;
v0x5621d16e8050_0 .net "A", 0 0, o0x7f27d282c018; 0 drivers
v0x5621d1732380_0 .net "B", 0 0, o0x7f27d282c048; 0 drivers
v0x5621d1732440_0 .net "C", 0 0, o0x7f27d282c078; 0 drivers
v0x5621d17324e0_0 .net "D", 0 0, o0x7f27d282c0a8; 0 drivers
v0x5621d17325a0_0 .net "E", 0 0, L_0x5621d1733690; 1 drivers
v0x5621d17326b0_0 .net "X", 0 0, L_0x5621d1733350; 1 drivers
v0x5621d1732770_0 .net "Y", 0 0, L_0x5621d17334c0; 1 drivers
v0x5621d1732830_0 .net "Z", 0 0, L_0x5621d1733620; 1 drivers
v0x5621d17328f0_0 .net "nor1", 0 0, L_0x5621d1732f60; 1 drivers
v0x5621d17329b0_0 .net "nor2", 0 0, L_0x5621d17330d0; 1 drivers
v0x5621d1732a70_0 .net "nor3", 0 0, L_0x5621d1733240; 1 drivers
v0x5621d1732b30_0 .net "or1", 0 0, L_0x5621d1733450; 1 drivers
v0x5621d1732bf0_0 .net "xor1", 0 0, L_0x5621d1732e70; 1 drivers
v0x5621d1732cb0_0 .net "xor2", 0 0, L_0x5621d1733000; 1 drivers
# The file index is used to find the file name in the following table.
:file_names 3;
"N/A";
"<interactive>";
"dabble.v";

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module dabble (
input A, B, C, D,
output X, Y, Z, E
);
wire xor1, nor1, xor2, nor2, nor3, or1;
xor xo1 (xor1, A, D);
nor no1 (nor1, A, B);
xor xo2 (xor2, A, C);
nor no2 (nor2, xor1, xor2);
nor no3 (nor3, nor2, nor1);
buf bu1 (X, nor3);
or o1 (or1, xor1, nor1);
nor no4 (Y, or1, C);
and an1 (Z, or1, xor2);
xor xo3 (E, nor3, D);
endmodule