bttnTB
This commit is contained in:
449
tangTest/mult.vcd
Normal file
449
tangTest/mult.vcd
Normal file
@ -0,0 +1,449 @@
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$date
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Sun Jan 19 14:35:11 2025
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$end
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$version
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Icarus Verilog
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$end
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$timescale
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1s
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$end
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$scope module multTB $end
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$var wire 8 ! Y [7:0] $end
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$var reg 4 " A [3:0] $end
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$var reg 4 # B [3:0] $end
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$scope module uut $end
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$var wire 4 $ A [3:0] $end
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$var wire 4 % B [3:0] $end
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$var wire 1 & overflow2 $end
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$var wire 1 ' overflow1 $end
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$var wire 1 ( overflow0 $end
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$var wire 4 ) b0 [3:0] $end
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$var wire 4 * a2 [3:0] $end
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$var wire 4 + a1 [3:0] $end
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$var wire 4 , a0 [3:0] $end
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$var wire 8 - Y [7:0] $end
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$var wire 5 . S2 [4:0] $end
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$var wire 5 / S1 [4:0] $end
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$var wire 5 0 S0 [4:0] $end
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$scope module add0 $end
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$var wire 4 1 A [3:0] $end
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$var wire 4 2 B [3:0] $end
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$var wire 1 3 CarryIN $end
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$var wire 1 ( overflow $end
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$var wire 4 4 Y [3:0] $end
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$var wire 1 5 CarryOUT $end
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$var wire 3 6 Carry4 [2:0] $end
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$scope module f0 $end
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$var wire 1 7 A $end
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$var wire 1 8 B $end
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$var wire 1 3 Carry $end
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$var wire 1 9 CarryO $end
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$var wire 1 : xor1 $end
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$var wire 1 ; and2 $end
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$var wire 1 < and1 $end
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$var wire 1 = Sum $end
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$scope module h1 $end
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$var wire 1 7 A $end
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$var wire 1 8 B $end
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$var wire 1 < Carry $end
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$var wire 1 : Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 : A $end
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$var wire 1 3 B $end
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$var wire 1 ; Carry $end
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$var wire 1 = Sum $end
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$upscope $end
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$upscope $end
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$scope module f1 $end
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$var wire 1 > A $end
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$var wire 1 ? B $end
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$var wire 1 @ Carry $end
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$var wire 1 A CarryO $end
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$var wire 1 B xor1 $end
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$var wire 1 C and2 $end
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$var wire 1 D and1 $end
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$var wire 1 E Sum $end
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$scope module h1 $end
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$var wire 1 > A $end
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$var wire 1 ? B $end
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$var wire 1 D Carry $end
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$var wire 1 B Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 B A $end
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$var wire 1 @ B $end
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$var wire 1 C Carry $end
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$var wire 1 E Sum $end
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$upscope $end
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$upscope $end
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$scope module f2 $end
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$var wire 1 F A $end
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$var wire 1 G B $end
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$var wire 1 H Carry $end
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$var wire 1 I CarryO $end
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$var wire 1 J xor1 $end
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$var wire 1 K and2 $end
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$var wire 1 L and1 $end
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$var wire 1 M Sum $end
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$scope module h1 $end
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$var wire 1 F A $end
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$var wire 1 G B $end
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$var wire 1 L Carry $end
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$var wire 1 J Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 J A $end
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$var wire 1 H B $end
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$var wire 1 K Carry $end
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$var wire 1 M Sum $end
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$upscope $end
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$upscope $end
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$scope module f3 $end
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$var wire 1 N A $end
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$var wire 1 O B $end
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$var wire 1 P Carry $end
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$var wire 1 5 CarryO $end
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$var wire 1 Q xor1 $end
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$var wire 1 R and2 $end
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$var wire 1 S and1 $end
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$var wire 1 T Sum $end
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$scope module h1 $end
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$var wire 1 N A $end
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$var wire 1 O B $end
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$var wire 1 S Carry $end
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$var wire 1 Q Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 Q A $end
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$var wire 1 P B $end
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$var wire 1 R Carry $end
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$var wire 1 T Sum $end
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$upscope $end
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$upscope $end
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$upscope $end
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$scope module add1 $end
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$var wire 4 U A [3:0] $end
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$var wire 4 V B [3:0] $end
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$var wire 1 W CarryIN $end
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$var wire 1 ' overflow $end
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$var wire 4 X Y [3:0] $end
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$var wire 1 Y CarryOUT $end
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$var wire 3 Z Carry4 [2:0] $end
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$scope module f0 $end
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$var wire 1 [ A $end
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$var wire 1 \ B $end
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$var wire 1 W Carry $end
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$var wire 1 ] CarryO $end
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$var wire 1 ^ xor1 $end
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$var wire 1 _ and2 $end
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$var wire 1 ` and1 $end
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$var wire 1 a Sum $end
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$scope module h1 $end
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$var wire 1 [ A $end
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$var wire 1 \ B $end
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$var wire 1 ` Carry $end
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$var wire 1 ^ Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 ^ A $end
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$var wire 1 W B $end
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$var wire 1 _ Carry $end
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$var wire 1 a Sum $end
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$upscope $end
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$upscope $end
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$scope module f1 $end
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$var wire 1 b A $end
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$var wire 1 c B $end
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$var wire 1 d Carry $end
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$var wire 1 e CarryO $end
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$var wire 1 f xor1 $end
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$var wire 1 g and2 $end
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$var wire 1 h and1 $end
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$var wire 1 i Sum $end
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$scope module h1 $end
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$var wire 1 b A $end
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$var wire 1 c B $end
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$var wire 1 h Carry $end
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$var wire 1 f Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 f A $end
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$var wire 1 d B $end
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$var wire 1 g Carry $end
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$var wire 1 i Sum $end
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$upscope $end
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$upscope $end
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$scope module f2 $end
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$var wire 1 j A $end
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$var wire 1 k B $end
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$var wire 1 l Carry $end
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$var wire 1 m CarryO $end
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$var wire 1 n xor1 $end
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$var wire 1 o and2 $end
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$var wire 1 p and1 $end
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$var wire 1 q Sum $end
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$scope module h1 $end
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$var wire 1 j A $end
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$var wire 1 k B $end
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$var wire 1 p Carry $end
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$var wire 1 n Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 n A $end
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$var wire 1 l B $end
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$var wire 1 o Carry $end
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$var wire 1 q Sum $end
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$upscope $end
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$upscope $end
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$scope module f3 $end
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$var wire 1 r A $end
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$var wire 1 s B $end
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$var wire 1 t Carry $end
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$var wire 1 Y CarryO $end
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$var wire 1 u xor1 $end
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$var wire 1 v and2 $end
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$var wire 1 w and1 $end
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$var wire 1 x Sum $end
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$scope module h1 $end
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$var wire 1 r A $end
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$var wire 1 s B $end
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$var wire 1 w Carry $end
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$var wire 1 u Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 u A $end
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$var wire 1 t B $end
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$var wire 1 v Carry $end
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$var wire 1 x Sum $end
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$upscope $end
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$upscope $end
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$upscope $end
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$scope module add2 $end
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$var wire 4 y A [3:0] $end
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$var wire 4 z B [3:0] $end
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$var wire 1 { CarryIN $end
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$var wire 1 & overflow $end
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$var wire 4 | Y [3:0] $end
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$var wire 1 } CarryOUT $end
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$var wire 3 ~ Carry4 [2:0] $end
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$scope module f0 $end
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$var wire 1 !" A $end
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$var wire 1 "" B $end
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$var wire 1 { Carry $end
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$var wire 1 #" CarryO $end
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$var wire 1 $" xor1 $end
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$var wire 1 %" and2 $end
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$var wire 1 &" and1 $end
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$var wire 1 '" Sum $end
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$scope module h1 $end
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$var wire 1 !" A $end
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$var wire 1 "" B $end
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$var wire 1 &" Carry $end
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$var wire 1 $" Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 $" A $end
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$var wire 1 { B $end
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$var wire 1 %" Carry $end
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$var wire 1 '" Sum $end
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$upscope $end
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$upscope $end
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$scope module f1 $end
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$var wire 1 (" A $end
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$var wire 1 )" B $end
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$var wire 1 *" Carry $end
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$var wire 1 +" CarryO $end
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$var wire 1 ," xor1 $end
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$var wire 1 -" and2 $end
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$var wire 1 ." and1 $end
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$var wire 1 /" Sum $end
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$scope module h1 $end
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$var wire 1 (" A $end
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$var wire 1 )" B $end
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$var wire 1 ." Carry $end
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$var wire 1 ," Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 ," A $end
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$var wire 1 *" B $end
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$var wire 1 -" Carry $end
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$var wire 1 /" Sum $end
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$upscope $end
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$upscope $end
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$scope module f2 $end
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$var wire 1 0" A $end
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$var wire 1 1" B $end
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$var wire 1 2" Carry $end
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$var wire 1 3" CarryO $end
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$var wire 1 4" xor1 $end
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$var wire 1 5" and2 $end
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$var wire 1 6" and1 $end
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$var wire 1 7" Sum $end
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$scope module h1 $end
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$var wire 1 0" A $end
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$var wire 1 1" B $end
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$var wire 1 6" Carry $end
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$var wire 1 4" Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 4" A $end
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$var wire 1 2" B $end
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$var wire 1 5" Carry $end
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$var wire 1 7" Sum $end
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$upscope $end
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$upscope $end
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$scope module f3 $end
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$var wire 1 8" A $end
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$var wire 1 9" B $end
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$var wire 1 :" Carry $end
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$var wire 1 } CarryO $end
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$var wire 1 ;" xor1 $end
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$var wire 1 <" and2 $end
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$var wire 1 =" and1 $end
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$var wire 1 >" Sum $end
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$scope module h1 $end
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$var wire 1 8" A $end
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$var wire 1 9" B $end
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$var wire 1 =" Carry $end
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$var wire 1 ;" Sum $end
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$upscope $end
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$scope module h2 $end
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$var wire 1 ;" A $end
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$var wire 1 :" B $end
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$var wire 1 <" Carry $end
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$var wire 1 >" Sum $end
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$upscope $end
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$upscope $end
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$upscope $end
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$upscope $end
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$upscope $end
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$enddefinitions $end
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#0
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$dumpvars
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1>"
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0="
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0<"
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1;"
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0:"
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09"
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18"
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07"
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06"
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05"
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04"
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03"
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02"
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01"
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00"
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0/"
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0."
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0-"
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0,"
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||||
0+"
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||||
0*"
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||||
0)"
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||||
0("
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||||
0'"
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||||
0&"
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||||
0%"
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||||
0$"
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0#"
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||||
0""
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0!"
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b0 ~
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0}
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||||
b1000 |
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||||
0{
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b0 z
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b1000 y
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0x
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0w
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0v
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||||
0u
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||||
0t
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0s
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||||
0r
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||||
0q
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||||
0p
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||||
0o
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||||
0n
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||||
0m
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||||
0l
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||||
0k
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||||
0j
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||||
0i
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||||
0h
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||||
0g
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||||
0f
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||||
0e
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||||
0d
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0c
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0b
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0a
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||||
0`
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0_
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||||
0^
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||||
0]
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||||
0\
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0[
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b0 Z
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||||
0Y
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||||
b0 X
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0W
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b0 V
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b0 U
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0T
|
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0S
|
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0R
|
||||
0Q
|
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0P
|
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0O
|
||||
0N
|
||||
0M
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||||
0L
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||||
0K
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||||
0J
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||||
0I
|
||||
0H
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||||
0G
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||||
0F
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||||
0E
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||||
0D
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||||
0C
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||||
0B
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||||
0A
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||||
0@
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||||
0?
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||||
0>
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||||
0=
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||||
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||||
0;
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||||
0:
|
||||
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|
||||
08
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||||
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||||
b0 6
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||||
05
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||||
b0 4
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||||
03
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||||
b0 2
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||||
b0 1
|
||||
b0 0
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||||
b0 /
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||||
b1000 .
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||||
b1000000 -
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||||
b0 ,
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||||
b0 +
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||||
b1000 *
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||||
b0 )
|
||||
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||||
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|
||||
0&
|
||||
b1000 %
|
||||
b1000 $
|
||||
b1000 #
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||||
b1000 "
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||||
b1000000 !
|
||||
$end
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#5
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Reference in New Issue
Block a user