Fix Verilog syntax highlighting

2025-01-23 07:15:21 +03:00
parent 4cae830727
commit 5b3ff5bf91
1 changed files with 3 additions and 1 deletions
--- a/.gitattributes
+++ b/.gitattributes
@ -1 +1,3 @@
-*.v   linguist-language=verilog
+*.v linguist-language=Verilog
+*.sv linguist-language=SystemVerilog
+