21 lines
437 B
JSON
21 lines
437 B
JSON
{
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"Device" : "GW2A-18C",
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"Files" : [
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{
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"Path" : "C:/cygwin64/home/koray/verilog/lab3/src/Adder3Bit.v",
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"Type" : "verilog"
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},
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{
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"Path" : "C:/cygwin64/home/koray/verilog/lab3/src/tbAdder3Bit.v",
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"Type" : "verilog"
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}
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],
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"IncludePath" : [
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],
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"LoopLimit" : 2000,
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"ResultFile" : "C:/cygwin64/home/koray/verilog/lab3/impl/temp/rtl_parser.result",
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"Top" : "",
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"VerilogStd" : "verilog_2001",
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"VhdlStd" : "vhdl_93"
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} |