88 lines
2.4 KiB
JSON
88 lines
2.4 KiB
JSON
{
|
|
"BACKGROUND_PROGRAMMING" : "off",
|
|
"COMPRESS" : false,
|
|
"CPU" : false,
|
|
"CRC_CHECK" : true,
|
|
"Clock_Route_Order" : 0,
|
|
"Correct_Hold_Violation" : true,
|
|
"DONE" : false,
|
|
"DOWNLOAD_SPEED" : "default",
|
|
"Disable_Insert_Pad" : false,
|
|
"ENABLE_CTP" : false,
|
|
"ENABLE_MERGE_MODE" : false,
|
|
"ENCRYPTION_KEY" : false,
|
|
"ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000",
|
|
"ERROR_DECTION_AND_CORRECTION" : false,
|
|
"ERROR_DECTION_ONLY" : false,
|
|
"ERROR_INJECTION" : false,
|
|
"EXTERNAL_MASTER_CONFIG_CLOCK" : false,
|
|
"Enable_DSRM" : false,
|
|
"FORMAT" : "binary",
|
|
"FREQUENCY_DIVIDER" : "",
|
|
"Generate_Constraint_File_of_Ports" : false,
|
|
"Generate_IBIS_File" : false,
|
|
"Generate_Plain_Text_Timing_Report" : false,
|
|
"Generate_Post_PNR_Simulation_Model_File" : false,
|
|
"Generate_Post_Place_File" : false,
|
|
"Generate_SDF_File" : false,
|
|
"Generate_VHDL_Post_PNR_Simulation_Model_File" : false,
|
|
"Global_Freq" : "default",
|
|
"GwSyn_Loop_Limit" : 2000,
|
|
"HOTBOOT" : false,
|
|
"I2C" : false,
|
|
"I2C_SLAVE_ADDR" : "00",
|
|
"IncludePath" : [
|
|
|
|
],
|
|
"Incremental_Compile" : "",
|
|
"Initialize_Primitives" : false,
|
|
"JTAG" : false,
|
|
"MODE_IO" : false,
|
|
"MSPI" : false,
|
|
"MSPI_JUMP" : false,
|
|
"MULTIBOOT_ADDRESS_WIDTH" : "24",
|
|
"MULTIBOOT_MODE" : "Normal",
|
|
"MULTIBOOT_SPI_FLASH_ADDRESS" : "00000000",
|
|
"MULTIJUMP_ADDRESS_WIDTH" : "24",
|
|
"MULTIJUMP_MODE" : "Normal",
|
|
"MULTIJUMP_SPI_FLASH_ADDRESS" : "000000",
|
|
"Multi_Boot" : true,
|
|
"OUTPUT_BASE_NAME" : "lab3",
|
|
"POWER_ON_RESET_MONITOR" : true,
|
|
"PRINT_BSRAM_VALUE" : true,
|
|
"PROGRAM_DONE_BYPASS" : false,
|
|
"PlaceInRegToIob" : true,
|
|
"PlaceIoRegToIob" : true,
|
|
"PlaceOutRegToIob" : true,
|
|
"Place_Option" : "0",
|
|
"Process_Configuration_Verion" : "1.0",
|
|
"Promote_Physical_Constraint_Warning_to_Error" : true,
|
|
"READY" : false,
|
|
"RECONFIG_N" : false,
|
|
"Ram_RW_Check" : false,
|
|
"Replicate_Resources" : false,
|
|
"Report_Auto-Placed_Io_Information" : false,
|
|
"Route_Maxfan" : 23,
|
|
"Route_Option" : "0",
|
|
"Run_Timing_Driven" : true,
|
|
"SECURE_MODE" : false,
|
|
"SECURITY_BIT" : true,
|
|
"SEU_HANDLER" : false,
|
|
"SEU_HANDLER_CHECKSUM" : false,
|
|
"SEU_HANDLER_MODE" : "auto",
|
|
"SSPI" : false,
|
|
"STOP_SEU_HANDLER" : false,
|
|
"Show_All_Warnings" : false,
|
|
"Synthesize_tool" : "GowinSyn",
|
|
"TclPre" : "",
|
|
"TopModule" : "",
|
|
"USERCODE" : "default",
|
|
"Unused_Pin" : "As_input_tri_stated_with_pull_up",
|
|
"VCCAUX" : 3.3,
|
|
"VCCX" : "3.3",
|
|
"VHDL_Standard" : "VHDL_Std_1993",
|
|
"Verilog_Standard" : "Vlg_Std_2001",
|
|
"WAKE_UP" : "0",
|
|
"show_all_warnings" : false,
|
|
"turn_off_bg" : false
|
|
} |