2024-12-10 01:25:05 +03:00

290 lines
14 KiB
Plaintext

#! /usr/bin/vvp
:ivl_version "11.0 (stable)";
:ivl_delay_selection "TYPICAL";
:vpi_time_precision + 0;
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi";
:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi";
S_0x5603be4ff5a0 .scope module, "andSixTGateTB" "andSixTGateTB" 2 1;
.timescale 0 0;
v0x5603be521e40_0 .var "A_i", 15 0;
v0x5603be521f30_0 .var "B_i", 15 0;
v0x5603be522000_0 .net "Y_o", 15 0, L_0x5603be5261b0; 1 drivers
S_0x5603be4fe770 .scope module, "uut" "andSixTGate" 2 6, 3 1 0, S_0x5603be4ff5a0;
.timescale 0 0;
.port_info 0 /INPUT 16 "A_i";
.port_info 1 /INPUT 16 "B_i";
.port_info 2 /OUTPUT 16 "Y_o";
v0x5603be521b10_0 .net "A_i", 15 0, v0x5603be521e40_0; 1 drivers
v0x5603be521bf0_0 .net "B_i", 15 0, v0x5603be521f30_0; 1 drivers
v0x5603be521cd0_0 .net "Y_o", 15 0, L_0x5603be5261b0; alias, 1 drivers
L_0x5603be5222f0 .part v0x5603be521e40_0, 0, 1;
L_0x5603be522430 .part v0x5603be521f30_0, 0, 1;
L_0x5603be5226a0 .part v0x5603be521e40_0, 1, 1;
L_0x5603be522790 .part v0x5603be521f30_0, 1, 1;
L_0x5603be5229e0 .part v0x5603be521e40_0, 2, 1;
L_0x5603be522ad0 .part v0x5603be521f30_0, 2, 1;
L_0x5603be522d20 .part v0x5603be521e40_0, 3, 1;
L_0x5603be522e10 .part v0x5603be521f30_0, 3, 1;
L_0x5603be5230b0 .part v0x5603be521e40_0, 4, 1;
L_0x5603be5231a0 .part v0x5603be521f30_0, 4, 1;
L_0x5603be523400 .part v0x5603be521e40_0, 5, 1;
L_0x5603be5234f0 .part v0x5603be521f30_0, 5, 1;
L_0x5603be5237b0 .part v0x5603be521e40_0, 6, 1;
L_0x5603be5238a0 .part v0x5603be521f30_0, 6, 1;
L_0x5603be523b00 .part v0x5603be521e40_0, 7, 1;
L_0x5603be523bf0 .part v0x5603be521f30_0, 7, 1;
L_0x5603be523ed0 .part v0x5603be521e40_0, 8, 1;
L_0x5603be523fc0 .part v0x5603be521f30_0, 8, 1;
L_0x5603be5242b0 .part v0x5603be521e40_0, 9, 1;
L_0x5603be5243a0 .part v0x5603be521f30_0, 9, 1;
L_0x5603be5240b0 .part v0x5603be521e40_0, 10, 1;
L_0x5603be5246f0 .part v0x5603be521f30_0, 10, 1;
L_0x5603be524a00 .part v0x5603be521e40_0, 11, 1;
L_0x5603be524af0 .part v0x5603be521f30_0, 11, 1;
L_0x5603be524e10 .part v0x5603be521e40_0, 12, 1;
L_0x5603be524f00 .part v0x5603be521f30_0, 12, 1;
L_0x5603be525230 .part v0x5603be521e40_0, 13, 1;
L_0x5603be525320 .part v0x5603be521f30_0, 13, 1;
L_0x5603be525660 .part v0x5603be521e40_0, 14, 1;
L_0x5603be525960 .part v0x5603be521f30_0, 14, 1;
L_0x5603be525ec0 .part v0x5603be521e40_0, 15, 1;
L_0x5603be525fb0 .part v0x5603be521f30_0, 15, 1;
LS_0x5603be5261b0_0_0 .concat8 [ 1 1 1 1], L_0x5603be522200, L_0x5603be5225e0, L_0x5603be522920, L_0x5603be522cb0;
LS_0x5603be5261b0_0_4 .concat8 [ 1 1 1 1], L_0x5603be522fc0, L_0x5603be523360, L_0x5603be5236c0, L_0x5603be523a10;
LS_0x5603be5261b0_0_8 .concat8 [ 1 1 1 1], L_0x5603be523de0, L_0x5603be5241c0, L_0x5603be5245b0, L_0x5603be524910;
LS_0x5603be5261b0_0_12 .concat8 [ 1 1 1 1], L_0x5603be524d20, L_0x5603be525140, L_0x5603be525570, L_0x5603be525dd0;
L_0x5603be5261b0 .concat8 [ 4 4 4 4], LS_0x5603be5261b0_0_0, LS_0x5603be5261b0_0_4, LS_0x5603be5261b0_0_8, LS_0x5603be5261b0_0_12;
S_0x5603be4fd940 .scope module, "a0" "andGate" 3 7, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be522100 .functor NAND 1, L_0x5603be5222f0, L_0x5603be522430, C4<1>, C4<1>;
L_0x5603be522200 .functor NAND 1, L_0x5603be522100, L_0x5603be522100, C4<1>, C4<1>;
v0x5603be4ec5f0_0 .net "A_i", 0 0, L_0x5603be5222f0; 1 drivers
v0x5603be4eb7c0_0 .net "B_i", 0 0, L_0x5603be522430; 1 drivers
v0x5603be4ea990_0 .net "Y_o", 0 0, L_0x5603be522200; 1 drivers
v0x5603be4e9b60_0 .net "nand_out", 0 0, L_0x5603be522100; 1 drivers
S_0x5603be51c5b0 .scope module, "a1" "andGate" 3 8, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be522570 .functor NAND 1, L_0x5603be5226a0, L_0x5603be522790, C4<1>, C4<1>;
L_0x5603be5225e0 .functor NAND 1, L_0x5603be522570, L_0x5603be522570, C4<1>, C4<1>;
v0x5603be4e8d30_0 .net "A_i", 0 0, L_0x5603be5226a0; 1 drivers
v0x5603be4e7f00_0 .net "B_i", 0 0, L_0x5603be522790; 1 drivers
v0x5603be4e70a0_0 .net "Y_o", 0 0, L_0x5603be5225e0; 1 drivers
v0x5603be51c840_0 .net "nand_out", 0 0, L_0x5603be522570; 1 drivers
S_0x5603be51c980 .scope module, "a10" "andGate" 3 17, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be524540 .functor NAND 1, L_0x5603be5240b0, L_0x5603be5246f0, C4<1>, C4<1>;
L_0x5603be5245b0 .functor NAND 1, L_0x5603be524540, L_0x5603be524540, C4<1>, C4<1>;
v0x5603be51cbb0_0 .net "A_i", 0 0, L_0x5603be5240b0; 1 drivers
v0x5603be51cc70_0 .net "B_i", 0 0, L_0x5603be5246f0; 1 drivers
v0x5603be51cd30_0 .net "Y_o", 0 0, L_0x5603be5245b0; 1 drivers
v0x5603be51cdd0_0 .net "nand_out", 0 0, L_0x5603be524540; 1 drivers
S_0x5603be51cf10 .scope module, "a11" "andGate" 3 18, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be5248a0 .functor NAND 1, L_0x5603be524a00, L_0x5603be524af0, C4<1>, C4<1>;
L_0x5603be524910 .functor NAND 1, L_0x5603be5248a0, L_0x5603be5248a0, C4<1>, C4<1>;
v0x5603be51d140_0 .net "A_i", 0 0, L_0x5603be524a00; 1 drivers
v0x5603be51d220_0 .net "B_i", 0 0, L_0x5603be524af0; 1 drivers
v0x5603be51d2e0_0 .net "Y_o", 0 0, L_0x5603be524910; 1 drivers
v0x5603be51d380_0 .net "nand_out", 0 0, L_0x5603be5248a0; 1 drivers
S_0x5603be51d4c0 .scope module, "a12" "andGate" 3 19, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be524cb0 .functor NAND 1, L_0x5603be524e10, L_0x5603be524f00, C4<1>, C4<1>;
L_0x5603be524d20 .functor NAND 1, L_0x5603be524cb0, L_0x5603be524cb0, C4<1>, C4<1>;
v0x5603be51d740_0 .net "A_i", 0 0, L_0x5603be524e10; 1 drivers
v0x5603be51d820_0 .net "B_i", 0 0, L_0x5603be524f00; 1 drivers
v0x5603be51d8e0_0 .net "Y_o", 0 0, L_0x5603be524d20; 1 drivers
v0x5603be51d980_0 .net "nand_out", 0 0, L_0x5603be524cb0; 1 drivers
S_0x5603be51dac0 .scope module, "a13" "andGate" 3 20, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be5250d0 .functor NAND 1, L_0x5603be525230, L_0x5603be525320, C4<1>, C4<1>;
L_0x5603be525140 .functor NAND 1, L_0x5603be5250d0, L_0x5603be5250d0, C4<1>, C4<1>;
v0x5603be51dcf0_0 .net "A_i", 0 0, L_0x5603be525230; 1 drivers
v0x5603be51ddd0_0 .net "B_i", 0 0, L_0x5603be525320; 1 drivers
v0x5603be51de90_0 .net "Y_o", 0 0, L_0x5603be525140; 1 drivers
v0x5603be51df60_0 .net "nand_out", 0 0, L_0x5603be5250d0; 1 drivers
S_0x5603be51e0a0 .scope module, "a14" "andGate" 3 21, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be525500 .functor NAND 1, L_0x5603be525660, L_0x5603be525960, C4<1>, C4<1>;
L_0x5603be525570 .functor NAND 1, L_0x5603be525500, L_0x5603be525500, C4<1>, C4<1>;
v0x5603be51e2d0_0 .net "A_i", 0 0, L_0x5603be525660; 1 drivers
v0x5603be51e3b0_0 .net "B_i", 0 0, L_0x5603be525960; 1 drivers
v0x5603be51e470_0 .net "Y_o", 0 0, L_0x5603be525570; 1 drivers
v0x5603be51e540_0 .net "nand_out", 0 0, L_0x5603be525500; 1 drivers
S_0x5603be51e680 .scope module, "a15" "andGate" 3 22, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be525d60 .functor NAND 1, L_0x5603be525ec0, L_0x5603be525fb0, C4<1>, C4<1>;
L_0x5603be525dd0 .functor NAND 1, L_0x5603be525d60, L_0x5603be525d60, C4<1>, C4<1>;
v0x5603be51e8b0_0 .net "A_i", 0 0, L_0x5603be525ec0; 1 drivers
v0x5603be51e990_0 .net "B_i", 0 0, L_0x5603be525fb0; 1 drivers
v0x5603be51ea50_0 .net "Y_o", 0 0, L_0x5603be525dd0; 1 drivers
v0x5603be51eb20_0 .net "nand_out", 0 0, L_0x5603be525d60; 1 drivers
S_0x5603be51ec60 .scope module, "a2" "andGate" 3 9, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be5228b0 .functor NAND 1, L_0x5603be5229e0, L_0x5603be522ad0, C4<1>, C4<1>;
L_0x5603be522920 .functor NAND 1, L_0x5603be5228b0, L_0x5603be5228b0, C4<1>, C4<1>;
v0x5603be51ee40_0 .net "A_i", 0 0, L_0x5603be5229e0; 1 drivers
v0x5603be51ef20_0 .net "B_i", 0 0, L_0x5603be522ad0; 1 drivers
v0x5603be51efe0_0 .net "Y_o", 0 0, L_0x5603be522920; 1 drivers
v0x5603be51f0b0_0 .net "nand_out", 0 0, L_0x5603be5228b0; 1 drivers
S_0x5603be51f1f0 .scope module, "a3" "andGate" 3 10, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be522c40 .functor NAND 1, L_0x5603be522d20, L_0x5603be522e10, C4<1>, C4<1>;
L_0x5603be522cb0 .functor NAND 1, L_0x5603be522c40, L_0x5603be522c40, C4<1>, C4<1>;
v0x5603be51f420_0 .net "A_i", 0 0, L_0x5603be522d20; 1 drivers
v0x5603be51f500_0 .net "B_i", 0 0, L_0x5603be522e10; 1 drivers
v0x5603be51f5c0_0 .net "Y_o", 0 0, L_0x5603be522cb0; 1 drivers
v0x5603be51f690_0 .net "nand_out", 0 0, L_0x5603be522c40; 1 drivers
S_0x5603be51f7d0 .scope module, "a4" "andGate" 3 11, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be522f50 .functor NAND 1, L_0x5603be5230b0, L_0x5603be5231a0, C4<1>, C4<1>;
L_0x5603be522fc0 .functor NAND 1, L_0x5603be522f50, L_0x5603be522f50, C4<1>, C4<1>;
v0x5603be51fa00_0 .net "A_i", 0 0, L_0x5603be5230b0; 1 drivers
v0x5603be51fae0_0 .net "B_i", 0 0, L_0x5603be5231a0; 1 drivers
v0x5603be51fba0_0 .net "Y_o", 0 0, L_0x5603be522fc0; 1 drivers
v0x5603be51fc70_0 .net "nand_out", 0 0, L_0x5603be522f50; 1 drivers
S_0x5603be51fdb0 .scope module, "a5" "andGate" 3 12, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be5232f0 .functor NAND 1, L_0x5603be523400, L_0x5603be5234f0, C4<1>, C4<1>;
L_0x5603be523360 .functor NAND 1, L_0x5603be5232f0, L_0x5603be5232f0, C4<1>, C4<1>;
v0x5603be51ffe0_0 .net "A_i", 0 0, L_0x5603be523400; 1 drivers
v0x5603be5200c0_0 .net "B_i", 0 0, L_0x5603be5234f0; 1 drivers
v0x5603be520180_0 .net "Y_o", 0 0, L_0x5603be523360; 1 drivers
v0x5603be520250_0 .net "nand_out", 0 0, L_0x5603be5232f0; 1 drivers
S_0x5603be520390 .scope module, "a6" "andGate" 3 13, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be523650 .functor NAND 1, L_0x5603be5237b0, L_0x5603be5238a0, C4<1>, C4<1>;
L_0x5603be5236c0 .functor NAND 1, L_0x5603be523650, L_0x5603be523650, C4<1>, C4<1>;
v0x5603be5205c0_0 .net "A_i", 0 0, L_0x5603be5237b0; 1 drivers
v0x5603be5206a0_0 .net "B_i", 0 0, L_0x5603be5238a0; 1 drivers
v0x5603be520760_0 .net "Y_o", 0 0, L_0x5603be5236c0; 1 drivers
v0x5603be520830_0 .net "nand_out", 0 0, L_0x5603be523650; 1 drivers
S_0x5603be520970 .scope module, "a7" "andGate" 3 14, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be5235e0 .functor NAND 1, L_0x5603be523b00, L_0x5603be523bf0, C4<1>, C4<1>;
L_0x5603be523a10 .functor NAND 1, L_0x5603be5235e0, L_0x5603be5235e0, C4<1>, C4<1>;
v0x5603be520ba0_0 .net "A_i", 0 0, L_0x5603be523b00; 1 drivers
v0x5603be520c80_0 .net "B_i", 0 0, L_0x5603be523bf0; 1 drivers
v0x5603be520d40_0 .net "Y_o", 0 0, L_0x5603be523a10; 1 drivers
v0x5603be520e10_0 .net "nand_out", 0 0, L_0x5603be5235e0; 1 drivers
S_0x5603be520f50 .scope module, "a8" "andGate" 3 15, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be523d70 .functor NAND 1, L_0x5603be523ed0, L_0x5603be523fc0, C4<1>, C4<1>;
L_0x5603be523de0 .functor NAND 1, L_0x5603be523d70, L_0x5603be523d70, C4<1>, C4<1>;
v0x5603be521180_0 .net "A_i", 0 0, L_0x5603be523ed0; 1 drivers
v0x5603be521260_0 .net "B_i", 0 0, L_0x5603be523fc0; 1 drivers
v0x5603be521320_0 .net "Y_o", 0 0, L_0x5603be523de0; 1 drivers
v0x5603be5213f0_0 .net "nand_out", 0 0, L_0x5603be523d70; 1 drivers
S_0x5603be521530 .scope module, "a9" "andGate" 3 16, 4 1 0, S_0x5603be4fe770;
.timescale 0 0;
.port_info 0 /INPUT 1 "A_i";
.port_info 1 /INPUT 1 "B_i";
.port_info 2 /OUTPUT 1 "Y_o";
L_0x5603be524150 .functor NAND 1, L_0x5603be5242b0, L_0x5603be5243a0, C4<1>, C4<1>;
L_0x5603be5241c0 .functor NAND 1, L_0x5603be524150, L_0x5603be524150, C4<1>, C4<1>;
v0x5603be521760_0 .net "A_i", 0 0, L_0x5603be5242b0; 1 drivers
v0x5603be521840_0 .net "B_i", 0 0, L_0x5603be5243a0; 1 drivers
v0x5603be521900_0 .net "Y_o", 0 0, L_0x5603be5241c0; 1 drivers
v0x5603be5219d0_0 .net "nand_out", 0 0, L_0x5603be524150; 1 drivers
.scope S_0x5603be4ff5a0;
T_0 ;
%vpi_call 2 13 "$dumpfile", "andSixTGate.vcd" {0 0 0};
%vpi_call 2 14 "$dumpvars" {0 0 0};
%pushi/vec4 0, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 0, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 0, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 1, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 1, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 1, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 64, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 0, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 64, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 64, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 0, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 512, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 512, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 512, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%pushi/vec4 65535, 0, 16;
%store/vec4 v0x5603be521e40_0, 0, 16;
%pushi/vec4 65535, 0, 16;
%store/vec4 v0x5603be521f30_0, 0, 16;
%delay 10, 0;
%vpi_call 2 23 "$finish" {0 0 0};
%end;
.thread T_0;
# The file index is used to find the file name in the following table.
:file_names 5;
"N/A";
"<interactive>";
"andSixTGateTB.v";
"andSixTGate.v";
"andGate.v";