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/
verilog
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verilog
/
gowin
/
bttn
/
impl
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k0rrluna
a007343feb
fpga added
2025-01-19 14:01:08 +03:00
..
gwsynthesis
fpga added
2025-01-19 14:01:08 +03:00
pnr
fpga added
2025-01-19 14:01:08 +03:00
temp
fpga added
2025-01-19 14:01:08 +03:00
bttn_process_config.json
fpga added
2025-01-19 14:01:08 +03:00