verilog/tetirs/obj_dir/Vtb__Syms.cpp
2024-07-14 04:03:23 +03:00

27 lines
730 B
C++

// Verilated -*- C++ -*-
// DESCRIPTION: Verilator output: Symbol table implementation internals
#include "Vtb__Syms.h"
#include "Vtb.h"
#include "Vtb___024root.h"
// FUNCTIONS
Vtb__Syms::~Vtb__Syms()
{
}
Vtb__Syms::Vtb__Syms(VerilatedContext* contextp, const char* namep, Vtb* modelp)
: VerilatedSyms{contextp}
// Setup internal state of the Syms class
, __Vm_modelp{modelp}
// Setup module instances
, TOP{this, namep}
{
// Configure time unit / time precision
_vm_contextp__->timeunit(-12);
_vm_contextp__->timeprecision(-12);
// Setup each module's pointers to their submodules
// Setup each module's pointer back to symbol table (for public functions)
TOP.__Vconfigure(true);
}