14 lines
430 B
Plaintext
14 lines
430 B
Plaintext
-d \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\impl\gwsynthesis\fpga_project.vg
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-p GW2A-18C-PBGA256-8
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-pn GW2A-LV18PG256C8/I7
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-cst \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\src\fpga_project.cst
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-cfg \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\impl\pnr\device.cfg
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-bit
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-tr
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-ph
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-timing
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-cst_error
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-correct_hold 1
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-route_maxfan 23
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-global_freq 100.000
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