13 lines
323 B
Verilog
13 lines
323 B
Verilog
module fullsubtraction (
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input A, B, BorrowIN,
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output Difference, BorrowOut
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);
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wire tempD, tempB1, tempB2;
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halfsubtraction hf1(.A(A), .B(B), .Difference(tempD), .Borrow(tempB1));
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halfsubtraction hf2(.A(tempD), .B(BorrowIN), .Difference(Difference), .Borrow(tempB2));
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or o1 (BorrowOut, tempB1, tempB2);
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endmodule
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