Synthesis Messages
| Report Title | GowinSynthesis Report | 
| Design File | \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\src\bit3adder.v \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\src\fulladder.v \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\src\halfadder.v \\wsl.localhost\Debian\home\koray\code\verilog\gowin\fpga_project\src\ledTest.v | 
| GowinSynthesis Constraints File | --- | 
| Tool Version | V1.9.9.03 Education (64-bit) | 
| Part Number | GW2A-LV18PG256C8/I7 | 
| Device | GW2A-18 | 
| Device Version | C | 
| Created Time | Fri Jul 5 01:47:50 2024 | 
| Legal Announcement | Copyright (C)2014-2024 Gowin Semiconductor Corporation. ALL rights reserved. | 
Synthesis Details
| Top Level Module | ledTest | 
| Synthesis Process | Running parser: CPU time = 0h 0m 0.062s, Elapsed time = 0h 0m 0.256s, Peak memory usage = 438.125MB Running netlist conversion: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 0MB Running device independent optimization: Optimizing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.005s, Peak memory usage = 438.125MB Optimizing Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 438.125MB Optimizing Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 438.125MB Running inference: Inferring Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.004s, Peak memory usage = 438.125MB Inferring Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 438.125MB Inferring Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.003s, Peak memory usage = 438.125MB Inferring Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 438.125MB Running technical mapping: Tech-Mapping Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.01s, Peak memory usage = 438.125MB Tech-Mapping Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.003s, Peak memory usage = 438.125MB Tech-Mapping Phase 2: CPU time = 0h 0m 0.046s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 438.125MB Tech-Mapping Phase 3: CPU time = 0h 0m 0.078s, Elapsed time = 0h 0m 0.381s, Peak memory usage = 438.125MB Tech-Mapping Phase 4: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 438.125MB Generate output files: CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.058s, Peak memory usage = 438.125MB | 
| Total Time and Memory Usage | CPU time = 0h 0m 0.201s, Elapsed time = 0h 0m 0.729s, Peak memory usage = 438.125MB | 
Resource
Resource Usage Summary
| Resource | Usage | 
| I/O Port | 7 | 
| I/O Buf | 7 | 
|     IBUF | 4 | 
|     OBUF | 3 | 
| LUT | 2 | 
|     LUT4 | 2 | 
Resource Utilization Summary
| Resource | Usage | Utilization | 
| Logic | 2(2 LUT, 0 ALU) / 20736 | <1% | 
| Register | 0 / 16173 | 0% | 
|   --Register as Latch | 0 / 16173 | 0% | 
|   --Register as FF | 0 / 16173 | 0% | 
| BSRAM | 0 / 46 | 0% |