$date Sat Dec 21 15:32:37 2024 $end $version Icarus Verilog $end $timescale 1s $end $scope module ALUTB $end $var wire 1 ! overflow $end $var wire 4 " Y [3:0] $end $var wire 1 # CarryOUT $end $var reg 4 $ A [3:0] $end $var reg 4 % B [3:0] $end $var reg 1 & CarryIN $end $var reg 3 ' opCodeA [2:0] $end $scope module uut $end $var wire 4 ( A [3:0] $end $var wire 4 ) B [3:0] $end $var wire 1 & CarryIN $end $var wire 3 * opCodeA [2:0] $end $var wire 4 + wireY [3:0] $end $var wire 4 , sub_Y [3:0] $end $var wire 4 - resultX [3:0] $end $var wire 4 . resultO [3:0] $end $var wire 4 / resultA [3:0] $end $var wire 1 ! overflow $end $var wire 8 0 opCode8 [7:0] $end $var wire 4 1 lUOutput2 [3:0] $end $var wire 4 2 lUOutput1 [3:0] $end $var wire 4 3 add_Y [3:0] $end $var wire 4 4 aUtemp2 [3:0] $end $var wire 4 5 aUtemp1 [3:0] $end $var wire 4 6 Y [3:0] $end $var wire 1 # CarryOUT $end $scope module aU $end $var wire 4 7 A [3:0] $end $var wire 4 8 B [3:0] $end $var wire 1 & CarryIN $end $var wire 1 # CarryOUT $end $var wire 2 9 opCode [1:0] $end $var wire 1 ! overflow $end $var wire 4 : sub_Y [3:0] $end $var wire 4 ; subY [3:0] $end $var wire 1 < overflowADD $end $var wire 4 = add_Y [3:0] $end $var wire 4 > addY [3:0] $end $var wire 1 ? CarryOUTSUB $end $var wire 1 @ CarryOUTADD $end $scope module a1 $end $var wire 4 A A [3:0] $end $var wire 4 B B [3:0] $end $var wire 1 & CarryIN $end $var wire 1 < overflow $end $var wire 4 C Y [3:0] $end $var wire 1 @ CarryOUT $end $var wire 3 D Carry4 [2:0] $end $scope module f0 $end $var wire 1 E A $end $var wire 1 F B $end $var wire 1 & Carry $end $var wire 1 G CarryO $end $var wire 1 H xor1 $end $var wire 1 I and2 $end $var wire 1 J and1 $end $var wire 1 K Sum $end $scope module h1 $end $var wire 1 E A $end $var wire 1 F B $end $var wire 1 J Carry $end $var wire 1 H Sum $end $upscope $end $scope module h2 $end $var wire 1 H A $end $var wire 1 & B $end $var wire 1 I Carry $end $var wire 1 K Sum $end $upscope $end $upscope $end $scope module f1 $end $var wire 1 L A $end $var wire 1 M B $end $var wire 1 N Carry $end $var wire 1 O CarryO $end $var wire 1 P xor1 $end $var wire 1 Q and2 $end $var wire 1 R and1 $end $var wire 1 S Sum $end $scope module h1 $end $var wire 1 L A $end $var wire 1 M B $end $var wire 1 R Carry $end $var wire 1 P Sum $end $upscope $end $scope module h2 $end $var wire 1 P A $end $var wire 1 N B $end $var wire 1 Q Carry $end $var wire 1 S Sum $end $upscope $end $upscope $end $scope module f2 $end $var wire 1 T A $end $var wire 1 U B $end $var wire 1 V Carry $end $var wire 1 W CarryO $end $var wire 1 X xor1 $end $var wire 1 Y and2 $end $var wire 1 Z and1 $end $var wire 1 [ Sum $end $scope module h1 $end $var wire 1 T A $end $var wire 1 U B $end $var wire 1 Z Carry $end $var wire 1 X Sum $end $upscope $end $scope module h2 $end $var wire 1 X A $end $var wire 1 V B $end $var wire 1 Y Carry $end $var wire 1 [ Sum $end $upscope $end $upscope $end $scope module f3 $end $var wire 1 \ A $end $var wire 1 ] B $end $var wire 1 ^ Carry $end $var wire 1 @ CarryO $end $var wire 1 _ xor1 $end $var wire 1 ` and2 $end $var wire 1 a and1 $end $var wire 1 b Sum $end $scope module h1 $end $var wire 1 \ A $end $var wire 1 ] B $end $var wire 1 a Carry $end $var wire 1 _ Sum $end $upscope $end $scope module h2 $end $var wire 1 _ A $end $var wire 1 ^ B $end $var wire 1 ` Carry $end $var wire 1 b Sum $end $upscope $end $upscope $end $upscope $end $scope module s1 $end $var wire 4 c A [3:0] $end $var wire 4 d B [3:0] $end $var wire 1 & BorrowIN $end $var wire 4 e tempB [3:0] $end $var wire 4 f Y [3:0] $end $var wire 1 ? BorrowOUT $end $scope module f0 $end $var wire 1 g A $end $var wire 1 h B $end $var wire 1 & BorrowIN $end $var wire 1 i BorrowOut $end $var wire 1 j tempD $end $var wire 1 k tempB2 $end $var wire 1 l tempB1 $end $var wire 1 m Difference $end $scope module hf1 $end $var wire 1 g A $end $var wire 1 h B $end $var wire 1 l Borrow $end $var wire 1 j Difference $end $var wire 1 n notA $end $upscope $end $scope module hf2 $end $var wire 1 j A $end $var wire 1 & B $end $var wire 1 k Borrow $end $var wire 1 m Difference $end $var wire 1 o notA $end $upscope $end $upscope $end $scope module f1 $end $var wire 1 p A $end $var wire 1 q B $end $var wire 1 r BorrowIN $end $var wire 1 s BorrowOut $end $var wire 1 t tempD $end $var wire 1 u tempB2 $end $var wire 1 v tempB1 $end $var wire 1 w Difference $end $scope module hf1 $end $var wire 1 p A $end $var wire 1 q B $end $var wire 1 v Borrow $end $var wire 1 t Difference $end $var wire 1 x notA $end $upscope $end $scope module hf2 $end $var wire 1 t A $end $var wire 1 r B $end $var wire 1 u Borrow $end $var wire 1 w Difference $end $var wire 1 y notA $end $upscope $end $upscope $end $scope module f2 $end $var wire 1 z A $end $var wire 1 { B $end $var wire 1 | BorrowIN $end $var wire 1 } BorrowOut $end $var wire 1 ~ tempD $end $var wire 1 !" tempB2 $end $var wire 1 "" tempB1 $end $var wire 1 #" Difference $end $scope module hf1 $end $var wire 1 z A $end $var wire 1 { B $end $var wire 1 "" Borrow $end $var wire 1 ~ Difference $end $var wire 1 $" notA $end $upscope $end $scope module hf2 $end $var wire 1 ~ A $end $var wire 1 | B $end $var wire 1 !" Borrow $end $var wire 1 #" Difference $end $var wire 1 %" notA $end $upscope $end $upscope $end $scope module f3 $end $var wire 1 &" A $end $var wire 1 '" B $end $var wire 1 (" BorrowIN $end $var wire 1 ? BorrowOut $end $var wire 1 )" tempD $end $var wire 1 *" tempB2 $end $var wire 1 +" tempB1 $end $var wire 1 ," Difference $end $scope module hf1 $end $var wire 1 &" A $end $var wire 1 '" B $end $var wire 1 +" Borrow $end $var wire 1 )" Difference $end $var wire 1 -" notA $end $upscope $end $scope module hf2 $end $var wire 1 )" A $end $var wire 1 (" B $end $var wire 1 *" Borrow $end $var wire 1 ," Difference $end $var wire 1 ." notA $end $upscope $end $upscope $end $upscope $end $upscope $end $scope module lU $end $var wire 4 /" A [3:0] $end $var wire 4 0" B [3:0] $end $var wire 3 1" opCode [2:0] $end $var wire 4 2" xor1 [3:0] $end $var wire 4 3" resultX [3:0] $end $var wire 4 4" resultO [3:0] $end $var wire 4 5" resultA [3:0] $end $var wire 4 6" or1 [3:0] $end $var wire 4 7" and1 [3:0] $end $upscope $end $scope module opCd $end $var wire 3 8" A [2:0] $end $var wire 1 9" and1 $end $var wire 1 :" and2 $end $var wire 1 ;" and3 $end $var wire 1 <" and4 $end $var wire 1 =" notA $end $var wire 1 >" notB $end $var wire 1 ?" notC $end $var wire 8 @" opCode [7:0] $end $upscope $end $upscope $end $upscope $end $enddefinitions $end #0 $dumpvars b1 @" 1?" 1>" 1=" 1<" 0;" 0:" 09" b0 8" b0 7" b0 6" b0 5" b0 4" b0 3" b0 2" b0 1" b0 0" b0 /" 1." 1-" 0," 0+" 0*" 0)" 0(" 0'" 0&" 1%" 1$" 0#" 0"" 0!" 0~ 0} 0| 0{ 0z 1y 1x 0w 0v 0u 0t 0s 0r 0q 0p 1o 1n 0m 0l 0k 0j 0i 0h 0g b0 f bz000 e b0 d b0 c 0b 0a 0` 0_ 0^ 0] 0\ 0[ 0Z 0Y 0X 0W 0V 0U 0T 0S 0R 0Q 0P 0O 0N 0M 0L 0K 0J 0I 0H 0G 0F 0E b0 D b0 C b0 B b0 A 0@ 0? b0 > b0 = 0< b0 ; b0 : b1 9 b0 8 b0 7 b0 6 b0 5 b0 4 b0 3 b0 2 b0 1 b1 0 b0 / b0 . b0 - b0 , b0 + b0 * b0 ) b0 ( b0 ' 0& b0 % b0 $ 0# b0 " 0! $end #5 b1111 " b1111 6 b1111 + b1111 5 b1111 3 b1111 = 1r 1| 1(" 1! 1# 1K 1S 1[ b1111 > b1111 C 1b 1m 0o 1i 0w 0y 1s 0#" 0%" bz111 e 1} b1 ; b1 f 0," 0." 1? 1H 1P 1X 1_ 1j 1l 1t 1v 1~ 1"" 1)" 1+" b1111 6" b1111 2" 1F 1M 1U 1] 1h 1q 1{ 1'" b1111 % b1111 ) b1111 8 b1111 B b1111 d b1111 0" #10 1w 1#" b1111 ; b1111 f 1," 0r 0| 0(" 0! 0# 0i 0s bz000 e 0} 0? 0l 0v 0"" 0+" 0n 0x 0$" 0-" 0F 0M 0U 0] 0h 0q 0{ 0'" 1E 1L 1T 1\ 1g 1p 1z 1&" b0 % b0 ) b0 8 b0 B b0 d b0 0" b1111 $ b1111 ( b1111 7 b1111 A b1111 c b1111 /" #15 1? 1*" 1(" 1} 1!" b1111 " b1111 6 1| 1s b1111 + 1u 1r b1111 5 1! bz111 e 1i 1V 1^ 0< 1# 1k 1N b1111 3 b1111 = 1O 1S 1W 1[ 1@ 1b 1o 1w 1y 1#" 1%" 1," 1." b111 D 1G 1J 0H 1R 0P 1Z 0X 1a 0_ 0j 0t 0~ 0)" b1111 7" b0 2" 0I b1111 > b1111 C 1K b1111 ; b1111 f 1m 1F 1M 1U 1] 1h 1q 1{ 1'" 1& b1111 % b1111 ) b1111 8 b1111 B b1111 d b1111 0" #20 1< 0@ 0a 1-" b111 7" b111 6" 0] 0'" 0\ 0&" b111 % b111 ) b111 8 b111 B b111 d b111 0" b111 $ b111 ( b111 7 b111 A b111 c b111 /" #25 0! 0# 0? 0," 0*" b0 " b0 6 0(" 0} b0 4 b0 + 0#" 0!" 0| b0 , b0 : b0 5 0s 0S 0[ 0b 0< 0w 0u 0N 0V 0^ b10 9 b0 3 b0 = 0r 0G 0O b0 D 0W 0?" b10 0 b10 @" bz000 e 0i 0J 0R 0Z 1n 1x 1$" b0 7" b0 6" b0 > b0 C 0K b0 ; b0 f 0m 0k 0F 0M 0U 0h 0q 0{ 0E 0L 0T 0g 0p 0z b1 ' b1 * b1 8" 0& b0 % b0 ) b0 8 b0 B b0 d b0 0" b0 $ b0 ( b0 7 b0 A b0 c b0 /" #30 b1 " b1 6 b1 + b1 4 b1 , b1 : 1r 1| 1(" 1! 1# 1K 1S 1[ b1111 > b1111 C 1b 1m 0o 1i 0w 0y 1s 0#" 0%" bz111 e 1} b1 ; b1 f 0," 0." 1? 1H 1P 1X 1_ 1j 1l 1t 1v 1~ 1"" 1)" 1+" b1111 6" b1111 2" 1F 1M 1U 1] 1h 1q 1{ 1'" b1111 % b1111 ) b1111 8 b1111 B b1111 d b1111 0" #35 b1111 " b1111 6 b1111 + b1111 4 b1111 , b1111 : 1w 1#" b1111 ; b1111 f 1," 0r 0| 0(" 0! 0# 0i 0s bz000 e 0} 0? 0l 0v 0"" 0+" 0n 0x 0$" 0-" 0F 0M 0U 0] 0h 0q 0{ 0'" 1E 1L 1T 1\ 1g 1p 1z 1&" b0 % b0 ) b0 8 b0 B b0 d b0 0" b1111 $ b1111 ( b1111 7 b1111 A b1111 c b1111 /" #40 1? 1*" 1(" 1} 1!" b1111 " b1111 6 1| 1s b1111 + 1u 1r b1111 4 1! bz111 e 1i 1V 1^ 0< 1# 1k 1N b1111 , b1111 : 1O 1S 1W 1[ 1@ 1b 1o 1w 1y 1#" 1%" 1," 1." b111 D 1G 1J 0H 1R 0P 1Z 0X 1a 0_ 0j 0t 0~ 0)" b1111 7" b0 2" 0I b1111 > b1111 C 1K b1111 ; b1111 f 1m 1F 1M 1U 1] 1h 1q 1{ 1'" 1& b1111 % b1111 ) b1111 8 b1111 B b1111 d b1111 0" #45 b111 " b111 6 b111 + b111 4 b111 , b111 : 0*" 1` b111 > b111 C 0b b111 ; b111 f 0," 0." 1+" 0a 1_ 1)" 1-" b111 7" b1000 2" 0\ 0&" b111 $ b111 ( b111 7 b111 A b111 c b111 /" #50