From a007343feb4ca12408f1cc52c87aa551d1f0c62c Mon Sep 17 00:00:00 2001 From: k0rrluna Date: Sun, 19 Jan 2025 14:01:08 +0300 Subject: [PATCH] fpga added --- gowin/bttn/bttn.gprj | 25 + gowin/bttn/bttn.gprj.user | 24 + gowin/bttn/impl/bttn_process_config.json | 88 + gowin/bttn/impl/gwsynthesis/bttn.log | 130 + gowin/bttn/impl/gwsynthesis/bttn.prj | 33 + gowin/bttn/impl/gwsynthesis/bttn.vg | 442 ++ gowin/bttn/impl/gwsynthesis/bttn_syn.rpt.html | 189 + .../impl/gwsynthesis/bttn_syn_resource.html | 56 + gowin/bttn/impl/gwsynthesis/bttn_syn_rsc.xml | 4 + gowin/bttn/impl/pnr/bttn.bin | Bin 0 -> 577178 bytes gowin/bttn/impl/pnr/bttn.binx | Bin 0 -> 577699 bytes gowin/bttn/impl/pnr/bttn.db | Bin 0 -> 4260 bytes gowin/bttn/impl/pnr/bttn.fs | 1378 ++++++ gowin/bttn/impl/pnr/bttn.log | 29 + gowin/bttn/impl/pnr/bttn.pin.html | 3897 ++++++++++++++++ gowin/bttn/impl/pnr/bttn.power.html | 269 ++ gowin/bttn/impl/pnr/bttn.rpt.html | 4143 +++++++++++++++++ gowin/bttn/impl/pnr/bttn.rpt.txt | 363 ++ gowin/bttn/impl/pnr/bttn.timing_paths | 0 gowin/bttn/impl/pnr/bttn.tr.html | 10 + gowin/bttn/impl/pnr/bttn_tr_cata.html | 132 + gowin/bttn/impl/pnr/bttn_tr_content.html | 257 + gowin/bttn/impl/pnr/cmd.do | 13 + gowin/bttn/impl/pnr/device.cfg | 21 + gowin/bttn/impl/temp/rtl_parser.result | 702 +++ gowin/bttn/impl/temp/rtl_parser_arg.json | 73 + gowin/bttn/impl/temp/style.css | 0 gowin/bttn/src/ALU.v | 79 + gowin/bttn/src/BinaryToBCD.v | 79 + gowin/bttn/src/addition.v | 20 + gowin/bttn/src/arithmeticUnit.v | 33 + gowin/bttn/src/bttn | 2191 +++++++++ gowin/bttn/src/bttn.cst | 59 + gowin/bttn/src/bttn.v | 13 + gowin/bttn/src/bttn.vcd | 1103 +++++ gowin/bttn/src/bttnTB.v | 23 + gowin/bttn/src/dabble.v | 22 + gowin/bttn/src/fulladder.v | 12 + gowin/bttn/src/fullsubtraction.v | 12 + gowin/bttn/src/halfadder.v | 9 + gowin/bttn/src/halfsubtraction.v | 12 + gowin/bttn/src/logicUnit.v | 39 + gowin/bttn/src/multiplier.v | 76 + gowin/bttn/src/opCode.v | 25 + gowin/bttn/src/selector.v | 20 + gowin/bttn/src/subtraction.v | 16 + gowin/pmodtest/bttn.v | 8 + spartanTest/ALU | 2109 +++++++++ spartanTest/ALU.vcd | 1074 +++++ spartanTest/ALUtb.v | 26 + spartanTest/selector | 140 + spartanTest/selector.v | 76 +- spartanTest/selector.vcd | 59 + spartanTest/selectorTB.v | 18 +- 54 files changed, 19561 insertions(+), 70 deletions(-) create mode 100644 gowin/bttn/bttn.gprj create mode 100644 gowin/bttn/bttn.gprj.user create mode 100644 gowin/bttn/impl/bttn_process_config.json create mode 100644 gowin/bttn/impl/gwsynthesis/bttn.log create mode 100644 gowin/bttn/impl/gwsynthesis/bttn.prj create mode 100644 gowin/bttn/impl/gwsynthesis/bttn.vg create mode 100644 gowin/bttn/impl/gwsynthesis/bttn_syn.rpt.html create mode 100644 gowin/bttn/impl/gwsynthesis/bttn_syn_resource.html create mode 100644 gowin/bttn/impl/gwsynthesis/bttn_syn_rsc.xml create mode 100644 gowin/bttn/impl/pnr/bttn.bin create mode 100644 gowin/bttn/impl/pnr/bttn.binx create mode 100644 gowin/bttn/impl/pnr/bttn.db create mode 100644 gowin/bttn/impl/pnr/bttn.fs create mode 100644 gowin/bttn/impl/pnr/bttn.log create mode 100644 gowin/bttn/impl/pnr/bttn.pin.html create mode 100644 gowin/bttn/impl/pnr/bttn.power.html create mode 100644 gowin/bttn/impl/pnr/bttn.rpt.html create mode 100644 gowin/bttn/impl/pnr/bttn.rpt.txt create mode 100644 gowin/bttn/impl/pnr/bttn.timing_paths create mode 100644 gowin/bttn/impl/pnr/bttn.tr.html create mode 100644 gowin/bttn/impl/pnr/bttn_tr_cata.html create mode 100644 gowin/bttn/impl/pnr/bttn_tr_content.html create mode 100644 gowin/bttn/impl/pnr/cmd.do create mode 100644 gowin/bttn/impl/pnr/device.cfg create mode 100644 gowin/bttn/impl/temp/rtl_parser.result create mode 100644 gowin/bttn/impl/temp/rtl_parser_arg.json create mode 100644 gowin/bttn/impl/temp/style.css create mode 100644 gowin/bttn/src/ALU.v create mode 100644 gowin/bttn/src/BinaryToBCD.v create mode 100644 gowin/bttn/src/addition.v create mode 100644 gowin/bttn/src/arithmeticUnit.v create mode 100644 gowin/bttn/src/bttn create mode 100644 gowin/bttn/src/bttn.cst create mode 100644 gowin/bttn/src/bttn.v create mode 100644 gowin/bttn/src/bttn.vcd create mode 100644 gowin/bttn/src/bttnTB.v create mode 100644 gowin/bttn/src/dabble.v create mode 100644 gowin/bttn/src/fulladder.v create mode 100644 gowin/bttn/src/fullsubtraction.v create mode 100644 gowin/bttn/src/halfadder.v create mode 100644 gowin/bttn/src/halfsubtraction.v create mode 100644 gowin/bttn/src/logicUnit.v create mode 100644 gowin/bttn/src/multiplier.v create mode 100644 gowin/bttn/src/opCode.v create mode 100644 gowin/bttn/src/selector.v create mode 100644 gowin/bttn/src/subtraction.v create mode 100644 gowin/pmodtest/bttn.v create mode 100644 spartanTest/ALU create mode 100644 spartanTest/ALU.vcd create mode 100644 spartanTest/ALUtb.v create mode 100644 spartanTest/selector create mode 100644 spartanTest/selector.vcd diff --git a/gowin/bttn/bttn.gprj b/gowin/bttn/bttn.gprj new file mode 100644 index 0000000..d4772fa --- /dev/null +++ b/gowin/bttn/bttn.gprj @@ -0,0 +1,25 @@ + + + + + 5 + gw2a18c-011 + + + + + + + + + + + + + + + + + + + diff --git a/gowin/bttn/bttn.gprj.user b/gowin/bttn/bttn.gprj.user new file mode 100644 index 0000000..61632d4 --- /dev/null +++ b/gowin/bttn/bttn.gprj.user @@ -0,0 +1,24 @@ + + + + 1.0 + + + + + + + + + + + + + + + + + + + 000000ff00000001fd00000002000000000000018e0000051efc0200000001fc000000630000051e0000000000fffffffaffffffff0200000003fb00000030004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00440065007300690067006e0100000000ffffffff0000000000000000fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00500072006f00630065007300730100000000ffffffff0000000000000000fb00000036004600700067006100500072006f006a006500630074002e00500061006e0065006c002e0048006900650072006100720063006800790100000000ffffffff00000000000000000000000300000ab000000145fc0100000001fc0000000000000ab0000000e700fffffffa000000000100000002fb00000032004600700067006100500072006f006a006500630074002e00500061006e0065006c002e00470065006e006500720061006c0100000000ffffffff0000009e00fffffffb0000002e004600700067006100500072006f006a006500630074002e00500061006e0065006c002e004900730073007500650100000000ffffffff000000e700ffffff0000091a0000051e00000004000000040000000800000008fc000000010000000200000003000000220043006f00720065002e0054006f006f006c006200610072002e00460069006c00650100000000ffffffff0000000000000000000000220043006f00720065002e0054006f006f006c006200610072002e004500640069007401000000bdffffffff0000000000000000000000240043006f00720065002e0054006f006f006c006200610072002e0054006f006f006c007301000001a5ffffffff0000000000000000 + diff --git a/gowin/bttn/impl/bttn_process_config.json b/gowin/bttn/impl/bttn_process_config.json new file mode 100644 index 0000000..998d428 --- /dev/null +++ b/gowin/bttn/impl/bttn_process_config.json @@ -0,0 +1,88 @@ +{ + "BACKGROUND_PROGRAMMING" : "off", + "COMPRESS" : false, + "CPU" : false, + "CRC_CHECK" : true, + "Clock_Route_Order" : 0, + "Correct_Hold_Violation" : true, + "DONE" : false, + "DOWNLOAD_SPEED" : "default", + "Disable_Insert_Pad" : false, + "ENABLE_CTP" : false, + "ENABLE_MERGE_MODE" : false, + "ENCRYPTION_KEY" : false, + "ENCRYPTION_KEY_TEXT" : "00000000000000000000000000000000", + "ERROR_DECTION_AND_CORRECTION" : false, + "ERROR_DECTION_ONLY" : false, + "ERROR_INJECTION" : false, + "EXTERNAL_MASTER_CONFIG_CLOCK" : false, + "Enable_DSRM" : false, + "FORMAT" : "binary", + "FREQUENCY_DIVIDER" : "", + "Generate_Constraint_File_of_Ports" : false, + "Generate_IBIS_File" : false, + "Generate_Plain_Text_Timing_Report" : false, + "Generate_Post_PNR_Simulation_Model_File" : false, + "Generate_Post_Place_File" : false, + "Generate_SDF_File" : false, + "Generate_VHDL_Post_PNR_Simulation_Model_File" : false, + "Global_Freq" : "default", + "GwSyn_Loop_Limit" : 2000, + "HOTBOOT" : false, + "I2C" : false, + "I2C_SLAVE_ADDR" : "00", + "IncludePath" : [ + + ], + "Incremental_Compile" : "", + "Initialize_Primitives" : false, + "JTAG" : false, + "MODE_IO" : false, + "MSPI" : false, + "MSPI_JUMP" : false, + "MULTIBOOT_ADDRESS_WIDTH" : "24", + "MULTIBOOT_MODE" : "Normal", + "MULTIBOOT_SPI_FLASH_ADDRESS" : "00000000", + "MULTIJUMP_ADDRESS_WIDTH" : "24", + "MULTIJUMP_MODE" : "Normal", + "MULTIJUMP_SPI_FLASH_ADDRESS" : "000000", + "Multi_Boot" : true, + "OUTPUT_BASE_NAME" : "bttn", + "POWER_ON_RESET_MONITOR" : true, + "PRINT_BSRAM_VALUE" : true, + "PROGRAM_DONE_BYPASS" : false, + "PlaceInRegToIob" : true, + "PlaceIoRegToIob" : true, + "PlaceOutRegToIob" : true, + "Place_Option" : "0", + "Process_Configuration_Verion" : "1.0", + "Promote_Physical_Constraint_Warning_to_Error" : true, + "READY" : false, + "RECONFIG_N" : false, + "Ram_RW_Check" : false, + "Replicate_Resources" : false, + "Report_Auto-Placed_Io_Information" : false, + "Route_Maxfan" : 23, + "Route_Option" : "0", + "Run_Timing_Driven" : true, + "SECURE_MODE" : false, + "SECURITY_BIT" : true, + "SEU_HANDLER" : false, + "SEU_HANDLER_CHECKSUM" : false, + "SEU_HANDLER_MODE" : "auto", + "SSPI" : false, + "STOP_SEU_HANDLER" : false, + "Show_All_Warnings" : false, + "Synthesize_tool" : "GowinSyn", + "TclPre" : "", + "TopModule" : "", + "USERCODE" : "default", + "Unused_Pin" : "As_input_tri_stated_with_pull_up", + "VCCAUX" : 3.3, + "VCCX" : "3.3", + "VHDL_Standard" : "VHDL_Std_1993", + "Verilog_Standard" : "Vlg_Std_2001", + "WAKE_UP" : "0", + "show_all_warnings" : false, + "turn_off_bg" : false +} \ No newline at end of file diff --git a/gowin/bttn/impl/gwsynthesis/bttn.log b/gowin/bttn/impl/gwsynthesis/bttn.log new file mode 100644 index 0000000..8f579ba --- /dev/null +++ b/gowin/bttn/impl/gwsynthesis/bttn.log @@ -0,0 +1,130 @@ +GowinSynthesis start +Running parser ... +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\arithmeticUnit.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\dabble.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfadder.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfsubtraction.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\logicUnit.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\opCode.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\selector.v' +Analyzing Verilog file '\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v' +Compiling module 'bttn'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.v":1) +Compiling module 'ALU'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":1) +Compiling module 'opCode'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\opCode.v":1) +Compiling module 'arithmeticUnit'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\arithmeticUnit.v":1) +Compiling module 'addition'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":1) +Compiling module 'fulladder'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":1) +Compiling module 'halfadder'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfadder.v":1) +Compiling module 'subtraction'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v":1) +Compiling module 'fullsubtraction'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":1) +Compiling module 'halfsubtraction'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfsubtraction.v":1) +Compiling module 'logicUnit'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\logicUnit.v":1) +Compiling module 'multiplier'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v":1) +Compiling module 'BinaryToBCD'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":1) +Compiling module 'dabble'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\dabble.v":1) +Compiling module 'selector'("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\selector.v":1) +NOTE (EX0101) : Current top module is "bttn" +[5%] Running netlist conversion ... +Running device independent optimization ... +[10%] Optimizing Phase 0 completed +[15%] Optimizing Phase 1 completed +[25%] Optimizing Phase 2 completed +Running inference ... +[30%] Inferring Phase 0 completed +[40%] Inferring Phase 1 completed +[50%] Inferring Phase 2 completed +[55%] Inferring Phase 3 completed +Running technical mapping ... +[60%] Tech-Mapping Phase 0 completed +[65%] Tech-Mapping Phase 1 completed +[75%] Tech-Mapping Phase 2 completed +[80%] Tech-Mapping Phase 3 completed +[90%] Tech-Mapping Phase 4 completed +WARN (NL0002) : The module "ALU" instantiated to "a1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.v":10) +WARN (NL0002) : The module "arithmeticUnit" instantiated to "aU" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":20) +WARN (NL0002) : The module "addition" instantiated to "a1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\arithmeticUnit.v":13) +WARN (NL0002) : The module "fulladder" instantiated to "f0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":11) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":12) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":13) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f3" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":14) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "subtraction" instantiated to "s1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\arithmeticUnit.v":14) +WARN (NL0002) : The module "fullsubtraction" instantiated to "f0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v":11) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":8) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":9) +WARN (NL0002) : The module "fullsubtraction" instantiated to "f1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v":12) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":8) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":9) +WARN (NL0002) : The module "fullsubtraction" instantiated to "f2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v":13) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":8) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":9) +WARN (NL0002) : The module "fullsubtraction" instantiated to "f3" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v":14) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":8) +WARN (NL0002) : The module "halfsubtraction" instantiated to "hf2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v":9) +WARN (NL0002) : The module "BinaryToBCD" instantiated to "btod1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":76) +WARN (NL0002) : The module "dabble" instantiated to "d1t" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":21) +WARN (NL0002) : The module "dabble" instantiated to "d2u" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":30) +WARN (NL0002) : The module "dabble" instantiated to "d3v" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":39) +WARN (NL0002) : The module "dabble" instantiated to "d4w" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":48) +WARN (NL0002) : The module "dabble" instantiated to "d5x" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":57) +WARN (NL0002) : The module "dabble" instantiated to "d6y" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":66) +WARN (NL0002) : The module "dabble" instantiated to "d7z" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v":75) +WARN (NL0002) : The module "logicUnit" instantiated to "lU" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":21) +WARN (NL0002) : The module "multiplier" instantiated to "mU" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":22) +WARN (NL0002) : The module "addition" instantiated to "add0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v":33) +WARN (NL0002) : The module "fulladder" instantiated to "f0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":11) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":12) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":13) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f3" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":14) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "addition" instantiated to "add1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v":49) +WARN (NL0002) : The module "fulladder" instantiated to "f0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":11) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":12) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":13) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f3" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":14) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "addition" instantiated to "add2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v":65) +WARN (NL0002) : The module "fulladder" instantiated to "f0" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":11) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":12) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":13) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "fulladder" instantiated to "f3" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v":14) +WARN (NL0002) : The module "halfadder" instantiated to "h1" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":8) +WARN (NL0002) : The module "halfadder" instantiated to "h2" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v":9) +WARN (NL0002) : The module "opCode" instantiated to "opCd" is swept in optimizing("\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v":18) +[95%] Generate netlist file "\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg" completed +[100%] Generate report file "\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn_syn.rpt.html" completed +GowinSynthesis finish diff --git a/gowin/bttn/impl/gwsynthesis/bttn.prj b/gowin/bttn/impl/gwsynthesis/bttn.prj new file mode 100644 index 0000000..207f3a7 --- /dev/null +++ b/gowin/bttn/impl/gwsynthesis/bttn.prj @@ -0,0 +1,33 @@ + + + + beta + + + + + + + + + + + + + + + + + + + + + diff --git a/gowin/bttn/impl/gwsynthesis/bttn.vg b/gowin/bttn/impl/gwsynthesis/bttn.vg new file mode 100644 index 0000000..530fed1 --- /dev/null +++ b/gowin/bttn/impl/gwsynthesis/bttn.vg @@ -0,0 +1,442 @@ +// +//Written by GowinSynthesis +//Tool Version "V1.9.9.03 Education (64-bit)" +//Sat Jan 18 22:12:34 2025 + +//Source file index table: +//file0 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/ALU.v" +//file1 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v" +//file2 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/addition.v" +//file3 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/arithmeticUnit.v" +//file4 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v" +//file5 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v" +//file6 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fulladder.v" +//file7 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fullsubtraction.v" +//file8 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfadder.v" +//file9 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfsubtraction.v" +//file10 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/logicUnit.v" +//file11 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/multiplier.v" +//file12 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/opCode.v" +//file13 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/selector.v" +//file14 "\//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/subtraction.v" +`pragma protect begin_protected +`pragma protect version="2.3" +`pragma protect author="default" +`pragma protect author_info="default" +`pragma protect encrypt_agent="GOWIN" +`pragma protect encrypt_agent_info="GOWIN Encrypt Version 2.3" + +`pragma protect encoding=(enctype="base64", line_length=76, bytes=256) +`pragma protect key_keyowner="GOWIN",key_keyname="GWK2023-09",key_method="rsa" +`pragma protect key_block +XUxlt4kAZNWx+CZjpNFOxuyr5JO+J79HgKtXfRxwq3+j18TlfhUIlARkWKvjVVOxCF/MUt/NWoaJ +4ms5amTKHFuEObR0JwM3EOMte3cvLoPmahEU0sXSzQhKtOe+5EgFItJXy8m5ck6UFNwkGI7DU5av +EY+ZNc/foLf/qnSH7KqE13zSAMw6Yki5jMuAAExtuXbDsoISpuu8gvDgoaE6ZE4b+fCD/2gHIH8o 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+ +
+

Synthesis Messages

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Report TitleGowinSynthesis Report
Design File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\ALU.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\BinaryToBCD.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\addition.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\arithmeticUnit.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\dabble.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fulladder.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\fullsubtraction.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfadder.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\halfsubtraction.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\logicUnit.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\multiplier.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\opCode.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\selector.v
+\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\subtraction.v
+
GowinSynthesis Constraints File---
Tool VersionV1.9.9.03 Education (64-bit)
Part NumberGW2A-LV18PG256C8/I7
DeviceGW2A-18
Device VersionC
Created TimeSat Jan 18 22:12:34 2025 +
Legal AnnouncementCopyright (C)2014-2024 Gowin Semiconductor Corporation. ALL rights reserved.
+

Synthesis Details

+ + + + + + + + + + + + + +
Top Level Modulebttn
Synthesis ProcessRunning parser:
    CPU time = 0h 0m 0.14s, Elapsed time = 0h 0m 0.353s, Peak memory usage = 391.969MB
Running netlist conversion:
    CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 0MB
Running device independent optimization:
    Optimizing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.006s, Peak memory usage = 391.969MB
    Optimizing Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.004s, Peak memory usage = 391.969MB
    Optimizing Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 391.969MB
Running inference:
    Inferring Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.005s, Peak memory usage = 391.969MB
    Inferring Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 391.969MB
    Inferring Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.001s, Peak memory usage = 391.969MB
    Inferring Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s, Peak memory usage = 391.969MB
Running technical mapping:
    Tech-Mapping Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.004s, Peak memory usage = 391.969MB
    Tech-Mapping Phase 1: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 391.969MB
    Tech-Mapping Phase 2: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.002s, Peak memory usage = 391.969MB
    Tech-Mapping Phase 3: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 391.969MB
    Tech-Mapping Phase 4: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0.008s, Peak memory usage = 391.969MB
Generate output files:
    CPU time = 0h 0m 0.015s, Elapsed time = 0h 0m 0.081s, Peak memory usage = 391.969MB
Total Time and Memory UsageCPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s, Peak memory usage = 391.969MB
+

Resource

+

Resource Usage Summary

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ResourceUsage
I/O Port 25
I/O Buf 25
    IBUF13
    OBUF12
LUT 137
    LUT220
    LUT335
    LUT482
+

Resource Utilization Summary

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ResourceUsageUtilization
Logic137(137 LUT, 0 ALU) / 20736<1%
Register0 / 161730%
  --Register as Latch0 / 161730%
  --Register as FF0 / 161730%
BSRAM0 / 460%
+
+
+ + diff --git a/gowin/bttn/impl/gwsynthesis/bttn_syn_resource.html b/gowin/bttn/impl/gwsynthesis/bttn_syn_resource.html new file mode 100644 index 0000000..721dda3 --- /dev/null +++ b/gowin/bttn/impl/gwsynthesis/bttn_syn_resource.html @@ -0,0 +1,56 @@ + + + +Hierarchy Module Resource + + + +
+
+

Hierarchy Module Resource

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
MODULE NAMEREG NUMBERALU NUMBERLUT NUMBERDSP NUMBERBSRAM NUMBERSSRAM NUMBERROM16 NUMBER
bttn (//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v)-------
    |--s1 + (//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v)--137----
+
+
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Pin Messages

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Report TitlePin Report
Design File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg
Physical Constraints File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst
Timing Constraints File---
Tool VersionV1.9.9.03 Education (64-bit)
Part NumberGW2A-LV18PG256C8/I7
DeviceGW2A-18
Device VersionC
Created TimeSat Jan 18 22:12:42 2025 +
Legal AnnouncementCopyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.
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Pin Details

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Pinout by Port Name:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Port NameDiff PairLoc./BankConstraintDir.SiteIO TypeDrivePull ModePCI ClampHysteresisOpen DrainVrefSingle ResistorDiff ResistorBankVccio
A[0]A11/7YinIOL15[A]LVCMOS18NANONEONNONENANAOFFNA1.8
A[1]N6/3YinIOR51[A]LVCMOS18NANONEONNONENANAOFFNA1.8
A[2]E15/1YinIOT44[B]LVCMOS18NANONEONNONENANANANA1.8
A[3]L9/3YinIOR40[B]LVCMOS18NANONEONNONENANAOFFNA1.8
B[0]B11/7YinIOL13[A]LVCMOS18NANONEONNONENANAOFFNA1.8
B[1]D11/7YinIOL22[A]LVCMOS18NANONEONNONENANAOFFNA1.8
B[2]N7/3YinIOR47[B]LVCMOS18NANONEONNONENANAOFFNA1.8
B[3]N8/3YinIOR40[A]LVCMOS18NANONEONNONENANAOFFNA1.8
opCodeA[0]T5/4YinIOB54[B]LVCMOS18NAUPONNONENANANANA1.8
opCodeA[1]T4/4YinIOB45[B]LVCMOS18NAUPONNONENANANANA1.8
opCodeA[2]E8/6YinIOL45[B]LVCMOS18NAUPONNONENANAOFFNA1.8
select[0]A15/7YinIOL2[B]LVCMOS18NAUPONNONENANAOFFNA1.8
select[1]A14/7YinIOL8[B]LVCMOS18NAUPONNONENANAOFFNA1.8
Y[0]P6/3YoutIOR53[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[1]T7/3YoutIOR29[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[2]P8/3YoutIOR42[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[3]P9/3YoutIOR38[B]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[4]T11/2YoutIOR24[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[5]T12/2YoutIOR17[B]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[6]M14/1YoutIOT40[A]LVCMOS188NONENANAOFFNANANA1.8
Y[7]J14/0YoutIOT22[B]LVCMOS188NONENANAOFFNANANA1.8
Y[8]D14/1YoutIOT44[A]LVCMOS188NONENANAOFFNANANA1.8
Y[9]B14/7YoutIOL2[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[10]B13/7YoutIOL8[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[11]B12/7YoutIOL7[B]LVCMOS188NONENANAOFFNAOFFNA1.8
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All Package Pins:

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Loc./BankSignalDir.SiteIO TypeDrivePull ModePCI ClampHysteresisOpen DrainVrefSingle ResistorDiff ResistorBank Vccio
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C13/3-inIOR32[B]LVCMOS18NAUPONNONENANANANA1.8
P10/3-inIOR33[A]LVCMOS18NAUPONNONENANANANA1.8
R10/3-inIOR33[B]LVCMOS18NAUPONNONENANANANA1.8
M9/3-inIOR34[A]LVCMOS18NAUPONNONENANANANA1.8
L10/3-inIOR34[B]LVCMOS18NAUPONNONENANANANA1.8
R9/3-inIOR35[A]LVCMOS18NAUPONNONENANANANA1.8
T10/3-inIOR35[B]LVCMOS18NAUPONNONENANANANA1.8
M8/3-inIOR36[A]LVCMOS18NAUPONNONENANANANA1.8
N9/3-inIOR36[B]LVCMOS18NAUPONNONENANANANA1.8
T9/3-inIOR38[A]LVCMOS18NAUPONNONENANANANA1.8
P9/3Y[3]outIOR38[B]LVCMOS188NONENANAOFFNAOFFNA1.8
C10/3-inIOR39[A]LVCMOS18NAUPONNONENANANANA1.8
N8/3B[3]inIOR40[A]LVCMOS18NANONEONNONENANAOFFNA1.8
L9/3A[3]inIOR40[B]LVCMOS18NANONEONNONENANAOFFNA1.8
P8/3Y[2]outIOR42[A]LVCMOS188NONENANAOFFNAOFFNA1.8
T8/3-inIOR42[B]LVCMOS18NAUPONNONENANANANA1.8
M6/3-inIOR44[A]LVCMOS18NAUPONNONENANANANA1.8
L8/3-inIOR44[B]LVCMOS18NAUPONNONENANANANA1.8
M7/3-inIOR47[A]LVCMOS18NAUPONNONENANANANA1.8
N7/3B[2]inIOR47[B]LVCMOS18NANONEONNONENANAOFFNA1.8
R7/3-inIOR49[A]LVCMOS18NAUPONNONENANANANA1.8
P7/3-inIOR49[B]LVCMOS18NAUPONNONENANANANA1.8
N6/3A[1]inIOR51[A]LVCMOS18NANONEONNONENANAOFFNA1.8
P6/3Y[0]outIOR53[A]LVCMOS188NONENANAOFFNAOFFNA1.8
T6/3-inIOR53[B]LVCMOS18NAUPONNONENANANANA1.8
+
+
+
+ + diff --git a/gowin/bttn/impl/pnr/bttn.power.html b/gowin/bttn/impl/pnr/bttn.power.html new file mode 100644 index 0000000..ebabf71 --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn.power.html @@ -0,0 +1,269 @@ + + + +Power Analysis Report + + + +
+ +
+

Power Messages

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Report TitlePower Analysis Report
Design File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg
Physical Constraints File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst
Timing Constraints File---
Tool VersionV1.9.9.03 Education (64-bit)
Part NumberGW2A-LV18PG256C8/I7
DeviceGW2A-18
Device VersionC
Created TimeSat Jan 18 22:12:42 2025 +
Legal AnnouncementCopyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.
+

Configure Information:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
GradeCommercial
ProcessTypical
Ambient Temperature25.000 +
Use Custom Theta JAfalse
Heat SinkNone
Air FlowLFM_0
Use Custom Theta SAfalse
Board Thermal ModelNone
Use Custom Theta JBfalse
Related Vcd File
Related Saif File
Filter Glitchesfalse
Default IO Toggle Rate0.125
Default Remain Toggle Rate0.125
+

Power Summary

+

Power Information:

+ + + + + + + + + + + + + +
Total Power (mW)124.284
Quiescent Power (mW)121.171
Dynamic Power (mW)3.114
+

Thermal Information:

+ + + + + + + + + + + + + +
Junction Temperature28.980
Theta JA32.020
Max Allowed Ambient Temperature81.020
+

Supply Information:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Voltage SourceVoltageDynamic Current(mA)Quiescent Current(mA)Power(mW)
VCC1.0000.51369.98370.496
VCCX3.3000.51315.00051.192
VCCIO181.8000.5050.9372.597
+

Power Details

+

Power By Block Type:

+ + + + + + + + + + +
Block TypeTotal Power(mW)Static Power(mW)Average Toggle Rate(millions of transitions/sec)
IO7.854 +4.740 +6.500 +
+

Power By Hierarchy:

+ + + + + + + + + + + + + + +
Hierarchy EntityTotal Power(mW)Block Dynamic Power(mW)
bttn0.0000.000(0.000)
bttn/s1/0.0000.000(0.000)
+

Power By Clock Domain:

+ + + + + + + + + + + +
Clock DomainClock Frequency(Mhz)Total Dynamic Power(mW)
NO CLOCK DOMAIN0.0000.000
+
+
+ + diff --git a/gowin/bttn/impl/pnr/bttn.rpt.html b/gowin/bttn/impl/pnr/bttn.rpt.html new file mode 100644 index 0000000..4cd14cd --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn.rpt.html @@ -0,0 +1,4143 @@ + + + +PnR Analysis Report + + + +
+ +
+

PnR Messages

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Report TitlePnR Report
Design File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg
Physical Constraints File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst
Timing Constraints File---
Tool VersionV1.9.9.03 Education (64-bit)
Part NumberGW2A-LV18PG256C8/I7
DeviceGW2A-18
Device VersionC
Created TimeSat Jan 18 22:12:44 2025 +
Legal AnnouncementCopyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.
+

PnR Details

+ + + + + + + + + + +
Place & Route ProcessRunning placement: + Placement Phase 0: CPU time = 0h 0m 0.021s, Elapsed time = 0h 0m 0.021s + Placement Phase 1: CPU time = 0h 0m 0.354s, Elapsed time = 0h 0m 0.354s + Placement Phase 2: CPU time = 0h 0m 0.008s, Elapsed time = 0h 0m 0.008s + Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s + Total Placement: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s +Running routing: + Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s + Routing Phase 1: CPU time = 0h 0m 0.173s, Elapsed time = 0h 0m 0.173s + Routing Phase 2: CPU time = 0h 0m 0.224s, Elapsed time = 0h 0m 0.224s + Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s + Total Routing: CPU time = 0h 0m 0.397s, Elapsed time = 0h 0m 0.397s +Generate output files: + CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s +
Total Time and Memory UsageCPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 391MB
+
+

Resource

+ +

Resource Usage Summary:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
ResourceUsageUtilization
Logic137/20736<1%
    --LUT,ALU,ROM16137(137 LUT, 0 ALU, 0 ROM16)-
    --SSRAM(RAM16)0-
Register0/161730%
    --Logic Register as Latch0/155520%
    --Logic Register as FF0/155520%
    --I/O Register as Latch0/6210%
    --I/O Register as FF0/6210%
CLS74/10368<1%
I/O Port25-
I/O Buf25-
    --Input Buf13-
    --Output Buf12-
    --Inout Buf0-
IOLOGIC00%
BSRAM00%
DSP00%
PLL0/40%
DCS0/80%
DQCE0/240%
OSC0/10%
CLKDIV0/80%
DLLDLY0/80%
DQS0/90%
DHCEN0/160%
+

I/O Bank Usage Summary:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
I/O BankUsage
bank 01/29(3%)
bank 13/20(15%)
bank 22/20(10%)
bank 38/32(25%)
bank 42/36(5%)
bank 50/36(0%)
bank 61/18(5%)
bank 78/16(50%)
+
+

Global Clock Usage Summary:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Global ClockUsage
PRIMARY0/8(0%)
LW0/8(0%)
GCLK_PIN1/8(13%)
PLL0/4(0%)
CLKDIV0/8(0%)
DLLDLY0/8(0%)
+
+

Global Clock Signals:

+ + + + + + +
SignalGlobal ClockLocation
+
+

Pinout by Port Name:

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Port NameDiff PairLoc./BankConstraintDir.SiteIO TypeDrivePull ModePCI ClampHysteresisOpen DrainVrefSingle ResistorDiff ResistorBankVccio
A[0]A11/7YinIOL15[A]LVCMOS18NANONEONNONENANAOFFNA1.8
A[1]N6/3YinIOR51[A]LVCMOS18NANONEONNONENANAOFFNA1.8
A[2]E15/1YinIOT44[B]LVCMOS18NANONEONNONENANANANA1.8
A[3]L9/3YinIOR40[B]LVCMOS18NANONEONNONENANAOFFNA1.8
B[0]B11/7YinIOL13[A]LVCMOS18NANONEONNONENANAOFFNA1.8
B[1]D11/7YinIOL22[A]LVCMOS18NANONEONNONENANAOFFNA1.8
B[2]N7/3YinIOR47[B]LVCMOS18NANONEONNONENANAOFFNA1.8
B[3]N8/3YinIOR40[A]LVCMOS18NANONEONNONENANAOFFNA1.8
opCodeA[0]T5/4YinIOB54[B]LVCMOS18NAUPONNONENANANANA1.8
opCodeA[1]T4/4YinIOB45[B]LVCMOS18NAUPONNONENANANANA1.8
opCodeA[2]E8/6YinIOL45[B]LVCMOS18NAUPONNONENANAOFFNA1.8
select[0]A15/7YinIOL2[B]LVCMOS18NAUPONNONENANAOFFNA1.8
select[1]A14/7YinIOL8[B]LVCMOS18NAUPONNONENANAOFFNA1.8
Y[0]P6/3YoutIOR53[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[1]T7/3YoutIOR29[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[2]P8/3YoutIOR42[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[3]P9/3YoutIOR38[B]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[4]T11/2YoutIOR24[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[5]T12/2YoutIOR17[B]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[6]M14/1YoutIOT40[A]LVCMOS188NONENANAOFFNANANA1.8
Y[7]J14/0YoutIOT22[B]LVCMOS188NONENANAOFFNANANA1.8
Y[8]D14/1YoutIOT44[A]LVCMOS188NONENANAOFFNANANA1.8
Y[9]B14/7YoutIOL2[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[10]B13/7YoutIOL8[A]LVCMOS188NONENANAOFFNAOFFNA1.8
Y[11]B12/7YoutIOL7[B]LVCMOS188NONENANAOFFNAOFFNA1.8
+
+

All Package Pins:

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Loc./BankSignalDir.SiteIO TypeDrivePull ModePCI ClampHysteresisOpen DrainVrefSingle ResistorDiff ResistorBank Vccio
L15/0-inIOT2[A]LVCMOS18NAUPONNONENANANANA1.8
D16/0-inIOT4[A]LVCMOS18NAUPONNONENANANANA1.8
E14/0-inIOT4[B]LVCMOS18NAUPONNONENANANANA1.8
C16/0-inIOT5[A]LVCMOS18NAUPONNONENANANANA1.8
D15/0-inIOT5[B]LVCMOS18NAUPONNONENANANANA1.8
E16/0-inIOT6[A]LVCMOS18NAUPONNONENANANANA1.8
F15/0-inIOT6[B]LVCMOS18NAUPONNONENANANANA1.8
F13/0-inIOT8[A]LVCMOS18NAUPONNONENANANANA1.8
G12/0-inIOT8[B]LVCMOS18NAUPONNONENANANANA1.8
F14/0-inIOT9[A]LVCMOS18NAUPONNONENANANANA1.8
F16/0-inIOT9[B]LVCMOS18NAUPONNONENANANANA1.8
F12/0-inIOT12[A]LVCMOS18NAUPONNONENANANANA1.8
G13/0-inIOT12[B]LVCMOS18NAUPONNONENANANANA1.8
G15/0-inIOT13[A]LVCMOS18NAUPONNONENANANANA1.8
G14/0-inIOT13[B]LVCMOS18NAUPONNONENANANANA1.8
G11/0-inIOT14[A]LVCMOS18NAUPONNONENANANANA1.8
H12/0-inIOT14[B]LVCMOS18NAUPONNONENANANANA1.8
G16/0-inIOT16[A]LVCMOS18NAUPONNONENANANANA1.8
H15/0-inIOT16[B]LVCMOS18NAUPONNONENANANANA1.8
H13/0-inIOT18[A]LVCMOS18NAUPONNONENANANANA1.8
J12/0-inIOT18[B]LVCMOS18NAUPONNONENANANANA1.8
H14/0-inIOT20[A]LVCMOS18NAUPONNONENANANANA1.8
H16/0-inIOT20[B]LVCMOS18NAUPONNONENANANANA1.8
J16/0-inIOT22[A]LVCMOS18NAUPONNONENANANANA1.8
J14/0Y[7]outIOT22[B]LVCMOS188NONENANAOFFNANANA1.8
J15/0-inIOT24[A]LVCMOS18NAUPONNONENANANANA1.8
K16/0-inIOT24[B]LVCMOS18NAUPONNONENANANANA1.8
H11/0-inIOT27[A]LVCMOS18NAUPONNONENANANANA1.8
J13/0-inIOT27[B]LVCMOS18NAUPONNONENANANANA1.8
K14/1-inIOT30[A]LVCMOS18NAUPONNONENANANANA1.8
K15/1-inIOT30[B]LVCMOS18NAUPONNONENANANANA1.8
J11/1-inIOT32[A]LVCMOS18NAUPONNONENANANANA1.8
L12/1-inIOT32[B]LVCMOS18NAUPONNONENANANANA1.8
L16/1-inIOT34[A]LVCMOS18NAUPONNONENANANANA1.8
L14/1-inIOT34[B]LVCMOS18NAUPONNONENANANANA1.8
K13/1-inIOT36[A]LVCMOS18NAUPONNONENANANANA1.8
K12/1-inIOT36[B]LVCMOS18NAUPONNONENANANANA1.8
K11/1-inIOT38[A]LVCMOS18NAUPONNONENANANANA1.8
L13/1-inIOT38[B]LVCMOS18NAUPONNONENANANANA1.8
M14/1Y[6]outIOT40[A]LVCMOS188NONENANAOFFNANANA1.8
M15/1-inIOT40[B]LVCMOS18NAUPONNONENANANANA1.8
D14/1Y[8]outIOT44[A]LVCMOS188NONENANAOFFNANANA1.8
E15/1A[2]inIOT44[B]LVCMOS18NANONEONNONENANANANA1.8
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N16/1-inIOT52[A]LVCMOS18NAUPONNONENANANANA1.8
N14/1-inIOT52[B]LVCMOS18NAUPONNONENANANANA1.8
P15/1-inIOT54[A]LVCMOS18NAUPONNONENANANANA1.8
R16/1-inIOT54[B]LVCMOS18NAUPONNONENANANANA1.8
A4/5-inIOB2[A]LVCMOS18NAUPONNONENANANANA1.8
C5/5-inIOB2[B]LVCMOS18NAUPONNONENANANANA1.8
D6/5-inIOB3[A]LVCMOS18NAUPONNONENANANANA1.8
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A3/5-inIOB4[A]LVCMOS18NAUPONNONENANANANA1.8
B4/5-inIOB4[B]LVCMOS18NAUPONNONENANANANA1.8
A5/5-inIOB7[A]LVCMOS18NAUPONNONENANANANA1.8
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D3/5-inIOB9[A]LVCMOS18NAUPONNONENANANANA1.8
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B3/5-inIOB13[A]LVCMOS18NAUPONNONENANANANA1.8
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E1/5-inIOB16[A]LVCMOS18NAUPONNONENANANANA1.8
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T4/4opCodeA[1]inIOB45[B]LVCMOS18NAUPONNONENANANANA1.8
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R6/4-inIOB54[A]LVCMOS18NAUPONNONENANANANA1.8
T5/4opCodeA[0]inIOB54[B]LVCMOS18NAUPONNONENANANANA1.8
B14/7Y[9]outIOL2[A]LVCMOS188NONENANAOFFNAOFFNA1.8
A15/7select[0]inIOL2[B]LVCMOS18NAUPONNONENANAOFFNA1.8
C12/7-inIOL7[A]LVCMOS18NAUPONNONENANANANA1.8
B12/7Y[11]outIOL7[B]LVCMOS188NONENANAOFFNAOFFNA1.8
B13/7Y[10]outIOL8[A]LVCMOS188NONENANAOFFNAOFFNA1.8
A14/7select[1]inIOL8[B]LVCMOS18NAUPONNONENANAOFFNA1.8
F10/7-inIOL11[A]LVCMOS18NAUPONNONENANANANA1.8
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E8/6opCodeA[2]inIOL45[B]LVCMOS18NAUPONNONENANAOFFNA1.8
C4/6-inIOL47[A]LVCMOS18NAUPONNONENANANANA1.8
B5/6-inIOL47[B]LVCMOS18NAUPONNONENANANANA1.8
E6/6-inIOL53[A]LVCMOS18NAUPONNONENANANANA1.8
D7/6-inIOL53[B]LVCMOS18NAUPONNONENANANANA1.8
T15/2-inIOR7[A]LVCMOS18NAUPONNONENANANANA1.8
R14/2-inIOR7[B]LVCMOS18NAUPONNONENANANANA1.8
P12/2-inIOR8[A]LVCMOS18NAUPONNONENANANANA1.8
T13/2-inIOR8[B]LVCMOS18NAUPONNONENANANANA1.8
R12/2-inIOR11[A]LVCMOS18NAUPONNONENANANANA1.8
P13/2-inIOR11[B]LVCMOS18NAUPONNONENANANANA1.8
R11/2-inIOR17[A]LVCMOS18NAUPONNONENANANANA1.8
T12/2Y[5]outIOR17[B]LVCMOS188NONENANAOFFNAOFFNA1.8
R13/2-inIOR20[A]LVCMOS18NAUPONNONENANANANA1.8
T14/2-inIOR20[B]LVCMOS18NAUPONNONENANANANA1.8
M10/2-inIOR22[A]LVCMOS18NAUPONNONENANANANA1.8
N11/2-inIOR22[B]LVCMOS18NAUPONNONENANANANA1.8
T11/2Y[4]outIOR24[A]LVCMOS188NONENANAOFFNAOFFNA1.8
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C6/2-outIOR25[A]LVCMOS188UPNANAOFFNANANA1.8
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T7/3Y[1]outIOR29[A]LVCMOS188NONENANAOFFNAOFFNA1.8
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+
+
+
+ + diff --git a/gowin/bttn/impl/pnr/bttn.rpt.txt b/gowin/bttn/impl/pnr/bttn.rpt.txt new file mode 100644 index 0000000..4d6c576 --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn.rpt.txt @@ -0,0 +1,363 @@ +//Copyright (C)2014-2024 Gowin Semiconductor Corporation. +//All rights reserved. + + +1. PnR Messages + + : PnR Report + : \\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg + : \\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst + : --- + : V1.9.9.03 Education (64-bit) + : GW2A-LV18PG256C8/I7 + : GW2A-18 + : C + :Sat Jan 18 22:12:45 2025 + + +2. PnR Details + + Running placement: + Placement Phase 0: CPU time = 0h 0m 0.021s, Elapsed time = 0h 0m 0.021s + Placement Phase 1: CPU time = 0h 0m 0.354s, Elapsed time = 0h 0m 0.354s + Placement Phase 2: CPU time = 0h 0m 0.008s, Elapsed time = 0h 0m 0.008s + Placement Phase 3: CPU time = 0h 0m 1s, Elapsed time = 0h 0m 1s + Total Placement: CPU time = 0h 0m 2s, Elapsed time = 0h 0m 2s + Running routing: + Routing Phase 0: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s + Routing Phase 1: CPU time = 0h 0m 0.173s, Elapsed time = 0h 0m 0.173s + Routing Phase 2: CPU time = 0h 0m 0.224s, Elapsed time = 0h 0m 0.224s + Routing Phase 3: CPU time = 0h 0m 0s, Elapsed time = 0h 0m 0s + Total Routing: CPU time = 0h 0m 0.397s, Elapsed time = 0h 0m 0.397s + Generate output files: + CPU time = 0h 0m 4s, Elapsed time = 0h 0m 4s + + Total Time and Memory Usage: CPU time = 0h 0m 6s, Elapsed time = 0h 0m 6s, Peak memory usage = 391MB + + +3. Resource Usage Summary + + ---------------------------------------------------------- + Resources | Usage + ---------------------------------------------------------- + Logic | 137/20736 <1% + --LUT,ALU,ROM16 | 137(137 LUT, 0 ALU, 0 ROM16) + --SSRAM(RAM16) | 0 + Register | 0/16173 0% + --Logic Register as Latch | 0/15552 0% + --Logic Register as FF | 0/15552 0% + --I/O Register as Latch | 0/621 0% + --I/O Register as FF | 0/621 0% + CLS | 74/10368 <1% + I/O Port | 25 + I/O Buf | 25 + --Input Buf | 13 + --Output Buf | 12 + --Inout Buf | 0 + IOLOGIC | 0% + BSRAM | 0% + DSP | 0% + PLL | 0/4 0% + DCS | 0/8 0% + DQCE | 0/24 0% + OSC | 0/1 0% + CLKDIV | 0/8 0% + DLLDLY | 0/8 0% + DQS | 0/9 0% + DHCEN | 0/16 0% + ========================================================== + + + +4. I/O Bank Usage Summary + + ----------------------- + I/O Bank | Usage + ----------------------- + bank 0 | 1/29(3%) + bank 1 | 3/20(15%) + bank 2 | 2/20(10%) + bank 3 | 8/32(25%) + bank 4 | 2/36(5%) + bank 5 | 0/36(0%) + bank 6 | 1/18(5%) + bank 7 | 8/16(50%) + ======================= + + +5. Global Clock Usage Summary + + ------------------------------- + Global Clock | Usage + ------------------------------- + PRIMARY | 0/8(0%) + LW | 0/8(0%) + GCLK_PIN | 1/8(13%) + PLL | 0/4(0%) + CLKDIV | 0/8(0%) + DLLDLY | 0/8(0%) + =============================== + + +6. Global Clock Signals + + ------------------------------------------- + Signal | Global Clock | Location + ------------------------------------------- + =========================================== + + +7. Pinout by Port Name + +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Port Name | Diff Pair | Loc./Bank | Constraint | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | BankVccio +------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +A[0] | | A11/7 | Y | in | IOL15[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +A[1] | | N6/3 | Y | in | IOR51[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +A[2] | | E15/1 | Y | in | IOT44[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | NA | NA | 1.8 +A[3] | | L9/3 | Y | in | IOR40[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +B[0] | | B11/7 | Y | in | IOL13[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +B[1] | | D11/7 | Y | in | IOL22[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +B[2] | | N7/3 | Y | in | IOR47[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +B[3] | | N8/3 | Y | in | IOR40[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +opCodeA[0] | | T5/4 | Y | in | IOB54[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +opCodeA[1] | | T4/4 | Y | in | IOB45[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +opCodeA[2] | | E8/6 | Y | in | IOL45[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +select[0] | | A15/7 | Y | in | IOL2[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +select[1] | | A14/7 | Y | in | IOL8[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +Y[0] | | P6/3 | Y | out | IOR53[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[1] | | T7/3 | Y | out | IOR29[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[2] | | P8/3 | Y | out | IOR42[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[3] | | P9/3 | Y | out | IOR38[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[4] | | T11/2 | Y | out | IOR24[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[5] | | T12/2 | Y | out | IOR17[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[6] | | M14/1 | Y | out | IOT40[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +Y[7] | | J14/0 | Y | out | IOT22[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +Y[8] | | D14/1 | Y | out | IOT44[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +Y[9] | | B14/7 | Y | out | IOL2[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[10] | | B13/7 | Y | out | IOL8[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +Y[11] | | B12/7 | Y | out | IOL7[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +=================================================================================================================================================================================================================== + + + + +8. All Package Pins + +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +Loc./Bank| Signal | Dir. | Site | IO Type | Drive | Pull Mode | PCI Clamp | Hysteresis | Open Drain | Vref | Single Resistor | Diff Resistor | Bank Vccio +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +L15/0 | - | in | IOT2[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D16/0 | - | in | IOT4[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E14/0 | - | in | IOT4[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C16/0 | - | in | IOT5[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D15/0 | - | in | IOT5[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E16/0 | - | in | IOT6[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F15/0 | - | in | IOT6[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F13/0 | - | in | IOT8[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G12/0 | - | in | IOT8[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F14/0 | - | in | IOT9[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F16/0 | - | in | IOT9[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F12/0 | - | in | IOT12[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G13/0 | - | in | IOT12[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G15/0 | - | in | IOT13[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G14/0 | - | in | IOT13[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G11/0 | - | in | IOT14[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H12/0 | - | in | IOT14[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G16/0 | - | in | IOT16[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H15/0 | - | in | IOT16[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H13/0 | - | in | IOT18[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J12/0 | - | in | IOT18[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H14/0 | - | in | IOT20[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H16/0 | - | in | IOT20[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J16/0 | - | in | IOT22[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J14/0 | Y[7] | out | IOT22[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +J15/0 | - | in | IOT24[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K16/0 | - | in | IOT24[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H11/0 | - | in | IOT27[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J13/0 | - | in | IOT27[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K14/1 | - | in | IOT30[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K15/1 | - | in | IOT30[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J11/1 | - | in | IOT32[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L12/1 | - | in | IOT32[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L16/1 | - | in | IOT34[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L14/1 | - | in | IOT34[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K13/1 | - | in | IOT36[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K12/1 | - | in | IOT36[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K11/1 | - | in | IOT38[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L13/1 | - | in | IOT38[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M14/1 | Y[6] | out | IOT40[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +M15/1 | - | in | IOT40[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D14/1 | Y[8] | out | IOT44[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | NA | NA | 1.8 +E15/1 | A[2] | in | IOT44[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | NA | NA | 1.8 +N15/1 | - | in | IOT48[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P16/1 | - | in | IOT48[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N16/1 | - | in | IOT52[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N14/1 | - | in | IOT52[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P15/1 | - | in | IOT54[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R16/1 | - | in | IOT54[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +A4/5 | - | in | IOB2[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C5/5 | - | in | IOB2[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D6/5 | - | in | IOB3[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E7/5 | - | in | IOB3[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A3/5 | - | in | IOB4[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B4/5 | - | in | IOB4[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A5/5 | - | in | IOB7[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B6/5 | - | in | IOB7[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B1/5 | - | in | IOB8[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C2/5 | - | in | IOB8[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D3/5 | - | in | IOB9[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D1/5 | - | in | IOB9[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E2/5 | - | in | IOB12[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E3/5 | - | in | IOB12[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B3/5 | - | in | IOB13[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A2/5 | - | in | IOB13[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C1/5 | - | in | IOB14[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D2/5 | - | in | IOB14[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E1/5 | - | in | IOB16[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F2/5 | - | in | IOB16[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F4/5 | - | in | IOB18[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G6/5 | - | in | IOB18[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F3/5 | - | in | IOB19[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F1/5 | - | in | IOB19[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G5/5 | - | in | IOB20[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G4/5 | - | in | IOB20[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G2/5 | - | in | IOB21[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G3/5 | - | in | IOB21[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F5/5 | - | in | IOB22[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H6/5 | - | in | IOB22[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +G1/5 | - | in | IOB24[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H2/5 | - | in | IOB24[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H4/5 | - | in | IOB26[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J6/5 | - | in | IOB26[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J1/5 | - | in | IOB27[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J3/5 | - | in | IOB27[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L2/4 | - | in | IOB30[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M1/4 | - | in | IOB30[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H3/4 | - | in | IOB32[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H1/4 | - | in | IOB32[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J2/4 | - | in | IOB34[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K1/4 | - | in | IOB34[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +H5/4 | - | in | IOB35[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J4/4 | - | in | IOB35[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K3/4 | - | in | IOB36[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K2/4 | - | in | IOB36[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +J5/4 | - | in | IOB37[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K6/4 | - | in | IOB37[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L1/4 | - | in | IOB38[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L3/4 | - | in | IOB38[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K4/4 | - | in | IOB39[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L5/4 | - | in | IOB39[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +K5/4 | - | in | IOB40[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L4/4 | - | in | IOB40[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N2/4 | - | in | IOB41[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P1/4 | - | in | IOB41[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M3/4 | - | in | IOB42[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N1/4 | - | in | IOB42[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M2/4 | - | in | IOB43[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N3/4 | - | in | IOB43[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R1/4 | - | in | IOB44[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P2/4 | - | in | IOB44[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P4/4 | - | in | IOB45[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T4/4 | opCodeA[1] | in | IOB45[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R3/4 | - | in | IOB48[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T2/4 | - | in | IOB48[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P5/4 | - | in | IOB50[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R5/4 | - | in | IOB50[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R4/4 | - | in | IOB52[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T3/4 | - | in | IOB52[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R6/4 | - | in | IOB54[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T5/4 | opCodeA[0] | in | IOB54[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +B14/7 | Y[9] | out | IOL2[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +A15/7 | select[0] | in | IOL2[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +C12/7 | - | in | IOL7[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B12/7 | Y[11] | out | IOL7[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +B13/7 | Y[10] | out | IOL8[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +A14/7 | select[1] | in | IOL8[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +F10/7 | - | in | IOL11[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B11/7 | B[0] | in | IOL13[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +A12/7 | - | in | IOL13[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A11/7 | A[0] | in | IOL15[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +C11/7 | - | in | IOL15[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D10/7 | - | in | IOL17[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E10/7 | - | in | IOL17[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D11/7 | B[1] | in | IOL22[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +A9/7 | - | in | IOL27[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C9/7 | - | in | IOL27[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C8/6 | - | in | IOL29[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A8/6 | - | in | IOL29[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F9/6 | - | in | IOL31[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E11/6 | - | in | IOL31[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B9/6 | - | in | IOL33[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A10/6 | - | in | IOL33[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F8/6 | - | in | IOL35[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D9/6 | - | in | IOL35[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D8/6 | - | in | IOL38[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E9/6 | - | in | IOL38[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B7/6 | - | in | IOL40[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C7/6 | - | in | IOL40[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +F7/6 | - | in | IOL45[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E8/6 | opCodeA[2] | in | IOL45[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | OFF | NA | 1.8 +C4/6 | - | in | IOL47[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B5/6 | - | in | IOL47[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +E6/6 | - | in | IOL53[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +D7/6 | - | in | IOL53[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +T15/2 | - | in | IOR7[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R14/2 | - | in | IOR7[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P12/2 | - | in | IOR8[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T13/2 | - | in | IOR8[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R12/2 | - | in | IOR11[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P13/2 | - | in | IOR11[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R11/2 | - | in | IOR17[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T12/2 | Y[5] | out | IOR17[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +R13/2 | - | in | IOR20[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T14/2 | - | in | IOR20[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M10/2 | - | in | IOR22[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N11/2 | - | in | IOR22[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T11/2 | Y[4] | out | IOR24[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +P11/2 | - | in | IOR24[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C6/2 | - | out | IOR25[A] | LVCMOS18 | 8 | UP | NA | NA | OFF | NA | NA | NA | 1.8 +B8/2 | - | in | IOR25[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A7/2 | - | in | IOR26[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A6/2 | - | in | IOR26[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N10/2 | - | in | IOR27[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M11/2 | - | in | IOR27[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T7/3 | Y[1] | out | IOR29[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +R8/3 | - | in | IOR29[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M16/3 | - | in | IOR30[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B16/3 | - | in | IOR30[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C15/3 | - | in | IOR31[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +B10/3 | - | in | IOR31[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +A13/3 | - | in | IOR32[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +C13/3 | - | in | IOR32[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P10/3 | - | in | IOR33[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R10/3 | - | in | IOR33[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M9/3 | - | in | IOR34[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L10/3 | - | in | IOR34[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +R9/3 | - | in | IOR35[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T10/3 | - | in | IOR35[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M8/3 | - | in | IOR36[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N9/3 | - | in | IOR36[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +T9/3 | - | in | IOR38[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P9/3 | Y[3] | out | IOR38[B] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +C10/3 | - | in | IOR39[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N8/3 | B[3] | in | IOR40[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +L9/3 | A[3] | in | IOR40[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +P8/3 | Y[2] | out | IOR42[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +T8/3 | - | in | IOR42[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M6/3 | - | in | IOR44[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +L8/3 | - | in | IOR44[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +M7/3 | - | in | IOR47[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N7/3 | B[2] | in | IOR47[B] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +R7/3 | - | in | IOR49[A] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +P7/3 | - | in | IOR49[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +N6/3 | A[1] | in | IOR51[A] | LVCMOS18 | NA | NONE | ON | NONE | NA | NA | OFF | NA | 1.8 +P6/3 | Y[0] | out | IOR53[A] | LVCMOS18 | 8 | NONE | NA | NA | OFF | NA | OFF | NA | 1.8 +T6/3 | - | in | IOR53[B] | LVCMOS18 | NA | UP | ON | NONE | NA | NA | NA | NA | 1.8 +---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- +======================================================================================================================================================================================== + + diff --git a/gowin/bttn/impl/pnr/bttn.timing_paths b/gowin/bttn/impl/pnr/bttn.timing_paths new file mode 100644 index 0000000..e69de29 diff --git a/gowin/bttn/impl/pnr/bttn.tr.html b/gowin/bttn/impl/pnr/bttn.tr.html new file mode 100644 index 0000000..fdecda4 --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn.tr.html @@ -0,0 +1,10 @@ + + + +Timing Analysis Report + + + + + + diff --git a/gowin/bttn/impl/pnr/bttn_tr_cata.html b/gowin/bttn/impl/pnr/bttn_tr_cata.html new file mode 100644 index 0000000..240c287 --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn_tr_cata.html @@ -0,0 +1,132 @@ + + + +Timing Report Navigation + + + + + + + diff --git a/gowin/bttn/impl/pnr/bttn_tr_content.html b/gowin/bttn/impl/pnr/bttn_tr_content.html new file mode 100644 index 0000000..35b3bd2 --- /dev/null +++ b/gowin/bttn/impl/pnr/bttn_tr_content.html @@ -0,0 +1,257 @@ + + + +Timing Analysis Report + + + +
+

Timing Messages

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Report TitleTiming Analysis Report
Design File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg
Physical Constraints File\\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst
Timing Constraint File---
Tool VersionV1.9.9.03 Education (64-bit)
Part NumberGW2A-LV18PG256C8/I7
DeviceGW2A-18
Device VersionC
Created TimeSat Jan 18 22:12:46 2025 +
Legal AnnouncementCopyright (C)2014-2024 Gowin Semiconductor Corporation. All rights reserved.
+

Timing Summaries

+

STA Tool Run Summary:

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
Setup Delay ModelSlow 0.95V 85C C8/I7
Hold Delay ModelFast 1.05V 0C C8/I7
Numbers of Paths Analyzed124
Numbers of Endpoints Analyzed12
Numbers of Falling Endpoints0
Numbers of Setup Violated Endpoints0
Numbers of Hold Violated Endpoints0
+

Clock Summary:

+ + + + + + + + + + + + +
Clock NameTypePeriodFrequency(MHz)RiseFallSourceMasterObjects
+

Max Frequency Summary:

+ + + + + + + + + +
NO.Clock NameConstraintActual FmaxLogic LevelEntity
+

Total Negative Slack Summary:

+ + + + + + + +
Clock NameAnalysis TypeEndpoints TNSNumber of Endpoints
+

Timing Details

+

Path Slacks Table:

+

Setup Paths Table

+

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

+

Nothing to report!

+

Hold Paths Table

+

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

+

Nothing to report!

+

Recovery Paths Table

+

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

+

Nothing to report!

+

Removal Paths Table

+

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

+

Nothing to report!

+

Minimum Pulse Width Table:

+ + + + + + + + + + +

Report Command:report_min_pulse_width -nworst 10 -detail

+

Nothing to report!

+
NumberSlackActual WidthRequired WidthTypeClockObjects
+

Timing Report By Analysis Type:

+

Setup Analysis Report

+

Report Command:report_timing -setup -max_paths 25 -max_common_paths 1

+

No setup paths to report!

+

Hold Analysis Report

+

Report Command:report_timing -hold -max_paths 25 -max_common_paths 1

+

No hold paths to report!

+

Recovery Analysis Report

+

Report Command:report_timing -recovery -max_paths 25 -max_common_paths 1

+

No recovery paths to report!

+

Removal Analysis Report

+

Report Command:report_timing -removal -max_paths 25 -max_common_paths 1

+

No removal paths to report!

+

Minimum Pulse Width Report:

+

Report Command:report_min_pulse_width -nworst 10 -detail

+

Nothing to report!

+

High Fanout Nets Report:

+

Report Command:report_high_fanout_nets -max_nets 10

+ + + + + + + +
FANOUTNET NAMEWORST SLACKMAX DELAY
+

Route Congestions Report:

+

Report Command:report_route_congestion -max_grids 10

+ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + +
GRID LOCROUTE CONGESTIONS
R29C2952.78%
R30C2940.28%
R27C2933.33%
R30C2833.33%
R29C2827.78%
R29C3027.78%
R30C2726.39%
R29C2723.61%
R30C3019.44%
R27C2819.44%
+

Timing Exceptions Report:

+

Setup Analysis Report

+

Report Command:report_exceptions -setup -max_paths 5 -max_common_paths 1

+

No timing exceptions to report!

+

Hold Analysis Report

+

Report Command:report_exceptions -hold -max_paths 5 -max_common_paths 1

+

No timing exceptions to report!

+

Recovery Analysis Report

+

Report Command:report_exceptions -recovery -max_paths 5 -max_common_paths 1

+

No timing exceptions to report!

+

Removal Analysis Report

+

Report Command:report_exceptions -removal -max_paths 5 -max_common_paths 1

+

No timing exceptions to report!

+

Timing Constraints Report:

+ + + + + + +
SDC Command TypeStateDetail Command
+
+ + diff --git a/gowin/bttn/impl/pnr/cmd.do b/gowin/bttn/impl/pnr/cmd.do new file mode 100644 index 0000000..cfd83d0 --- /dev/null +++ b/gowin/bttn/impl/pnr/cmd.do @@ -0,0 +1,13 @@ +-d \\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\gwsynthesis\bttn.vg +-p GW2A-18C-PBGA256-8 +-pn GW2A-LV18PG256C8/I7 +-cst \\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\src\bttn.cst +-cfg \\wsl.localhost\Debian\home\koray\code\verilog\gowin\bttn\impl\pnr\device.cfg +-bit +-tr +-ph +-timing +-cst_error +-correct_hold 1 +-route_maxfan 23 +-global_freq 100.000 diff --git a/gowin/bttn/impl/pnr/device.cfg b/gowin/bttn/impl/pnr/device.cfg new file mode 100644 index 0000000..8a338e0 --- /dev/null +++ b/gowin/bttn/impl/pnr/device.cfg @@ -0,0 +1,21 @@ +set JTAG regular_io = false +set SSPI regular_io = false +set MSPI regular_io = false +set READY regular_io = false +set DONE regular_io = false +set I2C regular_io = false +set RECONFIG_N regular_io = false +set CRC_check = true +set compress = false +set encryption = false +set security_bit_enable = true +set bsram_init_fuse_print = true +set background_programming = off +set secure_mode = false +set program_done_bypass = false +set wake_up = 0 +set format = binary +set power_on_reset_monitor = true +set multiboot_spi_flash_address = 0x00000000 +set vccx = 3.3 +set unused_pin = default diff --git a/gowin/bttn/impl/temp/rtl_parser.result b/gowin/bttn/impl/temp/rtl_parser.result new file mode 100644 index 0000000..23e785f --- /dev/null +++ b/gowin/bttn/impl/temp/rtl_parser.result @@ -0,0 +1,702 @@ +[ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v", + "InstLine" : 1, + "InstName" : "bttn", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v", + "ModuleLine" : 1, + "ModuleName" : "bttn", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v", + "InstLine" : 10, + "InstName" : "a1", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/ALU.v", + "ModuleLine" : 1, + "ModuleName" : "ALU", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/ALU.v", + "InstLine" : 18, + "InstName" : "opCd", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/opCode.v", + "ModuleLine" : 1, + "ModuleName" : "opCode" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/ALU.v", + "InstLine" : 20, + "InstName" : "aU", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/arithmeticUnit.v", + "ModuleLine" : 1, + "ModuleName" : "arithmeticUnit", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/arithmeticUnit.v", + "InstLine" : 13, + "InstName" : "a1", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/addition.v", + "ModuleLine" : 1, + "ModuleName" : "addition", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/addition.v", + "InstLine" : 11, + "InstName" : "f0", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fulladder.v", + "ModuleLine" : 1, + "ModuleName" : "fulladder", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fulladder.v", + "InstLine" : 8, + "InstName" : "h1", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfadder.v", + "ModuleLine" : 1, + "ModuleName" : "halfadder" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fulladder.v", + "InstLine" : 9, + "InstName" : "h2", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfadder.v", + "ModuleLine" : 1, + "ModuleName" : "halfadder" + } + ] + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/addition.v", + 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: 76, + "InstName" : "btod1", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "ModuleLine" : 1, + "ModuleName" : "BinaryToBCD", + "SubInsts" : [ + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 14, + "InstName" : "d1t", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 23, + "InstName" : "d2u", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 32, + "InstName" : "d3v", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 41, + "InstName" : "d4w", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 50, + "InstName" : "d5x", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 59, + "InstName" : "d6y", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "InstLine" : 68, + "InstName" : "d7z", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "ModuleLine" : 1, + "ModuleName" : "dabble" + } + ] + } + ] + }, + { + "InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v", + "InstLine" : 11, + "InstName" : "s1", + "ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/selector.v", + "ModuleLine" : 1, + "ModuleName" : "selector" + } + ] + } +] \ No newline at end of file diff --git a/gowin/bttn/impl/temp/rtl_parser_arg.json b/gowin/bttn/impl/temp/rtl_parser_arg.json new file mode 100644 index 0000000..dc256ec --- /dev/null +++ b/gowin/bttn/impl/temp/rtl_parser_arg.json @@ -0,0 +1,73 @@ +{ + "Device" : "GW2A-18C", + "Files" : [ + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/ALU.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/BinaryToBCD.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/addition.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/arithmeticUnit.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/bttn.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/dabble.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fulladder.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/fullsubtraction.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfadder.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/halfsubtraction.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/logicUnit.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/multiplier.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/opCode.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/selector.v", + "Type" : "verilog" + }, + { + "Path" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/src/subtraction.v", + "Type" : "verilog" + } + ], + "IncludePath" : [ + + ], + "LoopLimit" : 2000, + "ResultFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/bttn/impl/temp/rtl_parser.result", + "Top" : "", + "VerilogStd" : "verilog_2001", + "VhdlStd" : "vhdl_93" +} \ No newline at end of file diff --git a/gowin/bttn/impl/temp/style.css b/gowin/bttn/impl/temp/style.css new file mode 100644 index 0000000..e69de29 diff --git a/gowin/bttn/src/ALU.v b/gowin/bttn/src/ALU.v new file mode 100644 index 0000000..a7bc1e9 --- /dev/null +++ b/gowin/bttn/src/ALU.v @@ -0,0 +1,79 @@ +module ALU ( + input [3:0] A, B, + input CarryIN, + input [2:0] opCodeA, + output [11:0] bcd, + output CarryOUT, overflow +); + +// Supports: ADD[0], SUB[1], MULT[2], AND[4], OR[5], XOR[6] + +wire [7:0] opCode8; +wire [3:0] add_Y, sub_Y; +wire [3:0] resultA, resultO, resultX, lUOutput1; +wire [3:0] aUtemp1, aUtemp2, lUOutput2; +wire [3:0] wireY, wireLA; +wire [7:0] opwireM, wireM, Y; + +opCode opCd (.A(opCodeA), .opCode(opCode8)); + +arithmeticUnit aU(.opCode(opCode8[1:0]), .A(A), .B(B), .CarryIN(CarryIN), .add_Y(add_Y), .sub_Y(sub_Y), .CarryOUT(CarryOUT), .overflow(overflow)); +logicUnit lU (.opCode(opCode8[6:4]), .A(A), .B(B), .resultA(resultA), .resultO(resultO), .resultX(resultX)); +multiplier mU (.A(A), .B(B), .Y(opwireM)); + +or o01 (lUOutput1[0], resultA[0], resultO[0]); +or o02 (lUOutput1[1], resultA[1], resultO[1]); +or o03 (lUOutput1[2], resultA[2], resultO[2]); +or o04 (lUOutput1[3], resultA[3], resultO[3]); + +or o11 (lUOutput2[0], lUOutput1[0], resultX[0]); +or o12 (lUOutput2[1], lUOutput1[1], resultX[1]); +or o13 (lUOutput2[2], lUOutput1[2], resultX[2]); +or o14 (lUOutput2[3], lUOutput1[3], resultX[3]); + + +and a01 (aUtemp1[0], opCode8[0], add_Y[0]); +and a02 (aUtemp1[1], opCode8[0], add_Y[1]); +and a03 (aUtemp1[2], opCode8[0], add_Y[2]); +and a04 (aUtemp1[3], opCode8[0], add_Y[3]); + + +and a11 (aUtemp2[0], opCode8[1], sub_Y[0]); +and a12 (aUtemp2[1], opCode8[1], sub_Y[1]); +and a13 (aUtemp2[2], opCode8[1], sub_Y[2]); +and a14 (aUtemp2[3], opCode8[1], sub_Y[3]); + +and a21 (wireM[0], opCode8[2], opwireM[0]); +and a22 (wireM[1], opCode8[2], opwireM[1]); +and a23 (wireM[2], opCode8[2], opwireM[2]); +and a24 (wireM[3], opCode8[2], opwireM[3]); +and a25 (wireM[4], opCode8[2], opwireM[4]); +and a26 (wireM[5], opCode8[2], opwireM[5]); +and a27 (wireM[6], opCode8[2], opwireM[6]); +and a28 (wireM[7], opCode8[2], opwireM[7]); + + +or o21 (wireY[0], aUtemp1[0], aUtemp2[0]); +or o22 (wireY[1], aUtemp1[1], aUtemp2[1]); +or o23 (wireY[2], aUtemp1[2], aUtemp2[2]); +or o24 (wireY[3], aUtemp1[3], aUtemp2[3]); + + +or o1 (wireLA[0], lUOutput2[0], wireY[0]); +or o2 (wireLA[1], lUOutput2[1], wireY[1]); +or o3 (wireLA[2], lUOutput2[2], wireY[2]); +or o4 (wireLA[3], lUOutput2[3], wireY[3]); + +or o31 (Y[0], wireLA[0], wireM[0]); +or o32 (Y[1], wireLA[1], wireM[1]); +or o33 (Y[2], wireLA[2], wireM[2]); +or o34 (Y[3], wireLA[3], wireM[3]); +or o35 (Y[4], 1'b0, wireM[4]); +or o36 (Y[5], 1'b0, wireM[5]); +or o37 (Y[6], 1'b0, wireM[6]); +or o38 (Y[7], 1'b0, wireM[7]); + +BinaryToBCD btod1(.binary(Y), .bcd(bcd)); // WIRE Y BINARY!!!! + + +endmodule diff --git a/gowin/bttn/src/BinaryToBCD.v b/gowin/bttn/src/BinaryToBCD.v new file mode 100644 index 0000000..591e987 --- /dev/null +++ b/gowin/bttn/src/BinaryToBCD.v @@ -0,0 +1,79 @@ +module BinaryToBCD ( + input [7:0] binary, + output [11:0] bcd +); + +wire empty1, empty2; +wire [3:0] dab1, dab2, dab3, dab4, dab5; + +and a111 (empty1, 1'b0, 1'b0); +and a000 (empty2, 1'b0, 1'b0); +and a222 (bcd[11], 1'b0, 1'b0); +and a223 (bcd[10], 1'b0, 1'b0); + +dabble d1t (.A((empty1)), +.B(binary[7]), +.C(binary[6]), +.D(binary[5]), +.X(dab1[0]), +.Y(dab1[1]), +.Z(dab1[2]), +.E(dab1[3])); + +dabble d2u (.A((dab1[1])), +.B(dab1[2]), +.C(dab1[3]), +.D(binary[4]), +.X(dab2[0]), +.Y(dab2[1]), +.Z(dab2[2]), +.E(dab2[3])); + +dabble d3v (.A((dab2[1])), +.B(dab2[2]), +.C(dab2[3]), +.D(binary[3]), +.X(dab3[0]), +.Y(dab3[1]), +.Z(dab3[2]), +.E(dab3[3])); + +dabble d4w (.A((empty2)), +.B(dab1[0]), +.C(dab2[0]), +.D(dab3[0]), +.X(bcd[9]), +.Y(dab4[1]), +.Z(dab4[2]), +.E(dab4[3])); + +dabble d5x (.A((dab3[1])), +.B(dab3[2]), +.C(dab3[3]), +.D(binary[2]), +.X(dab5[0]), +.Y(dab5[1]), +.Z(dab5[2]), +.E(dab5[3])); + +dabble d6y (.A((dab4[1])), +.B(dab4[2]), +.C(dab4[3]), +.D(dab5[0]), +.X(bcd[8]), +.Y(bcd[7]), +.Z(bcd[6]), +.E(bcd[5])); + +dabble d7z (.A((dab5[1])), +.B(dab5[2]), +.C(dab5[3]), +.D(binary[1]), +.X(bcd[4]), +.Y(bcd[3]), +.Z(bcd[2]), +.E(bcd[1])); + +or o1 (bcd[0], binary[0], 1'b0); + +endmodule diff --git a/gowin/bttn/src/addition.v b/gowin/bttn/src/addition.v new file mode 100644 index 0000000..38a4733 --- /dev/null +++ b/gowin/bttn/src/addition.v @@ -0,0 +1,20 @@ +module addition ( + input [3:0] A, B, + input CarryIN, + output [3:0] Y, + output CarryOUT, + output overflow +); + +wire [2:0] Carry4; + +fulladder f0(.A(A[0]), .B(B[0]), .Carry(CarryIN), .Sum(Y[0]), .CarryO(Carry4[0])); +fulladder f1(.A(A[1]), .B(B[1]), .Carry(Carry4[0]), .Sum(Y[1]), .CarryO(Carry4[1])); +fulladder f2(.A(A[2]), .B(B[2]), .Carry(Carry4[1]), .Sum(Y[2]), .CarryO(Carry4[2])); +fulladder f3(.A(A[3]), .B(B[3]), .Carry(Carry4[2]), .Sum(Y[3]), .CarryO(CarryOUT)); + + +//overflowDetect od1 (.opCode(2'b01), .A(A), .B(B), .Y(Y), .CarryOUT(CarryOUT), .overflowDetect(overflow)); (KULLANILMAYACAK!!!!) +xor ov1 (overflow, Carry4[2], CarryOUT); + +endmodule diff --git a/gowin/bttn/src/arithmeticUnit.v b/gowin/bttn/src/arithmeticUnit.v new file mode 100644 index 0000000..543dabc --- /dev/null +++ b/gowin/bttn/src/arithmeticUnit.v @@ -0,0 +1,33 @@ +module arithmeticUnit ( + input [1:0] opCode, + input [3:0] A, B, + input CarryIN, + output [3:0] add_Y, sub_Y, + output CarryOUT, + output overflow +); + +wire [3:0] addY, subY; +wire CarryOUTADD, CarryOUTSUB, tempCAdd, tempCSub, tempoverflow; + +addition a1(.A(A), .B(B), .CarryIN(CarryIN), .Y(addY), .CarryOUT(CarryOUTADD), .overflow(tempoverflow)); +subtraction s1(.A(A), .B(B), .BorrowIN(CarryIN), .Y(subY), .BorrowOUT(CarryOUTSUB)); + +and add1 (add_Y[0], opCode[0], addY[0]); +and add2 (add_Y[1], opCode[0], addY[1]); +and add3 (add_Y[2], opCode[0], addY[2]); +and add4 (add_Y[3], opCode[0], addY[3]); + +and sub1 (sub_Y[0], opCode[1], subY[0]); +and sub2 (sub_Y[1], opCode[1], subY[1]); +and sub3 (sub_Y[2], opCode[1], subY[2]); +and sub4 (sub_Y[3], opCode[1], subY[3]); + +// or or1 (CarryOUT, CarryOUTADD, CarryOUTSUB); (OLD!!!) +and and10 (tempCSub, CarryOUTSUB, opCode[1]); +and and11 (tempCAdd, CarryOUTADD, opCode[0]); +or or4 (CarryOUT, tempCAdd, tempCSub); + +and add12 (overflow, opCode[0], tempoverflow); + +endmodule diff --git a/gowin/bttn/src/bttn b/gowin/bttn/src/bttn new file mode 100644 index 0000000..4bbc3d8 --- /dev/null +++ b/gowin/bttn/src/bttn @@ -0,0 +1,2191 @@ +#! /usr/bin/vvp +:ivl_version "11.0 (stable)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; +S_0x5648984ee520 .scope module, "bttnTB" "bttnTB" 2 1; + .timescale 0 0; +v0x5648985daf80_0 .var "A", 3 0; +v0x5648985db060_0 .var "B", 3 0; +v0x5648985db230_0 .net "Y", 11 0, v0x5648985da450_0; 1 drivers +v0x5648985db320_0 .var "opCodeA", 2 0; +v0x5648985db3e0_0 .var "select", 1 0; +S_0x5648985925d0 .scope module, "uut" "bttn" 2 8, 3 1 0, S_0x5648984ee520; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 3 "opCodeA"; + .port_info 3 /INPUT 2 "select"; + .port_info 4 /OUTPUT 12 "Y"; +v0x5648985da870_0 .net "A", 3 0, v0x5648985daf80_0; 1 drivers +v0x5648985da950_0 .net "B", 3 0, v0x5648985db060_0; 1 drivers +v0x5648985daa10_0 .net "Y", 11 0, v0x5648985da450_0; alias, 1 drivers +v0x5648985daab0_0 .net "opCodeA", 2 0, v0x5648985db320_0; 1 drivers +v0x5648985dab50_0 .net "select", 1 0, v0x5648985db3e0_0; 1 drivers +v0x5648985dac60_0 .net "selectY", 11 0, L_0x5648986065b0; 1 drivers +v0x5648985dad00_0 .net "wire1", 0 0, L_0x5648985e3850; 1 drivers +v0x5648985dadf0_0 .net "wire2", 0 0, L_0x5648985e3960; 1 drivers +S_0x56489858fba0 .scope module, "a1" "ALU" 3 10, 4 1 0, S_0x5648985925d0; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /INPUT 3 "opCodeA"; + .port_info 4 /OUTPUT 12 "bcd"; + .port_info 5 /OUTPUT 1 "CarryOUT"; + .port_info 6 /OUTPUT 1 "overflow"; +L_0x5648985f56e0 .functor OR 1, L_0x5648985f5750, L_0x5648985f5840, C4<0>, C4<0>; +L_0x5648985f5930 .functor OR 1, L_0x5648985f59a0, L_0x5648985f5b20, C4<0>, C4<0>; +L_0x5648985f5c50 .functor OR 1, L_0x5648985f5cc0, L_0x5648985f5d60, C4<0>, C4<0>; +L_0x5648985f6030 .functor OR 1, L_0x5648985f60f0, L_0x5648985f61e0, C4<0>, C4<0>; +L_0x5648985f6280 .functor OR 1, L_0x5648985f62f0, L_0x5648985f64a0, C4<0>, C4<0>; +L_0x5648985f6590 .functor OR 1, L_0x5648985f6600, L_0x5648985f6770, C4<0>, C4<0>; +L_0x5648985f6430 .functor OR 1, L_0x5648985f68f0, L_0x5648985f6ab0, C4<0>, C4<0>; +L_0x5648985f6d80 .functor OR 1, L_0x5648985f6e90, L_0x5648985f6f80, C4<0>, C4<0>; +L_0x5648985f7120 .functor AND 1, L_0x5648985f6ce0, L_0x5648985f71e0, C4<1>, C4<1>; +L_0x5648985f7390 .functor AND 1, L_0x5648985f7400, L_0x5648985f74a0, C4<1>, C4<1>; +L_0x5648985f7660 .functor AND 1, L_0x5648985f76d0, L_0x5648985f7770, C4<1>, C4<1>; +L_0x5648985f7ad0 .functor AND 1, L_0x5648985f7c00, L_0x5648985f7de0, C4<1>, C4<1>; +L_0x5648985f7ed0 .functor AND 1, L_0x5648985f7f40, L_0x5648985f8130, C4<1>, C4<1>; +L_0x5648985f8220 .functor AND 1, L_0x5648985f8310, L_0x5648985f8510, C4<1>, C4<1>; +L_0x5648985f7b90 .functor AND 1, L_0x5648985f8600, L_0x5648985f87c0, C4<1>, C4<1>; +L_0x5648985f86a0 .functor AND 1, L_0x5648985f8c00, L_0x5648985f8ca0, C4<1>, C4<1>; +L_0x5648985f8ed0 .functor AND 1, L_0x5648985f8f40, L_0x5648985f9030, C4<1>, C4<1>; +L_0x5648985f9270 .functor AND 1, L_0x5648985f9380, L_0x5648985f9470, C4<1>, C4<1>; +L_0x5648985f96c0 .functor AND 1, L_0x5648985f9730, L_0x5648985f97d0, C4<1>, C4<1>; +L_0x5648985f9a30 .functor AND 1, L_0x5648985f92e0, L_0x5648985f9ba0, C4<1>, C4<1>; +L_0x5648985f9e10 .functor AND 1, L_0x5648985f9e80, L_0x5648985f9f70, C4<1>, C4<1>; +L_0x5648985fa1f0 .functor AND 1, L_0x5648985f9aa0, L_0x5648985fa370, C4<1>, C4<1>; +L_0x5648985fa600 .functor AND 1, L_0x5648985fa670, L_0x5648985fa760, C4<1>, C4<1>; +L_0x5648985fad20 .functor AND 1, L_0x5648985faeb0, L_0x5648985fb160, C4<1>, C4<1>; +L_0x5648985fb250 .functor OR 1, L_0x5648985fb2c0, L_0x5648985fb5d0, C4<0>, C4<0>; +L_0x5648985fb710 .functor OR 1, L_0x5648985fb860, L_0x5648985fbb30, C4<0>, C4<0>; +L_0x5648985fbc20 .functor OR 1, L_0x5648985fbc90, L_0x5648985fbf70, C4<0>, C4<0>; +L_0x5648985fc3e0 .functor OR 1, L_0x5648985fc590, L_0x5648985fc680, C4<0>, C4<0>; +L_0x5648985fc980 .functor OR 1, L_0x5648985fc9f0, L_0x5648985fcb30, C4<0>, C4<0>; +L_0x5648985fce90 .functor OR 1, L_0x5648985fd000, L_0x5648985fd0f0, C4<0>, C4<0>; +L_0x5648985fd410 .functor OR 1, L_0x5648985fd480, L_0x5648985fd600, C4<0>, C4<0>; +L_0x5648985fdab0 .functor OR 1, L_0x5648985fdc80, L_0x5648985fdfc0, C4<0>, C4<0>; +L_0x5648985fe0b0 .functor OR 1, L_0x5648985fe120, L_0x5648985fe4c0, C4<0>, C4<0>; +L_0x5648985fe600 .functor OR 1, L_0x5648985fe790, L_0x5648985feaf0, C4<0>, C4<0>; +L_0x5648985febe0 .functor OR 1, L_0x5648985fec50, L_0x5648985ff050, C4<0>, C4<0>; +L_0x5648985ff180 .functor OR 1, L_0x5648985fe670, L_0x5648985ff5b0, C4<0>, C4<0>; +L_0x7f69dc15a330 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985ff650 .functor OR 1, L_0x7f69dc15a330, L_0x5648985ff710, C4<0>, C4<0>; +L_0x7f69dc15a378 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985ffaa0 .functor OR 1, L_0x7f69dc15a378, L_0x5648985ffca0, C4<0>, C4<0>; +L_0x7f69dc15a3c0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985ffd90 .functor OR 1, L_0x7f69dc15a3c0, L_0x5648985ffe50, C4<0>, C4<0>; +L_0x7f69dc15a408 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898600560 .functor OR 1, L_0x7f69dc15a408, L_0x5648986007c0, C4<0>, C4<0>; +v0x5648985d1640_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985d1700_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +L_0x7f69dc15a6d8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x5648985d17c0_0 .net "CarryIN", 0 0, L_0x7f69dc15a6d8; 1 drivers +v0x5648985d1860_0 .net "CarryOUT", 0 0, L_0x5648985e3850; alias, 1 drivers +v0x5648985d1930_0 .net "Y", 7 0, L_0x5648986001f0; 1 drivers +v0x5648985d19d0_0 .net *"_ivl_10", 0 0, L_0x5648985f5930; 1 drivers +v0x5648985d1a70_0 .net *"_ivl_101", 0 0, L_0x5648985f8c00; 1 drivers +v0x5648985d1b50_0 .net *"_ivl_103", 0 0, L_0x5648985f8ca0; 1 drivers +v0x5648985d1c30_0 .net *"_ivl_104", 0 0, L_0x5648985f8ed0; 1 drivers +v0x5648985d1d10_0 .net *"_ivl_107", 0 0, L_0x5648985f8f40; 1 drivers +v0x5648985d1df0_0 .net *"_ivl_109", 0 0, L_0x5648985f9030; 1 drivers +v0x5648985d1ed0_0 .net *"_ivl_110", 0 0, L_0x5648985f9270; 1 drivers +v0x5648985d1fb0_0 .net *"_ivl_113", 0 0, L_0x5648985f9380; 1 drivers +v0x5648985d2090_0 .net *"_ivl_115", 0 0, L_0x5648985f9470; 1 drivers +v0x5648985d2170_0 .net *"_ivl_116", 0 0, L_0x5648985f96c0; 1 drivers +v0x5648985d2250_0 .net *"_ivl_119", 0 0, L_0x5648985f9730; 1 drivers +v0x5648985d2330_0 .net *"_ivl_121", 0 0, L_0x5648985f97d0; 1 drivers +v0x5648985d2520_0 .net *"_ivl_122", 0 0, L_0x5648985f9a30; 1 drivers +v0x5648985d2600_0 .net *"_ivl_125", 0 0, L_0x5648985f92e0; 1 drivers +v0x5648985d26e0_0 .net *"_ivl_127", 0 0, L_0x5648985f9ba0; 1 drivers +v0x5648985d27c0_0 .net *"_ivl_128", 0 0, L_0x5648985f9e10; 1 drivers +v0x5648985d28a0_0 .net *"_ivl_13", 0 0, L_0x5648985f59a0; 1 drivers +v0x5648985d2980_0 .net *"_ivl_131", 0 0, L_0x5648985f9e80; 1 drivers +v0x5648985d2a60_0 .net *"_ivl_133", 0 0, L_0x5648985f9f70; 1 drivers +v0x5648985d2b40_0 .net *"_ivl_134", 0 0, L_0x5648985fa1f0; 1 drivers +v0x5648985d2c20_0 .net *"_ivl_137", 0 0, L_0x5648985f9aa0; 1 drivers +v0x5648985d2d00_0 .net *"_ivl_139", 0 0, L_0x5648985fa370; 1 drivers +v0x5648985d2de0_0 .net *"_ivl_140", 0 0, L_0x5648985fa600; 1 drivers +v0x5648985d2ec0_0 .net *"_ivl_143", 0 0, L_0x5648985fa670; 1 drivers +v0x5648985d2fa0_0 .net *"_ivl_145", 0 0, L_0x5648985fa760; 1 drivers +v0x5648985d3080_0 .net *"_ivl_146", 0 0, L_0x5648985fad20; 1 drivers +v0x5648985d3160_0 .net *"_ivl_15", 0 0, L_0x5648985f5b20; 1 drivers +v0x5648985d3240_0 .net *"_ivl_150", 0 0, L_0x5648985faeb0; 1 drivers +v0x5648985d3320_0 .net *"_ivl_152", 0 0, L_0x5648985fb160; 1 drivers +v0x5648985d3400_0 .net *"_ivl_153", 0 0, L_0x5648985fb250; 1 drivers +v0x5648985d34e0_0 .net *"_ivl_156", 0 0, L_0x5648985fb2c0; 1 drivers +v0x5648985d35c0_0 .net *"_ivl_158", 0 0, L_0x5648985fb5d0; 1 drivers +v0x5648985d36a0_0 .net *"_ivl_159", 0 0, L_0x5648985fb710; 1 drivers +v0x5648985d3780_0 .net *"_ivl_16", 0 0, L_0x5648985f5c50; 1 drivers +v0x5648985d3860_0 .net *"_ivl_162", 0 0, L_0x5648985fb860; 1 drivers +v0x5648985d3940_0 .net *"_ivl_164", 0 0, L_0x5648985fbb30; 1 drivers +v0x5648985d3a20_0 .net *"_ivl_165", 0 0, L_0x5648985fbc20; 1 drivers +v0x5648985d3b00_0 .net *"_ivl_168", 0 0, L_0x5648985fbc90; 1 drivers +v0x5648985d3be0_0 .net *"_ivl_170", 0 0, L_0x5648985fbf70; 1 drivers +v0x5648985d3cc0_0 .net *"_ivl_171", 0 0, L_0x5648985fc3e0; 1 drivers +v0x5648985d3da0_0 .net *"_ivl_175", 0 0, L_0x5648985fc590; 1 drivers +v0x5648985d3e80_0 .net *"_ivl_177", 0 0, L_0x5648985fc680; 1 drivers +v0x5648985d3f60_0 .net *"_ivl_178", 0 0, L_0x5648985fc980; 1 drivers +v0x5648985d4040_0 .net *"_ivl_181", 0 0, L_0x5648985fc9f0; 1 drivers +v0x5648985d4120_0 .net *"_ivl_183", 0 0, L_0x5648985fcb30; 1 drivers +v0x5648985d4200_0 .net *"_ivl_184", 0 0, L_0x5648985fce90; 1 drivers +v0x5648985d42e0_0 .net *"_ivl_187", 0 0, L_0x5648985fd000; 1 drivers +v0x5648985d43c0_0 .net *"_ivl_189", 0 0, L_0x5648985fd0f0; 1 drivers +v0x5648985d44a0_0 .net *"_ivl_19", 0 0, L_0x5648985f5cc0; 1 drivers +v0x5648985d4580_0 .net *"_ivl_190", 0 0, L_0x5648985fd410; 1 drivers +v0x5648985d4660_0 .net *"_ivl_193", 0 0, L_0x5648985fd480; 1 drivers +v0x5648985d4740_0 .net *"_ivl_195", 0 0, L_0x5648985fd600; 1 drivers +v0x5648985d4820_0 .net *"_ivl_196", 0 0, L_0x5648985fdab0; 1 drivers +v0x5648985d4900_0 .net *"_ivl_200", 0 0, L_0x5648985fdc80; 1 drivers +v0x5648985d49e0_0 .net *"_ivl_202", 0 0, L_0x5648985fdfc0; 1 drivers +v0x5648985d4ac0_0 .net *"_ivl_203", 0 0, L_0x5648985fe0b0; 1 drivers +v0x5648985d4ba0_0 .net *"_ivl_206", 0 0, L_0x5648985fe120; 1 drivers +v0x5648985d4c80_0 .net *"_ivl_208", 0 0, L_0x5648985fe4c0; 1 drivers +v0x5648985d4d60_0 .net *"_ivl_209", 0 0, L_0x5648985fe600; 1 drivers +v0x5648985d4e40_0 .net *"_ivl_21", 0 0, L_0x5648985f5d60; 1 drivers +v0x5648985d5330_0 .net *"_ivl_212", 0 0, L_0x5648985fe790; 1 drivers +v0x5648985d5410_0 .net *"_ivl_214", 0 0, L_0x5648985feaf0; 1 drivers +v0x5648985d54f0_0 .net *"_ivl_215", 0 0, L_0x5648985febe0; 1 drivers +v0x5648985d55d0_0 .net *"_ivl_218", 0 0, L_0x5648985fec50; 1 drivers +v0x5648985d56b0_0 .net *"_ivl_22", 0 0, L_0x5648985f6030; 1 drivers +v0x5648985d5790_0 .net *"_ivl_220", 0 0, L_0x5648985ff050; 1 drivers +v0x5648985d5870_0 .net *"_ivl_221", 0 0, L_0x5648985ff180; 1 drivers +v0x5648985d5950_0 .net *"_ivl_224", 0 0, L_0x5648985fe670; 1 drivers +v0x5648985d5a30_0 .net *"_ivl_226", 0 0, L_0x5648985ff5b0; 1 drivers +v0x5648985d5b10_0 .net *"_ivl_227", 0 0, L_0x5648985ff650; 1 drivers +v0x5648985d5bf0_0 .net/2u *"_ivl_229", 0 0, L_0x7f69dc15a330; 1 drivers +v0x5648985d5cd0_0 .net *"_ivl_232", 0 0, L_0x5648985ff710; 1 drivers +v0x5648985d5db0_0 .net *"_ivl_233", 0 0, L_0x5648985ffaa0; 1 drivers +v0x5648985d5e90_0 .net/2u *"_ivl_235", 0 0, L_0x7f69dc15a378; 1 drivers +v0x5648985d5f70_0 .net *"_ivl_238", 0 0, L_0x5648985ffca0; 1 drivers +v0x5648985d6050_0 .net *"_ivl_239", 0 0, L_0x5648985ffd90; 1 drivers +v0x5648985d6130_0 .net/2u *"_ivl_241", 0 0, L_0x7f69dc15a3c0; 1 drivers +v0x5648985d6210_0 .net *"_ivl_244", 0 0, L_0x5648985ffe50; 1 drivers +v0x5648985d62f0_0 .net *"_ivl_245", 0 0, L_0x564898600560; 1 drivers +v0x5648985d63d0_0 .net/2u *"_ivl_248", 0 0, L_0x7f69dc15a408; 1 drivers +v0x5648985d64b0_0 .net *"_ivl_251", 0 0, L_0x5648986007c0; 1 drivers +v0x5648985d6590_0 .net *"_ivl_26", 0 0, L_0x5648985f60f0; 1 drivers +v0x5648985d6670_0 .net *"_ivl_28", 0 0, L_0x5648985f61e0; 1 drivers +v0x5648985d6750_0 .net *"_ivl_29", 0 0, L_0x5648985f6280; 1 drivers +v0x5648985d6830_0 .net *"_ivl_32", 0 0, L_0x5648985f62f0; 1 drivers +v0x5648985d6910_0 .net *"_ivl_34", 0 0, L_0x5648985f64a0; 1 drivers +v0x5648985d69f0_0 .net *"_ivl_35", 0 0, L_0x5648985f6590; 1 drivers +v0x5648985d6ad0_0 .net *"_ivl_38", 0 0, L_0x5648985f6600; 1 drivers +v0x5648985d6bb0_0 .net *"_ivl_4", 0 0, L_0x5648985f56e0; 1 drivers +v0x5648985d6c90_0 .net *"_ivl_40", 0 0, L_0x5648985f6770; 1 drivers +v0x5648985d6d70_0 .net *"_ivl_41", 0 0, L_0x5648985f6430; 1 drivers +v0x5648985d6e50_0 .net *"_ivl_44", 0 0, L_0x5648985f68f0; 1 drivers +v0x5648985d6f30_0 .net *"_ivl_46", 0 0, L_0x5648985f6ab0; 1 drivers +v0x5648985d7010_0 .net *"_ivl_47", 0 0, L_0x5648985f6d80; 1 drivers +v0x5648985d70f0_0 .net *"_ivl_51", 0 0, L_0x5648985f6e90; 1 drivers +v0x5648985d71d0_0 .net *"_ivl_53", 0 0, L_0x5648985f6f80; 1 drivers +v0x5648985d72b0_0 .net *"_ivl_54", 0 0, L_0x5648985f7120; 1 drivers +v0x5648985d7390_0 .net *"_ivl_57", 0 0, L_0x5648985f6ce0; 1 drivers +v0x5648985d7470_0 .net *"_ivl_59", 0 0, L_0x5648985f71e0; 1 drivers +v0x5648985d7550_0 .net *"_ivl_60", 0 0, L_0x5648985f7390; 1 drivers +v0x5648985d7630_0 .net *"_ivl_63", 0 0, L_0x5648985f7400; 1 drivers +v0x5648985d7710_0 .net *"_ivl_65", 0 0, L_0x5648985f74a0; 1 drivers +v0x5648985d77f0_0 .net *"_ivl_66", 0 0, L_0x5648985f7660; 1 drivers +v0x5648985d78d0_0 .net *"_ivl_69", 0 0, L_0x5648985f76d0; 1 drivers +v0x5648985d79b0_0 .net *"_ivl_7", 0 0, L_0x5648985f5750; 1 drivers +v0x5648985d7a90_0 .net *"_ivl_71", 0 0, L_0x5648985f7770; 1 drivers +v0x5648985d7b70_0 .net *"_ivl_72", 0 0, L_0x5648985f7ad0; 1 drivers +v0x5648985d7c50_0 .net *"_ivl_76", 0 0, L_0x5648985f7c00; 1 drivers +v0x5648985d7d30_0 .net *"_ivl_78", 0 0, L_0x5648985f7de0; 1 drivers +v0x5648985d7e10_0 .net *"_ivl_79", 0 0, L_0x5648985f7ed0; 1 drivers +v0x5648985d7ef0_0 .net *"_ivl_82", 0 0, L_0x5648985f7f40; 1 drivers +v0x5648985d7fd0_0 .net *"_ivl_84", 0 0, L_0x5648985f8130; 1 drivers +v0x5648985d80b0_0 .net *"_ivl_85", 0 0, L_0x5648985f8220; 1 drivers +v0x5648985d8190_0 .net *"_ivl_88", 0 0, L_0x5648985f8310; 1 drivers +v0x5648985d8270_0 .net *"_ivl_9", 0 0, L_0x5648985f5840; 1 drivers +v0x5648985d8350_0 .net *"_ivl_90", 0 0, L_0x5648985f8510; 1 drivers +v0x5648985d8430_0 .net *"_ivl_91", 0 0, L_0x5648985f7b90; 1 drivers +v0x5648985d8510_0 .net *"_ivl_94", 0 0, L_0x5648985f8600; 1 drivers +v0x5648985d85f0_0 .net *"_ivl_96", 0 0, L_0x5648985f87c0; 1 drivers +v0x5648985d86d0_0 .net *"_ivl_97", 0 0, L_0x5648985f86a0; 1 drivers +v0x5648985d87b0_0 .net "aUtemp1", 3 0, L_0x5648985f7940; 1 drivers +v0x5648985d8890_0 .net "aUtemp2", 3 0, L_0x5648985f88b0; 1 drivers +v0x5648985d8970_0 .net "add_Y", 3 0, L_0x5648985e2210; 1 drivers +v0x5648985d8a60_0 .net "bcd", 11 0, L_0x5648986065b0; alias, 1 drivers +v0x5648985d9340_0 .net "lUOutput1", 3 0, L_0x5648985f5ea0; 1 drivers +v0x5648985d9400_0 .net "lUOutput2", 3 0, L_0x5648985f6b50; 1 drivers +v0x5648985d94e0_0 .net "opCode8", 7 0, L_0x5648985dca90; 1 drivers +v0x5648985d95d0_0 .net "opCodeA", 2 0, v0x5648985db320_0; alias, 1 drivers +v0x5648985d96a0_0 .net "opwireM", 7 0, L_0x5648985f4f10; 1 drivers +v0x5648985d9770_0 .net "overflow", 0 0, L_0x5648985e3960; alias, 1 drivers +v0x5648985d9840_0 .net "resultA", 3 0, L_0x5648985e6b80; 1 drivers +v0x5648985d9910_0 .net "resultO", 3 0, L_0x5648985e7d00; 1 drivers +v0x5648985d99e0_0 .net "resultX", 3 0, L_0x5648985e8f60; 1 drivers +v0x5648985d9ab0_0 .net "sub_Y", 3 0, L_0x5648985e2f90; 1 drivers +v0x5648985d9b80_0 .net "wireLA", 3 0, L_0x5648985fd970; 1 drivers +v0x5648985d9c20_0 .net "wireM", 7 0, L_0x5648985faa00; 1 drivers +v0x5648985d9d00_0 .net "wireY", 3 0, L_0x5648985fc0a0; 1 drivers +L_0x5648985e3a90 .part L_0x5648985dca90, 0, 2; +L_0x5648985e97d0 .part L_0x5648985dca90, 4, 3; +L_0x5648985f5750 .part L_0x5648985e6b80, 0, 1; +L_0x5648985f5840 .part L_0x5648985e7d00, 0, 1; +L_0x5648985f59a0 .part L_0x5648985e6b80, 1, 1; +L_0x5648985f5b20 .part L_0x5648985e7d00, 1, 1; +L_0x5648985f5cc0 .part L_0x5648985e6b80, 2, 1; +L_0x5648985f5d60 .part L_0x5648985e7d00, 2, 1; +L_0x5648985f5ea0 .concat8 [ 1 1 1 1], L_0x5648985f56e0, L_0x5648985f5930, L_0x5648985f5c50, L_0x5648985f6030; +L_0x5648985f60f0 .part L_0x5648985e6b80, 3, 1; +L_0x5648985f61e0 .part L_0x5648985e7d00, 3, 1; +L_0x5648985f62f0 .part L_0x5648985f5ea0, 0, 1; +L_0x5648985f64a0 .part L_0x5648985e8f60, 0, 1; +L_0x5648985f6600 .part L_0x5648985f5ea0, 1, 1; +L_0x5648985f6770 .part L_0x5648985e8f60, 1, 1; +L_0x5648985f68f0 .part L_0x5648985f5ea0, 2, 1; +L_0x5648985f6ab0 .part L_0x5648985e8f60, 2, 1; +L_0x5648985f6b50 .concat8 [ 1 1 1 1], L_0x5648985f6280, L_0x5648985f6590, L_0x5648985f6430, L_0x5648985f6d80; +L_0x5648985f6e90 .part L_0x5648985f5ea0, 3, 1; +L_0x5648985f6f80 .part L_0x5648985e8f60, 3, 1; +L_0x5648985f6ce0 .part L_0x5648985dca90, 0, 1; +L_0x5648985f71e0 .part L_0x5648985e2210, 0, 1; +L_0x5648985f7400 .part L_0x5648985dca90, 0, 1; +L_0x5648985f74a0 .part L_0x5648985e2210, 1, 1; +L_0x5648985f76d0 .part L_0x5648985dca90, 0, 1; +L_0x5648985f7770 .part L_0x5648985e2210, 2, 1; +L_0x5648985f7940 .concat8 [ 1 1 1 1], L_0x5648985f7120, L_0x5648985f7390, L_0x5648985f7660, L_0x5648985f7ad0; +L_0x5648985f7c00 .part L_0x5648985dca90, 0, 1; +L_0x5648985f7de0 .part L_0x5648985e2210, 3, 1; +L_0x5648985f7f40 .part L_0x5648985dca90, 1, 1; +L_0x5648985f8130 .part L_0x5648985e2f90, 0, 1; +L_0x5648985f8310 .part L_0x5648985dca90, 1, 1; +L_0x5648985f8510 .part L_0x5648985e2f90, 1, 1; +L_0x5648985f8600 .part L_0x5648985dca90, 1, 1; +L_0x5648985f87c0 .part L_0x5648985e2f90, 2, 1; +L_0x5648985f88b0 .concat8 [ 1 1 1 1], L_0x5648985f7ed0, L_0x5648985f8220, L_0x5648985f7b90, L_0x5648985f86a0; +L_0x5648985f8c00 .part L_0x5648985dca90, 1, 1; +L_0x5648985f8ca0 .part L_0x5648985e2f90, 3, 1; +L_0x5648985f8f40 .part L_0x5648985dca90, 2, 1; +L_0x5648985f9030 .part L_0x5648985f4f10, 0, 1; +L_0x5648985f9380 .part L_0x5648985dca90, 2, 1; +L_0x5648985f9470 .part L_0x5648985f4f10, 1, 1; +L_0x5648985f9730 .part L_0x5648985dca90, 2, 1; +L_0x5648985f97d0 .part L_0x5648985f4f10, 2, 1; +L_0x5648985f92e0 .part L_0x5648985dca90, 2, 1; +L_0x5648985f9ba0 .part L_0x5648985f4f10, 3, 1; +L_0x5648985f9e80 .part L_0x5648985dca90, 2, 1; +L_0x5648985f9f70 .part L_0x5648985f4f10, 4, 1; +L_0x5648985f9aa0 .part L_0x5648985dca90, 2, 1; +L_0x5648985fa370 .part L_0x5648985f4f10, 5, 1; +L_0x5648985fa670 .part L_0x5648985dca90, 2, 1; +L_0x5648985fa760 .part L_0x5648985f4f10, 6, 1; +LS_0x5648985faa00_0_0 .concat8 [ 1 1 1 1], L_0x5648985f8ed0, L_0x5648985f9270, L_0x5648985f96c0, L_0x5648985f9a30; +LS_0x5648985faa00_0_4 .concat8 [ 1 1 1 1], L_0x5648985f9e10, L_0x5648985fa1f0, L_0x5648985fa600, L_0x5648985fad20; +L_0x5648985faa00 .concat8 [ 4 4 0 0], LS_0x5648985faa00_0_0, LS_0x5648985faa00_0_4; +L_0x5648985faeb0 .part L_0x5648985dca90, 2, 1; +L_0x5648985fb160 .part L_0x5648985f4f10, 7, 1; +L_0x5648985fb2c0 .part L_0x5648985f7940, 0, 1; +L_0x5648985fb5d0 .part L_0x5648985f88b0, 0, 1; +L_0x5648985fb860 .part L_0x5648985f7940, 1, 1; +L_0x5648985fbb30 .part L_0x5648985f88b0, 1, 1; +L_0x5648985fbc90 .part L_0x5648985f7940, 2, 1; +L_0x5648985fbf70 .part L_0x5648985f88b0, 2, 1; +L_0x5648985fc0a0 .concat8 [ 1 1 1 1], L_0x5648985fb250, L_0x5648985fb710, L_0x5648985fbc20, L_0x5648985fc3e0; +L_0x5648985fc590 .part L_0x5648985f7940, 3, 1; +L_0x5648985fc680 .part L_0x5648985f88b0, 3, 1; +L_0x5648985fc9f0 .part L_0x5648985f6b50, 0, 1; +L_0x5648985fcb30 .part L_0x5648985fc0a0, 0, 1; +L_0x5648985fd000 .part L_0x5648985f6b50, 1, 1; +L_0x5648985fd0f0 .part L_0x5648985fc0a0, 1, 1; +L_0x5648985fd480 .part L_0x5648985f6b50, 2, 1; +L_0x5648985fd600 .part L_0x5648985fc0a0, 2, 1; +L_0x5648985fd970 .concat8 [ 1 1 1 1], L_0x5648985fc980, L_0x5648985fce90, L_0x5648985fd410, L_0x5648985fdab0; +L_0x5648985fdc80 .part L_0x5648985f6b50, 3, 1; +L_0x5648985fdfc0 .part L_0x5648985fc0a0, 3, 1; +L_0x5648985fe120 .part L_0x5648985fd970, 0, 1; +L_0x5648985fe4c0 .part L_0x5648985faa00, 0, 1; +L_0x5648985fe790 .part L_0x5648985fd970, 1, 1; +L_0x5648985feaf0 .part L_0x5648985faa00, 1, 1; +L_0x5648985fec50 .part L_0x5648985fd970, 2, 1; +L_0x5648985ff050 .part L_0x5648985faa00, 2, 1; +L_0x5648985fe670 .part L_0x5648985fd970, 3, 1; +L_0x5648985ff5b0 .part L_0x5648985faa00, 3, 1; +L_0x5648985ff710 .part L_0x5648985faa00, 4, 1; +L_0x5648985ffca0 .part L_0x5648985faa00, 5, 1; +L_0x5648985ffe50 .part L_0x5648985faa00, 6, 1; +LS_0x5648986001f0_0_0 .concat8 [ 1 1 1 1], L_0x5648985fe0b0, L_0x5648985fe600, L_0x5648985febe0, L_0x5648985ff180; +LS_0x5648986001f0_0_4 .concat8 [ 1 1 1 1], L_0x5648985ff650, L_0x5648985ffaa0, L_0x5648985ffd90, L_0x564898600560; +L_0x5648986001f0 .concat8 [ 4 4 0 0], LS_0x5648986001f0_0_0, LS_0x5648986001f0_0_4; +L_0x5648986007c0 .part L_0x5648985faa00, 7, 1; +S_0x56489858d800 .scope module, "aU" "arithmeticUnit" 4 20, 5 1 0, S_0x56489858fba0; + .timescale 0 0; + .port_info 0 /INPUT 2 "opCode"; + .port_info 1 /INPUT 4 "A"; + .port_info 2 /INPUT 4 "B"; + .port_info 3 /INPUT 1 "CarryIN"; + .port_info 4 /OUTPUT 4 "add_Y"; + .port_info 5 /OUTPUT 4 "sub_Y"; + .port_info 6 /OUTPUT 1 "CarryOUT"; + .port_info 7 /OUTPUT 1 "overflow"; +L_0x5648985e1b20 .functor AND 1, L_0x5648985e1bb0, L_0x5648985e1c50, C4<1>, C4<1>; +L_0x5648985e1cf0 .functor AND 1, L_0x5648985e1d60, L_0x5648985e1e50, C4<1>, C4<1>; +L_0x5648985e1fd0 .functor AND 1, L_0x5648985e2040, L_0x5648985e20e0, C4<1>, C4<1>; +L_0x5648985e23f0 .functor AND 1, L_0x5648985e24b0, L_0x5648985e2680, C4<1>, C4<1>; +L_0x5648985e2720 .functor AND 1, L_0x5648985e2790, L_0x5648985e28e0, C4<1>, C4<1>; +L_0x5648985e2980 .functor AND 1, L_0x5648985e2a30, L_0x5648985e2b90, C4<1>, C4<1>; +L_0x5648985e2d10 .functor AND 1, L_0x5648985e2d80, L_0x5648985e2ea0, C4<1>, C4<1>; +L_0x5648985e2b20 .functor AND 1, L_0x5648985e32a0, L_0x5648985e3390, C4<1>, C4<1>; +L_0x5648985e3520 .functor AND 1, L_0x5648985e1360, L_0x5648985e3590, C4<1>, C4<1>; +L_0x5648985e3630 .functor AND 1, L_0x5648985deaa0, L_0x5648985e3700, C4<1>, C4<1>; +L_0x5648985e3850 .functor OR 1, L_0x5648985e3630, L_0x5648985e3520, C4<0>, C4<0>; +L_0x5648985e3960 .functor AND 1, L_0x5648985e3480, L_0x5648985df0e0, C4<1>, C4<1>; +v0x5648985a92e0_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985a9410_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985a9520_0 .net "CarryIN", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x5648985a95c0_0 .net "CarryOUT", 0 0, L_0x5648985e3850; alias, 1 drivers +v0x5648985a9660_0 .net "CarryOUTADD", 0 0, L_0x5648985deaa0; 1 drivers +v0x5648985a97a0_0 .net "CarryOUTSUB", 0 0, L_0x5648985e1360; 1 drivers +v0x5648985a9890_0 .net *"_ivl_0", 0 0, L_0x5648985e1b20; 1 drivers +v0x5648985a9970_0 .net *"_ivl_11", 0 0, L_0x5648985e1e50; 1 drivers +v0x5648985a9a50_0 .net *"_ivl_12", 0 0, L_0x5648985e1fd0; 1 drivers +v0x5648985a9bc0_0 .net *"_ivl_15", 0 0, L_0x5648985e2040; 1 drivers +v0x5648985a9ca0_0 .net *"_ivl_17", 0 0, L_0x5648985e20e0; 1 drivers +v0x5648985a9d80_0 .net *"_ivl_18", 0 0, L_0x5648985e23f0; 1 drivers +v0x5648985a9e60_0 .net *"_ivl_22", 0 0, L_0x5648985e24b0; 1 drivers +v0x5648985a9f40_0 .net *"_ivl_24", 0 0, L_0x5648985e2680; 1 drivers +v0x5648985aa020_0 .net *"_ivl_25", 0 0, L_0x5648985e2720; 1 drivers +v0x5648985aa100_0 .net *"_ivl_28", 0 0, L_0x5648985e2790; 1 drivers +v0x5648985aa1e0_0 .net *"_ivl_3", 0 0, L_0x5648985e1bb0; 1 drivers +v0x5648985aa2c0_0 .net *"_ivl_30", 0 0, L_0x5648985e28e0; 1 drivers +v0x5648985aa3a0_0 .net *"_ivl_31", 0 0, L_0x5648985e2980; 1 drivers +v0x5648985aa480_0 .net *"_ivl_34", 0 0, L_0x5648985e2a30; 1 drivers +v0x5648985aa560_0 .net *"_ivl_36", 0 0, L_0x5648985e2b90; 1 drivers +v0x5648985aa640_0 .net *"_ivl_37", 0 0, L_0x5648985e2d10; 1 drivers +v0x5648985aa720_0 .net *"_ivl_40", 0 0, L_0x5648985e2d80; 1 drivers +v0x5648985aa800_0 .net *"_ivl_42", 0 0, L_0x5648985e2ea0; 1 drivers +v0x5648985aa8e0_0 .net *"_ivl_43", 0 0, L_0x5648985e2b20; 1 drivers +v0x5648985aa9c0_0 .net *"_ivl_47", 0 0, L_0x5648985e32a0; 1 drivers +v0x5648985aaaa0_0 .net *"_ivl_49", 0 0, L_0x5648985e3390; 1 drivers +v0x5648985aab80_0 .net *"_ivl_5", 0 0, L_0x5648985e1c50; 1 drivers +v0x5648985aac60_0 .net *"_ivl_51", 0 0, L_0x5648985e3590; 1 drivers +v0x5648985aad40_0 .net *"_ivl_53", 0 0, L_0x5648985e3700; 1 drivers +v0x5648985aae20_0 .net *"_ivl_55", 0 0, L_0x5648985e3480; 1 drivers +v0x5648985aaf00_0 .net *"_ivl_6", 0 0, L_0x5648985e1cf0; 1 drivers +v0x5648985aafe0_0 .net *"_ivl_9", 0 0, L_0x5648985e1d60; 1 drivers +v0x5648985ab2d0_0 .net "addY", 3 0, L_0x5648985df040; 1 drivers +v0x5648985ab390_0 .net "add_Y", 3 0, L_0x5648985e2210; alias, 1 drivers +v0x5648985ab450_0 .net "opCode", 1 0, L_0x5648985e3a90; 1 drivers +v0x5648985ab530_0 .net "overflow", 0 0, L_0x5648985e3960; alias, 1 drivers +v0x5648985ab5f0_0 .net "subY", 3 0, L_0x5648985e1a10; 1 drivers +v0x5648985ab6b0_0 .net "sub_Y", 3 0, L_0x5648985e2f90; alias, 1 drivers +v0x5648985ab770_0 .net "tempCAdd", 0 0, L_0x5648985e3630; 1 drivers +v0x5648985ab830_0 .net "tempCSub", 0 0, L_0x5648985e3520; 1 drivers +v0x5648985ab8f0_0 .net "tempoverflow", 0 0, L_0x5648985df0e0; 1 drivers +L_0x5648985e1bb0 .part L_0x5648985e3a90, 0, 1; +L_0x5648985e1c50 .part L_0x5648985df040, 0, 1; +L_0x5648985e1d60 .part L_0x5648985e3a90, 0, 1; +L_0x5648985e1e50 .part L_0x5648985df040, 1, 1; +L_0x5648985e2040 .part L_0x5648985e3a90, 0, 1; +L_0x5648985e20e0 .part L_0x5648985df040, 2, 1; +L_0x5648985e2210 .concat8 [ 1 1 1 1], L_0x5648985e1b20, L_0x5648985e1cf0, L_0x5648985e1fd0, L_0x5648985e23f0; +L_0x5648985e24b0 .part L_0x5648985e3a90, 0, 1; +L_0x5648985e2680 .part L_0x5648985df040, 3, 1; +L_0x5648985e2790 .part L_0x5648985e3a90, 1, 1; +L_0x5648985e28e0 .part L_0x5648985e1a10, 0, 1; +L_0x5648985e2a30 .part L_0x5648985e3a90, 1, 1; +L_0x5648985e2b90 .part L_0x5648985e1a10, 1, 1; +L_0x5648985e2d80 .part L_0x5648985e3a90, 1, 1; +L_0x5648985e2ea0 .part L_0x5648985e1a10, 2, 1; +L_0x5648985e2f90 .concat8 [ 1 1 1 1], L_0x5648985e2720, L_0x5648985e2980, L_0x5648985e2d10, L_0x5648985e2b20; +L_0x5648985e32a0 .part L_0x5648985e3a90, 1, 1; +L_0x5648985e3390 .part L_0x5648985e1a10, 3, 1; +L_0x5648985e3590 .part L_0x5648985e3a90, 1, 1; +L_0x5648985e3700 .part L_0x5648985e3a90, 0, 1; +L_0x5648985e3480 .part L_0x5648985e3a90, 0, 1; +S_0x56489858b050 .scope module, "a1" "addition" 5 13, 6 1 0, S_0x56489858d800; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x5648985df0e0 .functor XOR 1, L_0x5648985df200, L_0x5648985deaa0, C4<0>, C4<0>; +v0x5648985a2650_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985a2730_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985a2810_0 .net "Carry4", 2 0, L_0x5648985de510; 1 drivers +v0x5648985a28d0_0 .net "CarryIN", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x5648985a29c0_0 .net "CarryOUT", 0 0, L_0x5648985deaa0; alias, 1 drivers +v0x5648985a2ab0_0 .net "Y", 3 0, L_0x5648985df040; alias, 1 drivers +v0x5648985a2b70_0 .net *"_ivl_39", 0 0, L_0x5648985df200; 1 drivers +v0x5648985a2c50_0 .net "overflow", 0 0, L_0x5648985df0e0; alias, 1 drivers +L_0x5648985dd430 .part v0x5648985daf80_0, 0, 1; +L_0x5648985dd4d0 .part v0x5648985db060_0, 0, 1; +L_0x5648985dd960 .part v0x5648985daf80_0, 1, 1; +L_0x5648985dda90 .part v0x5648985db060_0, 1, 1; +L_0x5648985ddbc0 .part L_0x5648985de510, 0, 1; +L_0x5648985de0f0 .part v0x5648985daf80_0, 2, 1; +L_0x5648985de260 .part v0x5648985db060_0, 2, 1; +L_0x5648985de390 .part L_0x5648985de510, 1, 1; +L_0x5648985de510 .concat8 [ 1 1 1 0], L_0x5648985dd3c0, L_0x5648985dd8d0, L_0x5648985de060; +L_0x5648985deb50 .part v0x5648985daf80_0, 3, 1; +L_0x5648985dece0 .part v0x5648985db060_0, 3, 1; +L_0x5648985dee10 .part L_0x5648985de510, 2, 1; +L_0x5648985df040 .concat8 [ 1 1 1 1], L_0x5648985dd350, L_0x5648985dd7f0, L_0x5648985ddf80, L_0x5648985de9c0; +L_0x5648985df200 .part L_0x5648985de510, 2, 1; +S_0x5648985888a0 .scope module, "f0" "fulladder" 6 11, 7 1 0, S_0x56489858b050; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985dd3c0 .functor OR 1, L_0x5648985dcfb0, L_0x5648985dd180, C4<0>, C4<0>; +v0x56489859e300_0 .net "A", 0 0, L_0x5648985dd430; 1 drivers +v0x56489859e3c0_0 .net "B", 0 0, L_0x5648985dd4d0; 1 drivers +v0x56489859e490_0 .net "Carry", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x56489859e590_0 .net "CarryO", 0 0, L_0x5648985dd3c0; 1 drivers +v0x56489859e630_0 .net "Sum", 0 0, L_0x5648985dd350; 1 drivers +v0x56489859e720_0 .net "and1", 0 0, L_0x5648985dcfb0; 1 drivers +v0x56489859e7f0_0 .net "and2", 0 0, L_0x5648985dd180; 1 drivers +v0x56489859e8c0_0 .net "xor1", 0 0, L_0x5648985dd110; 1 drivers +S_0x564898597780 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985888a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985dcfb0 .functor AND 1, L_0x5648985dd430, L_0x5648985dd4d0, C4<1>, C4<1>; +L_0x5648985dd110 .functor XOR 1, L_0x5648985dd430, L_0x5648985dd4d0, C4<0>, C4<0>; +v0x564898590890_0 .net "A", 0 0, L_0x5648985dd430; alias, 1 drivers +v0x564898590580_0 .net "B", 0 0, L_0x5648985dd4d0; alias, 1 drivers +v0x564898590240_0 .net "Carry", 0 0, L_0x5648985dcfb0; alias, 1 drivers +v0x564898524830_0 .net "Sum", 0 0, L_0x5648985dd110; alias, 1 drivers +S_0x56489859de90 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985888a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985dd180 .functor AND 1, L_0x5648985dd110, L_0x7f69dc15a6d8, C4<1>, C4<1>; +L_0x5648985dd350 .functor XOR 1, L_0x5648985dd110, L_0x7f69dc15a6d8, C4<0>, C4<0>; +v0x564898522b20_0 .net "A", 0 0, L_0x5648985dd110; alias, 1 drivers +v0x5648985986f0_0 .net "B", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x56489859e0c0_0 .net "Carry", 0 0, L_0x5648985dd180; alias, 1 drivers +v0x56489859e190_0 .net "Sum", 0 0, L_0x5648985dd350; alias, 1 drivers +S_0x56489859e9b0 .scope module, "f1" "fulladder" 6 12, 7 1 0, S_0x56489858b050; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985dd8d0 .functor OR 1, L_0x5648985dd570, L_0x5648985dd6a0, C4<0>, C4<0>; +v0x56489859f730_0 .net "A", 0 0, L_0x5648985dd960; 1 drivers +v0x56489859f7f0_0 .net "B", 0 0, L_0x5648985dda90; 1 drivers +v0x56489859f8c0_0 .net "Carry", 0 0, L_0x5648985ddbc0; 1 drivers +v0x56489859f9c0_0 .net "CarryO", 0 0, L_0x5648985dd8d0; 1 drivers +v0x56489859fa60_0 .net "Sum", 0 0, L_0x5648985dd7f0; 1 drivers +v0x56489859fb50_0 .net "and1", 0 0, L_0x5648985dd570; 1 drivers +v0x56489859fc20_0 .net "and2", 0 0, L_0x5648985dd6a0; 1 drivers +v0x56489859fcf0_0 .net "xor1", 0 0, L_0x5648985dd630; 1 drivers +S_0x56489859eb90 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x56489859e9b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985dd570 .functor AND 1, L_0x5648985dd960, L_0x5648985dda90, C4<1>, C4<1>; +L_0x5648985dd630 .functor XOR 1, L_0x5648985dd960, L_0x5648985dda90, C4<0>, C4<0>; +v0x56489859eda0_0 .net "A", 0 0, L_0x5648985dd960; alias, 1 drivers +v0x56489859ee80_0 .net "B", 0 0, L_0x5648985dda90; alias, 1 drivers +v0x56489859ef40_0 .net "Carry", 0 0, L_0x5648985dd570; alias, 1 drivers +v0x56489859f010_0 .net "Sum", 0 0, L_0x5648985dd630; alias, 1 drivers +S_0x56489859f180 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x56489859e9b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985dd6a0 .functor AND 1, L_0x5648985dd630, L_0x5648985ddbc0, C4<1>, C4<1>; +L_0x5648985dd7f0 .functor XOR 1, L_0x5648985dd630, L_0x5648985ddbc0, C4<0>, C4<0>; +v0x56489859f380_0 .net "A", 0 0, L_0x5648985dd630; alias, 1 drivers +v0x56489859f450_0 .net "B", 0 0, L_0x5648985ddbc0; alias, 1 drivers +v0x56489859f4f0_0 .net "Carry", 0 0, L_0x5648985dd6a0; alias, 1 drivers +v0x56489859f5c0_0 .net "Sum", 0 0, L_0x5648985dd7f0; alias, 1 drivers +S_0x56489859fde0 .scope module, "f2" "fulladder" 6 13, 7 1 0, S_0x56489858b050; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985de060 .functor OR 1, L_0x5648985ddcf0, L_0x5648985dddf0, C4<0>, C4<0>; +v0x5648985a0b70_0 .net "A", 0 0, L_0x5648985de0f0; 1 drivers +v0x5648985a0c30_0 .net "B", 0 0, L_0x5648985de260; 1 drivers +v0x5648985a0d00_0 .net "Carry", 0 0, L_0x5648985de390; 1 drivers +v0x5648985a0e00_0 .net "CarryO", 0 0, L_0x5648985de060; 1 drivers +v0x5648985a0ea0_0 .net "Sum", 0 0, L_0x5648985ddf80; 1 drivers +v0x5648985a0f90_0 .net "and1", 0 0, L_0x5648985ddcf0; 1 drivers +v0x5648985a1060_0 .net "and2", 0 0, L_0x5648985dddf0; 1 drivers +v0x5648985a1130_0 .net "xor1", 0 0, L_0x5648985ddd60; 1 drivers +S_0x56489859fff0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x56489859fde0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ddcf0 .functor AND 1, L_0x5648985de0f0, L_0x5648985de260, C4<1>, C4<1>; +L_0x5648985ddd60 .functor XOR 1, L_0x5648985de0f0, L_0x5648985de260, C4<0>, C4<0>; +v0x5648985a0200_0 .net "A", 0 0, L_0x5648985de0f0; alias, 1 drivers +v0x5648985a02c0_0 .net "B", 0 0, L_0x5648985de260; alias, 1 drivers +v0x5648985a0380_0 .net "Carry", 0 0, L_0x5648985ddcf0; alias, 1 drivers +v0x5648985a0450_0 .net "Sum", 0 0, L_0x5648985ddd60; alias, 1 drivers +S_0x5648985a05c0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x56489859fde0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985dddf0 .functor AND 1, L_0x5648985ddd60, L_0x5648985de390, C4<1>, C4<1>; +L_0x5648985ddf80 .functor XOR 1, L_0x5648985ddd60, L_0x5648985de390, C4<0>, C4<0>; +v0x5648985a07c0_0 .net "A", 0 0, L_0x5648985ddd60; alias, 1 drivers +v0x5648985a0890_0 .net "B", 0 0, L_0x5648985de390; alias, 1 drivers +v0x5648985a0930_0 .net "Carry", 0 0, L_0x5648985dddf0; alias, 1 drivers +v0x5648985a0a00_0 .net "Sum", 0 0, L_0x5648985ddf80; alias, 1 drivers +S_0x5648985a1220 .scope module, "f3" "fulladder" 6 14, 7 1 0, S_0x56489858b050; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985deaa0 .functor OR 1, L_0x5648985de600, L_0x5648985de830, C4<0>, C4<0>; +v0x5648985a1fa0_0 .net "A", 0 0, L_0x5648985deb50; 1 drivers +v0x5648985a2060_0 .net "B", 0 0, L_0x5648985dece0; 1 drivers +v0x5648985a2130_0 .net "Carry", 0 0, L_0x5648985dee10; 1 drivers +v0x5648985a2230_0 .net "CarryO", 0 0, L_0x5648985deaa0; alias, 1 drivers +v0x5648985a22d0_0 .net "Sum", 0 0, L_0x5648985de9c0; 1 drivers +v0x5648985a23c0_0 .net "and1", 0 0, L_0x5648985de600; 1 drivers +v0x5648985a2490_0 .net "and2", 0 0, L_0x5648985de830; 1 drivers +v0x5648985a2560_0 .net "xor1", 0 0, L_0x5648985de7a0; 1 drivers +S_0x5648985a1400 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985a1220; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985de600 .functor AND 1, L_0x5648985deb50, L_0x5648985dece0, C4<1>, C4<1>; +L_0x5648985de7a0 .functor XOR 1, L_0x5648985deb50, L_0x5648985dece0, C4<0>, C4<0>; +v0x5648985a1610_0 .net "A", 0 0, L_0x5648985deb50; alias, 1 drivers +v0x5648985a16f0_0 .net "B", 0 0, L_0x5648985dece0; alias, 1 drivers +v0x5648985a17b0_0 .net "Carry", 0 0, L_0x5648985de600; alias, 1 drivers +v0x5648985a1880_0 .net "Sum", 0 0, L_0x5648985de7a0; alias, 1 drivers +S_0x5648985a19f0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985a1220; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985de830 .functor AND 1, L_0x5648985de7a0, L_0x5648985dee10, C4<1>, C4<1>; +L_0x5648985de9c0 .functor XOR 1, L_0x5648985de7a0, L_0x5648985dee10, C4<0>, C4<0>; +v0x5648985a1bf0_0 .net "A", 0 0, L_0x5648985de7a0; alias, 1 drivers +v0x5648985a1cc0_0 .net "B", 0 0, L_0x5648985dee10; alias, 1 drivers +v0x5648985a1d60_0 .net "Carry", 0 0, L_0x5648985de830; alias, 1 drivers +v0x5648985a1e30_0 .net "Sum", 0 0, L_0x5648985de9c0; alias, 1 drivers +S_0x5648985a2dd0 .scope module, "s1" "subtraction" 5 14, 9 1 0, S_0x56489858d800; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "BorrowOUT"; +v0x5648985a8c80_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985a8d40_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985a8e10_0 .net "BorrowIN", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x5648985a8ee0_0 .net "BorrowOUT", 0 0, L_0x5648985e1360; alias, 1 drivers +v0x5648985a8fb0_0 .net "Y", 3 0, L_0x5648985e1a10; alias, 1 drivers +o0x7f69dc1a5358 .functor BUFZ 1, C4; HiZ drive +; Elide local net with no drivers, v0x5648985a90a0_0 name=_ivl_39 +v0x5648985a9160_0 .net "tempB", 3 0, L_0x564898606c40; 1 drivers +L_0x5648985df820 .part v0x5648985daf80_0, 0, 1; +L_0x5648985df970 .part v0x5648985db060_0, 0, 1; +L_0x5648985e00b0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985e01e0 .part v0x5648985db060_0, 1, 1; +L_0x5648985e0310 .part L_0x564898606c40, 0, 1; +L_0x5648985e09c0 .part v0x5648985daf80_0, 2, 1; +L_0x5648985e0b30 .part v0x5648985db060_0, 2, 1; +L_0x5648985e0c60 .part L_0x564898606c40, 1, 1; +L_0x5648985e1410 .part v0x5648985daf80_0, 3, 1; +L_0x5648985e1540 .part v0x5648985db060_0, 3, 1; +L_0x5648985e18e0 .part L_0x564898606c40, 2, 1; +L_0x5648985e1a10 .concat8 [ 1 1 1 1], L_0x5648985df4b0, L_0x5648985dfcf0, L_0x5648985e0600, L_0x5648985e1030; +L_0x564898606c40 .concat [ 1 1 1 1], L_0x5648985df790, L_0x5648985e0020, L_0x5648985e0930, o0x7f69dc1a5358; +S_0x5648985a2fd0 .scope module, "f0" "fullsubtraction" 9 11, 10 1 0, S_0x5648985a2dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x5648985df790 .functor OR 1, L_0x5648985df3f0, L_0x5648985df6d0, C4<0>, C4<0>; +v0x5648985a4020_0 .net "A", 0 0, L_0x5648985df820; 1 drivers +v0x5648985a40e0_0 .net "B", 0 0, L_0x5648985df970; 1 drivers +v0x5648985a41b0_0 .net "BorrowIN", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x5648985a4310_0 .net "BorrowOut", 0 0, L_0x5648985df790; 1 drivers +v0x5648985a43b0_0 .net "Difference", 0 0, L_0x5648985df4b0; 1 drivers +v0x5648985a4450_0 .net "tempB1", 0 0, L_0x5648985df3f0; 1 drivers +v0x5648985a4520_0 .net "tempB2", 0 0, L_0x5648985df6d0; 1 drivers +v0x5648985a45f0_0 .net "tempD", 0 0, L_0x5648985defd0; 1 drivers +S_0x5648985a31e0 .scope module, "hf1" "halfsubtraction" 10 8, 11 1 0, S_0x5648985a2fd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985defd0 .functor XOR 1, L_0x5648985df820, L_0x5648985df970, C4<0>, C4<0>; +L_0x5648985df360 .functor NOT 1, L_0x5648985df820, C4<0>, C4<0>, C4<0>; +L_0x5648985df3f0 .functor AND 1, L_0x5648985df360, L_0x5648985df970, C4<1>, C4<1>; +v0x5648985a3480_0 .net "A", 0 0, L_0x5648985df820; alias, 1 drivers +v0x5648985a3560_0 .net "B", 0 0, L_0x5648985df970; alias, 1 drivers +v0x5648985a3620_0 .net "Borrow", 0 0, L_0x5648985df3f0; alias, 1 drivers +v0x5648985a36f0_0 .net "Difference", 0 0, L_0x5648985defd0; alias, 1 drivers +v0x5648985a37b0_0 .net "notA", 0 0, L_0x5648985df360; 1 drivers +S_0x5648985a3940 .scope module, "hf2" "halfsubtraction" 10 9, 11 1 0, S_0x5648985a2fd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985df4b0 .functor XOR 1, L_0x5648985defd0, L_0x7f69dc15a6d8, C4<0>, C4<0>; +L_0x5648985df640 .functor NOT 1, L_0x5648985defd0, C4<0>, C4<0>, C4<0>; +L_0x5648985df6d0 .functor AND 1, L_0x5648985df640, L_0x7f69dc15a6d8, C4<1>, C4<1>; +v0x5648985a3bb0_0 .net "A", 0 0, L_0x5648985defd0; alias, 1 drivers +v0x5648985a3c80_0 .net "B", 0 0, L_0x7f69dc15a6d8; alias, 1 drivers +v0x5648985a3d20_0 .net "Borrow", 0 0, L_0x5648985df6d0; alias, 1 drivers +v0x5648985a3df0_0 .net "Difference", 0 0, L_0x5648985df4b0; alias, 1 drivers +v0x5648985a3e90_0 .net "notA", 0 0, L_0x5648985df640; 1 drivers +S_0x5648985a46e0 .scope module, "f1" "fullsubtraction" 9 12, 10 1 0, S_0x5648985a2dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x5648985e0020 .functor OR 1, L_0x5648985dfbe0, L_0x5648985dff10, C4<0>, C4<0>; +v0x5648985a5720_0 .net "A", 0 0, L_0x5648985e00b0; 1 drivers +v0x5648985a57e0_0 .net "B", 0 0, L_0x5648985e01e0; 1 drivers +v0x5648985a58b0_0 .net "BorrowIN", 0 0, L_0x5648985e0310; 1 drivers +v0x5648985a59b0_0 .net "BorrowOut", 0 0, L_0x5648985e0020; 1 drivers +v0x5648985a5a50_0 .net "Difference", 0 0, L_0x5648985dfcf0; 1 drivers +v0x5648985a5b40_0 .net "tempB1", 0 0, L_0x5648985dfbe0; 1 drivers +v0x5648985a5c10_0 .net "tempB2", 0 0, L_0x5648985dff10; 1 drivers +v0x5648985a5ce0_0 .net "tempD", 0 0, L_0x5648985dfaa0; 1 drivers +S_0x5648985a48e0 .scope module, "hf1" "halfsubtraction" 10 8, 11 1 0, S_0x5648985a46e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985dfaa0 .functor XOR 1, L_0x5648985e00b0, L_0x5648985e01e0, C4<0>, C4<0>; +L_0x5648985dfb50 .functor NOT 1, L_0x5648985e00b0, C4<0>, C4<0>, C4<0>; +L_0x5648985dfbe0 .functor AND 1, L_0x5648985dfb50, L_0x5648985e01e0, C4<1>, C4<1>; +v0x5648985a4b60_0 .net "A", 0 0, L_0x5648985e00b0; alias, 1 drivers +v0x5648985a4c40_0 .net "B", 0 0, L_0x5648985e01e0; alias, 1 drivers +v0x5648985a4d00_0 .net "Borrow", 0 0, L_0x5648985dfbe0; alias, 1 drivers +v0x5648985a4dd0_0 .net "Difference", 0 0, L_0x5648985dfaa0; alias, 1 drivers +v0x5648985a4e90_0 .net "notA", 0 0, L_0x5648985dfb50; 1 drivers +S_0x5648985a5020 .scope module, "hf2" "halfsubtraction" 10 9, 11 1 0, S_0x5648985a46e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985dfcf0 .functor XOR 1, L_0x5648985dfaa0, L_0x5648985e0310, C4<0>, C4<0>; +L_0x5648985dfe80 .functor NOT 1, L_0x5648985dfaa0, C4<0>, C4<0>, C4<0>; +L_0x5648985dff10 .functor AND 1, L_0x5648985dfe80, L_0x5648985e0310, C4<1>, C4<1>; +v0x5648985a5290_0 .net "A", 0 0, L_0x5648985dfaa0; alias, 1 drivers +v0x5648985a5360_0 .net "B", 0 0, L_0x5648985e0310; alias, 1 drivers +v0x5648985a5400_0 .net "Borrow", 0 0, L_0x5648985dff10; alias, 1 drivers +v0x5648985a54d0_0 .net "Difference", 0 0, L_0x5648985dfcf0; alias, 1 drivers +v0x5648985a5590_0 .net "notA", 0 0, L_0x5648985dfe80; 1 drivers +S_0x5648985a5dd0 .scope module, "f2" "fullsubtraction" 9 13, 10 1 0, S_0x5648985a2dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x5648985e0930 .functor OR 1, L_0x5648985e0540, L_0x5648985e0820, C4<0>, C4<0>; +v0x5648985a6e80_0 .net "A", 0 0, L_0x5648985e09c0; 1 drivers +v0x5648985a6f40_0 .net "B", 0 0, L_0x5648985e0b30; 1 drivers +v0x5648985a7010_0 .net "BorrowIN", 0 0, L_0x5648985e0c60; 1 drivers +v0x5648985a7110_0 .net "BorrowOut", 0 0, L_0x5648985e0930; 1 drivers +v0x5648985a71b0_0 .net "Difference", 0 0, L_0x5648985e0600; 1 drivers +v0x5648985a72a0_0 .net "tempB1", 0 0, L_0x5648985e0540; 1 drivers +v0x5648985a7370_0 .net "tempB2", 0 0, L_0x5648985e0820; 1 drivers +v0x5648985a7440_0 .net "tempD", 0 0, L_0x5648985e0440; 1 drivers +S_0x5648985a6060 .scope module, "hf1" "halfsubtraction" 10 8, 11 1 0, S_0x5648985a5dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985e0440 .functor XOR 1, L_0x5648985e09c0, L_0x5648985e0b30, C4<0>, C4<0>; +L_0x5648985e04b0 .functor NOT 1, L_0x5648985e09c0, C4<0>, C4<0>, C4<0>; +L_0x5648985e0540 .functor AND 1, L_0x5648985e04b0, L_0x5648985e0b30, C4<1>, C4<1>; +v0x5648985a62e0_0 .net "A", 0 0, L_0x5648985e09c0; alias, 1 drivers +v0x5648985a63a0_0 .net "B", 0 0, L_0x5648985e0b30; alias, 1 drivers +v0x5648985a6460_0 .net "Borrow", 0 0, L_0x5648985e0540; alias, 1 drivers +v0x5648985a6530_0 .net "Difference", 0 0, L_0x5648985e0440; alias, 1 drivers +v0x5648985a65f0_0 .net "notA", 0 0, L_0x5648985e04b0; 1 drivers +S_0x5648985a6780 .scope module, "hf2" "halfsubtraction" 10 9, 11 1 0, S_0x5648985a5dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985e0600 .functor XOR 1, L_0x5648985e0440, L_0x5648985e0c60, C4<0>, C4<0>; +L_0x5648985e0790 .functor NOT 1, L_0x5648985e0440, C4<0>, C4<0>, C4<0>; +L_0x5648985e0820 .functor AND 1, L_0x5648985e0790, L_0x5648985e0c60, C4<1>, C4<1>; +v0x5648985a69f0_0 .net "A", 0 0, L_0x5648985e0440; alias, 1 drivers +v0x5648985a6ac0_0 .net "B", 0 0, L_0x5648985e0c60; alias, 1 drivers +v0x5648985a6b60_0 .net "Borrow", 0 0, L_0x5648985e0820; alias, 1 drivers +v0x5648985a6c30_0 .net "Difference", 0 0, L_0x5648985e0600; alias, 1 drivers +v0x5648985a6cf0_0 .net "notA", 0 0, L_0x5648985e0790; 1 drivers +S_0x5648985a7530 .scope module, "f3" "fullsubtraction" 9 14, 10 1 0, S_0x5648985a2dd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x5648985e1360 .functor OR 1, L_0x5648985e0f20, L_0x5648985e1250, C4<0>, C4<0>; +v0x5648985a85d0_0 .net "A", 0 0, L_0x5648985e1410; 1 drivers +v0x5648985a8690_0 .net "B", 0 0, L_0x5648985e1540; 1 drivers +v0x5648985a8760_0 .net "BorrowIN", 0 0, L_0x5648985e18e0; 1 drivers +v0x5648985a8860_0 .net "BorrowOut", 0 0, L_0x5648985e1360; alias, 1 drivers +v0x5648985a8900_0 .net "Difference", 0 0, L_0x5648985e1030; 1 drivers +v0x5648985a89f0_0 .net "tempB1", 0 0, L_0x5648985e0f20; 1 drivers +v0x5648985a8ac0_0 .net "tempB2", 0 0, L_0x5648985e1250; 1 drivers +v0x5648985a8b90_0 .net "tempD", 0 0, L_0x5648985e0de0; 1 drivers +S_0x5648985a7790 .scope module, "hf1" "halfsubtraction" 10 8, 11 1 0, S_0x5648985a7530; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985e0de0 .functor XOR 1, L_0x5648985e1410, L_0x5648985e1540, C4<0>, C4<0>; +L_0x5648985e0e90 .functor NOT 1, L_0x5648985e1410, C4<0>, C4<0>, C4<0>; +L_0x5648985e0f20 .functor AND 1, L_0x5648985e0e90, L_0x5648985e1540, C4<1>, C4<1>; +v0x5648985a7a10_0 .net "A", 0 0, L_0x5648985e1410; alias, 1 drivers +v0x5648985a7af0_0 .net "B", 0 0, L_0x5648985e1540; alias, 1 drivers +v0x5648985a7bb0_0 .net "Borrow", 0 0, L_0x5648985e0f20; alias, 1 drivers +v0x5648985a7c80_0 .net "Difference", 0 0, L_0x5648985e0de0; alias, 1 drivers +v0x5648985a7d40_0 .net "notA", 0 0, L_0x5648985e0e90; 1 drivers +S_0x5648985a7ed0 .scope module, "hf2" "halfsubtraction" 10 9, 11 1 0, S_0x5648985a7530; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x5648985e1030 .functor XOR 1, L_0x5648985e0de0, L_0x5648985e18e0, C4<0>, C4<0>; +L_0x5648985e11c0 .functor NOT 1, L_0x5648985e0de0, C4<0>, C4<0>, C4<0>; +L_0x5648985e1250 .functor AND 1, L_0x5648985e11c0, L_0x5648985e18e0, C4<1>, C4<1>; +v0x5648985a8140_0 .net "A", 0 0, L_0x5648985e0de0; alias, 1 drivers +v0x5648985a8210_0 .net "B", 0 0, L_0x5648985e18e0; alias, 1 drivers +v0x5648985a82b0_0 .net "Borrow", 0 0, L_0x5648985e1250; alias, 1 drivers +v0x5648985a8380_0 .net "Difference", 0 0, L_0x5648985e1030; alias, 1 drivers +v0x5648985a8440_0 .net "notA", 0 0, L_0x5648985e11c0; 1 drivers +S_0x5648985aba70 .scope module, "btod1" "BinaryToBCD" 4 76, 12 1 0, S_0x56489858fba0; + .timescale 0 0; + .port_info 0 /INPUT 8 "binary"; + .port_info 1 /OUTPUT 12 "bcd"; +L_0x7f69dc15a450 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f69dc15a498 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898600b70 .functor AND 1, L_0x7f69dc15a450, L_0x7f69dc15a498, C4<1>, C4<1>; +L_0x7f69dc15a4e0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f69dc15a528 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898600cd0 .functor AND 1, L_0x7f69dc15a4e0, L_0x7f69dc15a528, C4<1>, C4<1>; +L_0x7f69dc15a570 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f69dc15a5b8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898600e30 .functor AND 1, L_0x7f69dc15a570, L_0x7f69dc15a5b8, C4<1>, C4<1>; +L_0x7f69dc15a600 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f69dc15a648 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898600f40 .functor AND 1, L_0x7f69dc15a600, L_0x7f69dc15a648, C4<1>, C4<1>; +L_0x7f69dc15a690 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x564898606930 .functor OR 1, L_0x5648986069f0, L_0x7f69dc15a690, C4<0>, C4<0>; +v0x5648985b25a0_0 .net/2u *"_ivl_0", 0 0, L_0x7f69dc15a450; 1 drivers +v0x5648985b26a0_0 .net/2u *"_ivl_10", 0 0, L_0x7f69dc15a570; 1 drivers +v0x5648985b2780_0 .net/2u *"_ivl_12", 0 0, L_0x7f69dc15a5b8; 1 drivers +v0x5648985b2840_0 .net *"_ivl_132", 0 0, L_0x564898606930; 1 drivers +v0x5648985b2920_0 .net *"_ivl_136", 0 0, L_0x5648986069f0; 1 drivers +v0x5648985b2a00_0 .net/2u *"_ivl_137", 0 0, L_0x7f69dc15a690; 1 drivers +v0x5648985b2ae0_0 .net *"_ivl_14", 0 0, L_0x564898600f40; 1 drivers +o0x7f69dc1a7ab8 .functor BUFZ 1, C4; HiZ drive +; Elide local net with no drivers, v0x5648985b2bc0_0 name=_ivl_141 +v0x5648985b2ca0_0 .net/2u *"_ivl_16", 0 0, L_0x7f69dc15a600; 1 drivers +v0x5648985b2e10_0 .net/2u *"_ivl_18", 0 0, L_0x7f69dc15a648; 1 drivers +v0x5648985b2ef0_0 .net/2u *"_ivl_2", 0 0, L_0x7f69dc15a498; 1 drivers +v0x5648985b2fd0_0 .net/2u *"_ivl_4", 0 0, L_0x7f69dc15a4e0; 1 drivers +v0x5648985b30b0_0 .net/2u *"_ivl_6", 0 0, L_0x7f69dc15a528; 1 drivers +v0x5648985b3190_0 .net *"_ivl_8", 0 0, L_0x564898600e30; 1 drivers +v0x5648985b3270_0 .net "bcd", 11 0, L_0x5648986065b0; alias, 1 drivers +v0x5648985b3350_0 .net "binary", 7 0, L_0x5648986001f0; alias, 1 drivers +v0x5648985b3430_0 .net "dab1", 3 0, L_0x564898601910; 1 drivers +v0x5648985b3510_0 .net "dab2", 3 0, L_0x564898602670; 1 drivers +v0x5648985b35f0_0 .net "dab3", 3 0, L_0x564898603450; 1 drivers +v0x5648985b36d0_0 .net "dab4", 3 0, L_0x564898606e10; 1 drivers +v0x5648985b37b0_0 .net "dab5", 3 0, L_0x564898604b70; 1 drivers +v0x5648985b3890_0 .net "empty1", 0 0, L_0x564898600b70; 1 drivers +v0x5648985b3930_0 .net "empty2", 0 0, L_0x564898600cd0; 1 drivers +L_0x564898601730 .part L_0x5648986001f0, 7, 1; +L_0x5648986017d0 .part L_0x5648986001f0, 6, 1; +L_0x564898601870 .part L_0x5648986001f0, 5, 1; +L_0x564898601910 .concat8 [ 1 1 1 1], L_0x564898601370, L_0x5648986014a0, L_0x564898601600, L_0x564898601670; +L_0x564898602280 .part L_0x564898601910, 1, 1; +L_0x5648986023b0 .part L_0x564898601910, 2, 1; +L_0x564898602450 .part L_0x564898601910, 3, 1; +L_0x564898602580 .part L_0x5648986001f0, 4, 1; +L_0x564898602670 .concat8 [ 1 1 1 1], L_0x564898601e60, L_0x564898601f90, L_0x5648986020f0, L_0x564898602160; +L_0x564898602fe0 .part L_0x564898602670, 1, 1; +L_0x564898603170 .part L_0x564898602670, 2, 1; +L_0x564898603210 .part L_0x564898602670, 3, 1; +L_0x5648986033b0 .part L_0x5648986001f0, 3, 1; +L_0x564898603450 .concat8 [ 1 1 1 1], L_0x564898602bc0, L_0x564898602cf0, L_0x564898602e50, L_0x564898602ec0; +L_0x564898603d10 .part L_0x564898601910, 0, 1; +L_0x564898603db0 .part L_0x564898602670, 0, 1; +L_0x564898603ee0 .part L_0x564898603450, 0, 1; +L_0x5648986047b0 .part L_0x564898603450, 1, 1; +L_0x564898604980 .part L_0x564898603450, 2, 1; +L_0x564898604a20 .part L_0x564898603450, 3, 1; +L_0x5648986048e0 .part L_0x5648986001f0, 2, 1; +L_0x564898604b70 .concat8 [ 1 1 1 1], L_0x564898604390, L_0x5648986044c0, L_0x564898604620, L_0x564898604690; +L_0x5648986054e0 .part L_0x564898606e10, 1, 1; +L_0x564898605580 .part L_0x564898606e10, 2, 1; +L_0x5648986056f0 .part L_0x564898606e10, 3, 1; +L_0x564898605790 .part L_0x564898604b70, 0, 1; +L_0x564898606020 .part L_0x564898604b70, 1, 1; +L_0x564898606150 .part L_0x564898604b70, 2, 1; +L_0x564898606370 .part L_0x564898604b70, 3, 1; +L_0x564898606410 .part L_0x5648986001f0, 1, 1; +LS_0x5648986065b0_0_0 .concat8 [ 1 1 1 1], L_0x564898606930, L_0x564898605fb0, L_0x564898603590, L_0x564898605e50; +LS_0x5648986065b0_0_4 .concat8 [ 1 1 1 1], L_0x564898605d20, L_0x5648986053c0, L_0x564898605350, L_0x5648986051f0; +LS_0x5648986065b0_0_8 .concat8 [ 1 1 1 1], L_0x5648986050c0, L_0x564898603950, L_0x564898600f40, L_0x564898600e30; +L_0x5648986065b0 .concat8 [ 4 4 4 0], LS_0x5648986065b0_0_0, LS_0x5648986065b0_0_4, LS_0x5648986065b0_0_8; +L_0x5648986069f0 .part L_0x5648986001f0, 0, 1; +L_0x564898606e10 .concat [ 1 1 1 1], o0x7f69dc1a7ab8, L_0x564898603a80, L_0x564898603be0, L_0x564898603c50; +S_0x5648985abc20 .scope module, "d1t" "dabble" 12 14, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898601050 .functor XOR 1, L_0x564898600b70, L_0x564898601870, C4<0>, C4<0>; +L_0x5648986010c0 .functor NOR 1, L_0x564898600b70, L_0x564898601730, C4<0>, C4<0>; +L_0x564898601130 .functor XOR 1, L_0x564898600b70, L_0x5648986017d0, C4<0>, C4<0>; +L_0x5648986011a0 .functor NOR 1, L_0x564898601050, L_0x564898601130, C4<0>, C4<0>; +L_0x564898601260 .functor NOR 1, L_0x5648986011a0, L_0x5648986010c0, C4<0>, C4<0>; +L_0x564898601370 .functor BUF 1, L_0x564898601260, C4<0>, C4<0>, C4<0>; +L_0x564898601430 .functor OR 1, L_0x564898601050, L_0x5648986010c0, C4<0>, C4<0>; +L_0x5648986014a0 .functor NOR 1, L_0x564898601430, L_0x5648986017d0, C4<0>, C4<0>; +L_0x564898601600 .functor AND 1, L_0x564898601430, L_0x564898601130, C4<1>, C4<1>; +L_0x564898601670 .functor XOR 1, L_0x564898601260, L_0x564898601870, C4<0>, C4<0>; +v0x5648985abf40_0 .net "A", 0 0, L_0x564898600b70; alias, 1 drivers +v0x5648985ac020_0 .net "B", 0 0, L_0x564898601730; 1 drivers +v0x5648985ac0e0_0 .net "C", 0 0, L_0x5648986017d0; 1 drivers +v0x5648985ac180_0 .net "D", 0 0, L_0x564898601870; 1 drivers +v0x5648985ac240_0 .net "E", 0 0, L_0x564898601670; 1 drivers +v0x5648985ac350_0 .net "X", 0 0, L_0x564898601370; 1 drivers +v0x5648985ac410_0 .net "Y", 0 0, L_0x5648986014a0; 1 drivers +v0x5648985ac4d0_0 .net "Z", 0 0, L_0x564898601600; 1 drivers +v0x5648985ac590_0 .net "nor1", 0 0, L_0x5648986010c0; 1 drivers +v0x5648985ac650_0 .net "nor2", 0 0, L_0x5648986011a0; 1 drivers +v0x5648985ac710_0 .net "nor3", 0 0, L_0x564898601260; 1 drivers +v0x5648985ac7d0_0 .net "or1", 0 0, L_0x564898601430; 1 drivers +v0x5648985ac890_0 .net "xor1", 0 0, L_0x564898601050; 1 drivers +v0x5648985ac950_0 .net "xor2", 0 0, L_0x564898601130; 1 drivers +S_0x5648985acb10 .scope module, "d2u" "dabble" 12 23, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898601aa0 .functor XOR 1, L_0x564898602280, L_0x564898602580, C4<0>, C4<0>; +L_0x564898601b10 .functor NOR 1, L_0x564898602280, L_0x5648986023b0, C4<0>, C4<0>; +L_0x564898601bd0 .functor XOR 1, L_0x564898602280, L_0x564898602450, C4<0>, C4<0>; +L_0x564898601c40 .functor NOR 1, L_0x564898601aa0, L_0x564898601bd0, C4<0>, C4<0>; +L_0x564898601d50 .functor NOR 1, L_0x564898601c40, L_0x564898601b10, C4<0>, C4<0>; +L_0x564898601e60 .functor BUF 1, L_0x564898601d50, C4<0>, C4<0>, C4<0>; +L_0x564898601f20 .functor OR 1, L_0x564898601aa0, L_0x564898601b10, C4<0>, C4<0>; +L_0x564898601f90 .functor NOR 1, L_0x564898601f20, L_0x564898602450, C4<0>, C4<0>; +L_0x5648986020f0 .functor AND 1, L_0x564898601f20, L_0x564898601bd0, C4<1>, C4<1>; +L_0x564898602160 .functor XOR 1, L_0x564898601d50, L_0x564898602580, C4<0>, C4<0>; +v0x5648985acde0_0 .net "A", 0 0, L_0x564898602280; 1 drivers +v0x5648985acea0_0 .net "B", 0 0, L_0x5648986023b0; 1 drivers +v0x5648985acf60_0 .net "C", 0 0, L_0x564898602450; 1 drivers +v0x5648985ad000_0 .net "D", 0 0, L_0x564898602580; 1 drivers +v0x5648985ad0c0_0 .net "E", 0 0, L_0x564898602160; 1 drivers +v0x5648985ad1d0_0 .net "X", 0 0, L_0x564898601e60; 1 drivers +v0x5648985ad290_0 .net "Y", 0 0, L_0x564898601f90; 1 drivers +v0x5648985ad350_0 .net "Z", 0 0, L_0x5648986020f0; 1 drivers +v0x5648985ad410_0 .net "nor1", 0 0, L_0x564898601b10; 1 drivers +v0x5648985ad560_0 .net "nor2", 0 0, L_0x564898601c40; 1 drivers +v0x5648985ad620_0 .net "nor3", 0 0, L_0x564898601d50; 1 drivers +v0x5648985ad6e0_0 .net "or1", 0 0, L_0x564898601f20; 1 drivers +v0x5648985ad7a0_0 .net "xor1", 0 0, L_0x564898601aa0; 1 drivers +v0x5648985ad860_0 .net "xor2", 0 0, L_0x564898601bd0; 1 drivers +S_0x5648985ada20 .scope module, "d3v" "dabble" 12 32, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898602800 .functor XOR 1, L_0x564898602fe0, L_0x5648986033b0, C4<0>, C4<0>; +L_0x564898602870 .functor NOR 1, L_0x564898602fe0, L_0x564898603170, C4<0>, C4<0>; +L_0x564898602930 .functor XOR 1, L_0x564898602fe0, L_0x564898603210, C4<0>, C4<0>; +L_0x5648986029a0 .functor NOR 1, L_0x564898602800, L_0x564898602930, C4<0>, C4<0>; +L_0x564898602ab0 .functor NOR 1, L_0x5648986029a0, L_0x564898602870, C4<0>, C4<0>; +L_0x564898602bc0 .functor BUF 1, L_0x564898602ab0, C4<0>, C4<0>, C4<0>; +L_0x564898602c80 .functor OR 1, L_0x564898602800, L_0x564898602870, C4<0>, C4<0>; +L_0x564898602cf0 .functor NOR 1, L_0x564898602c80, L_0x564898603210, C4<0>, C4<0>; +L_0x564898602e50 .functor AND 1, L_0x564898602c80, L_0x564898602930, C4<1>, C4<1>; +L_0x564898602ec0 .functor XOR 1, L_0x564898602ab0, L_0x5648986033b0, C4<0>, C4<0>; +v0x5648985adcd0_0 .net "A", 0 0, L_0x564898602fe0; 1 drivers +v0x5648985add90_0 .net "B", 0 0, L_0x564898603170; 1 drivers +v0x5648985ade50_0 .net "C", 0 0, L_0x564898603210; 1 drivers +v0x5648985adef0_0 .net "D", 0 0, L_0x5648986033b0; 1 drivers +v0x5648985adfb0_0 .net "E", 0 0, L_0x564898602ec0; 1 drivers +v0x5648985ae0c0_0 .net "X", 0 0, L_0x564898602bc0; 1 drivers +v0x5648985ae180_0 .net "Y", 0 0, L_0x564898602cf0; 1 drivers +v0x5648985ae240_0 .net "Z", 0 0, L_0x564898602e50; 1 drivers +v0x5648985ae300_0 .net "nor1", 0 0, L_0x564898602870; 1 drivers +v0x5648985ae450_0 .net "nor2", 0 0, L_0x5648986029a0; 1 drivers +v0x5648985ae510_0 .net "nor3", 0 0, L_0x564898602ab0; 1 drivers +v0x5648985ae5d0_0 .net "or1", 0 0, L_0x564898602c80; 1 drivers +v0x5648985ae690_0 .net "xor1", 0 0, L_0x564898602800; 1 drivers +v0x5648985ae750_0 .net "xor2", 0 0, L_0x564898602930; 1 drivers +S_0x5648985ae910 .scope module, "d4w" "dabble" 12 41, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898603340 .functor XOR 1, L_0x564898600cd0, L_0x564898603ee0, C4<0>, C4<0>; +L_0x564898603610 .functor NOR 1, L_0x564898600cd0, L_0x564898603d10, C4<0>, C4<0>; +L_0x564898603710 .functor XOR 1, L_0x564898600cd0, L_0x564898603db0, C4<0>, C4<0>; +L_0x564898603780 .functor NOR 1, L_0x564898603340, L_0x564898603710, C4<0>, C4<0>; +L_0x564898603840 .functor NOR 1, L_0x564898603780, L_0x564898603610, C4<0>, C4<0>; +L_0x564898603950 .functor BUF 1, L_0x564898603840, C4<0>, C4<0>, C4<0>; +L_0x564898603a10 .functor OR 1, L_0x564898603340, L_0x564898603610, C4<0>, C4<0>; +L_0x564898603a80 .functor NOR 1, L_0x564898603a10, L_0x564898603db0, C4<0>, C4<0>; +L_0x564898603be0 .functor AND 1, L_0x564898603a10, L_0x564898603710, C4<1>, C4<1>; +L_0x564898603c50 .functor XOR 1, L_0x564898603840, L_0x564898603ee0, C4<0>, C4<0>; +v0x5648985aebc0_0 .net "A", 0 0, L_0x564898600cd0; alias, 1 drivers +v0x5648985aeca0_0 .net "B", 0 0, L_0x564898603d10; 1 drivers +v0x5648985aed60_0 .net "C", 0 0, L_0x564898603db0; 1 drivers +v0x5648985aee00_0 .net "D", 0 0, L_0x564898603ee0; 1 drivers +v0x5648985aeec0_0 .net "E", 0 0, L_0x564898603c50; 1 drivers +v0x5648985aefd0_0 .net "X", 0 0, L_0x564898603950; 1 drivers +v0x5648985af090_0 .net "Y", 0 0, L_0x564898603a80; 1 drivers +v0x5648985af150_0 .net "Z", 0 0, L_0x564898603be0; 1 drivers +v0x5648985af210_0 .net "nor1", 0 0, L_0x564898603610; 1 drivers +v0x5648985af360_0 .net "nor2", 0 0, L_0x564898603780; 1 drivers +v0x5648985af420_0 .net "nor3", 0 0, L_0x564898603840; 1 drivers +v0x5648985af4e0_0 .net "or1", 0 0, L_0x564898603a10; 1 drivers +v0x5648985af5a0_0 .net "xor1", 0 0, L_0x564898603340; 1 drivers +v0x5648985af660_0 .net "xor2", 0 0, L_0x564898603710; 1 drivers +S_0x5648985af820 .scope module, "d5x" "dabble" 12 50, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898603fd0 .functor XOR 1, L_0x5648986047b0, L_0x5648986048e0, C4<0>, C4<0>; +L_0x564898604040 .functor NOR 1, L_0x5648986047b0, L_0x564898604980, C4<0>, C4<0>; +L_0x564898604100 .functor XOR 1, L_0x5648986047b0, L_0x564898604a20, C4<0>, C4<0>; +L_0x564898604170 .functor NOR 1, L_0x564898603fd0, L_0x564898604100, C4<0>, C4<0>; +L_0x564898604280 .functor NOR 1, L_0x564898604170, L_0x564898604040, C4<0>, C4<0>; +L_0x564898604390 .functor BUF 1, L_0x564898604280, C4<0>, C4<0>, C4<0>; +L_0x564898604450 .functor OR 1, L_0x564898603fd0, L_0x564898604040, C4<0>, C4<0>; +L_0x5648986044c0 .functor NOR 1, L_0x564898604450, L_0x564898604a20, C4<0>, C4<0>; +L_0x564898604620 .functor AND 1, L_0x564898604450, L_0x564898604100, C4<1>, C4<1>; +L_0x564898604690 .functor XOR 1, L_0x564898604280, L_0x5648986048e0, C4<0>, C4<0>; +v0x5648985afb20_0 .net "A", 0 0, L_0x5648986047b0; 1 drivers +v0x5648985afc00_0 .net "B", 0 0, L_0x564898604980; 1 drivers +v0x5648985afcc0_0 .net "C", 0 0, L_0x564898604a20; 1 drivers +v0x5648985afd60_0 .net "D", 0 0, L_0x5648986048e0; 1 drivers +v0x5648985afe20_0 .net "E", 0 0, L_0x564898604690; 1 drivers +v0x5648985aff30_0 .net "X", 0 0, L_0x564898604390; 1 drivers +v0x5648985afff0_0 .net "Y", 0 0, L_0x5648986044c0; 1 drivers +v0x5648985b00b0_0 .net "Z", 0 0, L_0x564898604620; 1 drivers +v0x5648985b0170_0 .net "nor1", 0 0, L_0x564898604040; 1 drivers +v0x5648985b02c0_0 .net "nor2", 0 0, L_0x564898604170; 1 drivers +v0x5648985b0380_0 .net "nor3", 0 0, L_0x564898604280; 1 drivers +v0x5648985b0440_0 .net "or1", 0 0, L_0x564898604450; 1 drivers +v0x5648985b0500_0 .net "xor1", 0 0, L_0x564898603fd0; 1 drivers +v0x5648985b05c0_0 .net "xor2", 0 0, L_0x564898604100; 1 drivers +S_0x5648985b0780 .scope module, "d6y" "dabble" 12 59, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898604ac0 .functor XOR 1, L_0x5648986054e0, L_0x564898605790, C4<0>, C4<0>; +L_0x564898604d70 .functor NOR 1, L_0x5648986054e0, L_0x564898605580, C4<0>, C4<0>; +L_0x564898604e30 .functor XOR 1, L_0x5648986054e0, L_0x5648986056f0, C4<0>, C4<0>; +L_0x564898604ea0 .functor NOR 1, L_0x564898604ac0, L_0x564898604e30, C4<0>, C4<0>; +L_0x564898604fb0 .functor NOR 1, L_0x564898604ea0, L_0x564898604d70, C4<0>, C4<0>; +L_0x5648986050c0 .functor BUF 1, L_0x564898604fb0, C4<0>, C4<0>, C4<0>; +L_0x564898605180 .functor OR 1, L_0x564898604ac0, L_0x564898604d70, C4<0>, C4<0>; +L_0x5648986051f0 .functor NOR 1, L_0x564898605180, L_0x5648986056f0, C4<0>, C4<0>; +L_0x564898605350 .functor AND 1, L_0x564898605180, L_0x564898604e30, C4<1>, C4<1>; +L_0x5648986053c0 .functor XOR 1, L_0x564898604fb0, L_0x564898605790, C4<0>, C4<0>; +v0x5648985b0a30_0 .net "A", 0 0, L_0x5648986054e0; 1 drivers +v0x5648985b0b10_0 .net "B", 0 0, L_0x564898605580; 1 drivers +v0x5648985b0bd0_0 .net "C", 0 0, L_0x5648986056f0; 1 drivers +v0x5648985b0c70_0 .net "D", 0 0, L_0x564898605790; 1 drivers +v0x5648985b0d30_0 .net "E", 0 0, L_0x5648986053c0; 1 drivers +v0x5648985b0e40_0 .net "X", 0 0, L_0x5648986050c0; 1 drivers +v0x5648985b0f00_0 .net "Y", 0 0, L_0x5648986051f0; 1 drivers +v0x5648985b0fc0_0 .net "Z", 0 0, L_0x564898605350; 1 drivers +v0x5648985b1080_0 .net "nor1", 0 0, L_0x564898604d70; 1 drivers +v0x5648985b11d0_0 .net "nor2", 0 0, L_0x564898604ea0; 1 drivers +v0x5648985b1290_0 .net "nor3", 0 0, L_0x564898604fb0; 1 drivers +v0x5648985b1350_0 .net "or1", 0 0, L_0x564898605180; 1 drivers +v0x5648985b1410_0 .net "xor1", 0 0, L_0x564898604ac0; 1 drivers +v0x5648985b14d0_0 .net "xor2", 0 0, L_0x564898604e30; 1 drivers +S_0x5648985b1690 .scope module, "d7z" "dabble" 12 68, 13 1 0, S_0x5648985aba70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x564898605960 .functor XOR 1, L_0x564898606020, L_0x564898606410, C4<0>, C4<0>; +L_0x5648986059d0 .functor NOR 1, L_0x564898606020, L_0x564898606150, C4<0>, C4<0>; +L_0x564898605a90 .functor XOR 1, L_0x564898606020, L_0x564898606370, C4<0>, C4<0>; +L_0x564898605b00 .functor NOR 1, L_0x564898605960, L_0x564898605a90, C4<0>, C4<0>; +L_0x564898605c10 .functor NOR 1, L_0x564898605b00, L_0x5648986059d0, C4<0>, C4<0>; +L_0x564898605d20 .functor BUF 1, L_0x564898605c10, C4<0>, C4<0>, C4<0>; +L_0x564898605de0 .functor OR 1, L_0x564898605960, L_0x5648986059d0, C4<0>, C4<0>; +L_0x564898605e50 .functor NOR 1, L_0x564898605de0, L_0x564898606370, C4<0>, C4<0>; +L_0x564898603590 .functor AND 1, L_0x564898605de0, L_0x564898605a90, C4<1>, C4<1>; +L_0x564898605fb0 .functor XOR 1, L_0x564898605c10, L_0x564898606410, C4<0>, C4<0>; +v0x5648985b1940_0 .net "A", 0 0, L_0x564898606020; 1 drivers +v0x5648985b1a20_0 .net "B", 0 0, L_0x564898606150; 1 drivers +v0x5648985b1ae0_0 .net "C", 0 0, L_0x564898606370; 1 drivers +v0x5648985b1b80_0 .net "D", 0 0, L_0x564898606410; 1 drivers +v0x5648985b1c40_0 .net "E", 0 0, L_0x564898605fb0; 1 drivers +v0x5648985b1d50_0 .net "X", 0 0, L_0x564898605d20; 1 drivers +v0x5648985b1e10_0 .net "Y", 0 0, L_0x564898605e50; 1 drivers +v0x5648985b1ed0_0 .net "Z", 0 0, L_0x564898603590; 1 drivers +v0x5648985b1f90_0 .net "nor1", 0 0, L_0x5648986059d0; 1 drivers +v0x5648985b20e0_0 .net "nor2", 0 0, L_0x564898605b00; 1 drivers +v0x5648985b21a0_0 .net "nor3", 0 0, L_0x564898605c10; 1 drivers +v0x5648985b2260_0 .net "or1", 0 0, L_0x564898605de0; 1 drivers +v0x5648985b2320_0 .net "xor1", 0 0, L_0x564898605960; 1 drivers +v0x5648985b23e0_0 .net "xor2", 0 0, L_0x564898605a90; 1 drivers +S_0x5648985b39f0 .scope module, "lU" "logicUnit" 4 21, 14 1 0, S_0x56489858fba0; + .timescale 0 0; + .port_info 0 /INPUT 3 "opCode"; + .port_info 1 /INPUT 4 "A"; + .port_info 2 /INPUT 4 "B"; + .port_info 3 /OUTPUT 4 "resultA"; + .port_info 4 /OUTPUT 4 "resultO"; + .port_info 5 /OUTPUT 4 "resultX"; +L_0x5648985e3b30 .functor AND 1, L_0x5648985e3ba0, L_0x5648985e3c90, C4<1>, C4<1>; +L_0x5648985e3d80 .functor AND 1, L_0x5648985e3df0, L_0x5648985e3ee0, C4<1>, C4<1>; +L_0x5648985e3fd0 .functor AND 1, L_0x5648985e4040, L_0x5648985e4130, C4<1>, C4<1>; +L_0x5648985e43f0 .functor AND 1, L_0x5648985e44b0, L_0x5648985e45f0, C4<1>, C4<1>; +L_0x5648985e46e0 .functor OR 1, L_0x5648985e4750, L_0x5648985e48a0, C4<0>, C4<0>; +L_0x5648985e4940 .functor OR 1, L_0x5648985e49b0, L_0x5648985e4b10, C4<0>, C4<0>; +L_0x5648985e4c00 .functor OR 1, L_0x5648985e4c70, L_0x5648985e4de0, C4<0>, C4<0>; +L_0x5648985e4aa0 .functor OR 1, L_0x5648985e5050, L_0x5648985e5140, C4<0>, C4<0>; +L_0x5648985e52d0 .functor XOR 1, L_0x5648985e5340, L_0x5648985e5430, C4<0>, C4<0>; +L_0x5648985e55d0 .functor XOR 1, L_0x5648985e5230, L_0x5648985e5690, C4<0>, C4<0>; +L_0x5648985e5840 .functor XOR 1, L_0x5648985e58b0, L_0x5648985e59a0, C4<0>, C4<0>; +L_0x5648985e5cf0 .functor XOR 1, L_0x5648985e5e20, L_0x5648985e5ff0, C4<0>, C4<0>; +L_0x5648985e60e0 .functor AND 1, L_0x5648985e6150, L_0x5648985e6330, C4<1>, C4<1>; +L_0x5648985e6470 .functor AND 1, L_0x5648985e6560, L_0x5648985e67a0, C4<1>, C4<1>; +L_0x5648985e5db0 .functor AND 1, L_0x5648985e6890, L_0x5648985e6a90, C4<1>, C4<1>; +L_0x5648985e6e30 .functor AND 1, L_0x5648985e6f80, L_0x5648985e7070, C4<1>, C4<1>; +L_0x5648985e6d10 .functor AND 1, L_0x5648985e6d80, L_0x5648985e7290, C4<1>, C4<1>; +L_0x5648985e7510 .functor AND 1, L_0x5648985e7620, L_0x5648985e7710, C4<1>, C4<1>; +L_0x5648985e7950 .functor AND 1, L_0x5648985e79c0, L_0x5648985e7ab0, C4<1>, C4<1>; +L_0x5648985e7e90 .functor AND 1, L_0x5648985e7580, L_0x5648985e81c0, C4<1>, C4<1>; +L_0x5648985e82b0 .functor AND 1, L_0x5648985e8320, L_0x5648985e8590, C4<1>, C4<1>; +L_0x5648985e86d0 .functor AND 1, L_0x5648985e8800, L_0x5648985e8a80, C4<1>, C4<1>; +L_0x5648985e8b70 .functor AND 1, L_0x5648985e8be0, L_0x5648985e8e70, C4<1>, C4<1>; +L_0x5648985e92a0 .functor AND 1, L_0x5648985e9430, L_0x5648985e9520, C4<1>, C4<1>; +v0x5648985b3c50_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985b3cf0_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985b3db0_0 .net *"_ivl_0", 0 0, L_0x5648985e3b30; 1 drivers +v0x5648985b3ea0_0 .net *"_ivl_100", 0 0, L_0x5648985e6d10; 1 drivers +v0x5648985b3f80_0 .net *"_ivl_103", 0 0, L_0x5648985e6d80; 1 drivers +v0x5648985b40b0_0 .net *"_ivl_105", 0 0, L_0x5648985e7290; 1 drivers +v0x5648985b4190_0 .net *"_ivl_106", 0 0, L_0x5648985e7510; 1 drivers +v0x5648985b4270_0 .net *"_ivl_109", 0 0, L_0x5648985e7620; 1 drivers +v0x5648985b4350_0 .net *"_ivl_11", 0 0, L_0x5648985e3ee0; 1 drivers +v0x5648985b4430_0 .net *"_ivl_111", 0 0, L_0x5648985e7710; 1 drivers +v0x5648985b4510_0 .net *"_ivl_112", 0 0, L_0x5648985e7950; 1 drivers +v0x5648985b45f0_0 .net *"_ivl_115", 0 0, L_0x5648985e79c0; 1 drivers +v0x5648985b46d0_0 .net *"_ivl_117", 0 0, L_0x5648985e7ab0; 1 drivers +v0x5648985b47b0_0 .net *"_ivl_118", 0 0, L_0x5648985e7e90; 1 drivers +v0x5648985b4890_0 .net *"_ivl_12", 0 0, L_0x5648985e3fd0; 1 drivers +v0x5648985b4970_0 .net *"_ivl_122", 0 0, L_0x5648985e7580; 1 drivers +v0x5648985b4a50_0 .net *"_ivl_124", 0 0, L_0x5648985e81c0; 1 drivers +v0x5648985b4b30_0 .net *"_ivl_125", 0 0, L_0x5648985e82b0; 1 drivers +v0x5648985b4c10_0 .net *"_ivl_128", 0 0, L_0x5648985e8320; 1 drivers +v0x5648985b4cf0_0 .net *"_ivl_130", 0 0, L_0x5648985e8590; 1 drivers +v0x5648985b4dd0_0 .net *"_ivl_131", 0 0, L_0x5648985e86d0; 1 drivers +v0x5648985b4eb0_0 .net *"_ivl_134", 0 0, L_0x5648985e8800; 1 drivers +v0x5648985b4f90_0 .net *"_ivl_136", 0 0, L_0x5648985e8a80; 1 drivers +v0x5648985b5070_0 .net *"_ivl_137", 0 0, L_0x5648985e8b70; 1 drivers +v0x5648985b5150_0 .net *"_ivl_140", 0 0, L_0x5648985e8be0; 1 drivers +v0x5648985b5230_0 .net *"_ivl_142", 0 0, L_0x5648985e8e70; 1 drivers +v0x5648985b5310_0 .net *"_ivl_143", 0 0, L_0x5648985e92a0; 1 drivers +v0x5648985b53f0_0 .net *"_ivl_147", 0 0, L_0x5648985e9430; 1 drivers +v0x5648985b54d0_0 .net *"_ivl_149", 0 0, L_0x5648985e9520; 1 drivers +v0x5648985b55b0_0 .net *"_ivl_15", 0 0, L_0x5648985e4040; 1 drivers +v0x5648985b5690_0 .net *"_ivl_17", 0 0, L_0x5648985e4130; 1 drivers +v0x5648985b5770_0 .net *"_ivl_18", 0 0, L_0x5648985e43f0; 1 drivers +v0x5648985b5850_0 .net *"_ivl_22", 0 0, L_0x5648985e44b0; 1 drivers +v0x5648985b5b40_0 .net *"_ivl_24", 0 0, L_0x5648985e45f0; 1 drivers +v0x5648985b5c20_0 .net *"_ivl_25", 0 0, L_0x5648985e46e0; 1 drivers +v0x5648985b5d00_0 .net *"_ivl_28", 0 0, L_0x5648985e4750; 1 drivers +v0x5648985b5de0_0 .net *"_ivl_3", 0 0, L_0x5648985e3ba0; 1 drivers +v0x5648985b5ec0_0 .net *"_ivl_30", 0 0, L_0x5648985e48a0; 1 drivers +v0x5648985b5fa0_0 .net *"_ivl_31", 0 0, L_0x5648985e4940; 1 drivers +v0x5648985b6080_0 .net *"_ivl_34", 0 0, L_0x5648985e49b0; 1 drivers +v0x5648985b6160_0 .net *"_ivl_36", 0 0, L_0x5648985e4b10; 1 drivers +v0x5648985b6240_0 .net *"_ivl_37", 0 0, L_0x5648985e4c00; 1 drivers +v0x5648985b6320_0 .net *"_ivl_40", 0 0, L_0x5648985e4c70; 1 drivers +v0x5648985b6400_0 .net *"_ivl_42", 0 0, L_0x5648985e4de0; 1 drivers +v0x5648985b64e0_0 .net *"_ivl_43", 0 0, L_0x5648985e4aa0; 1 drivers +v0x5648985b65c0_0 .net *"_ivl_47", 0 0, L_0x5648985e5050; 1 drivers +v0x5648985b66a0_0 .net *"_ivl_49", 0 0, L_0x5648985e5140; 1 drivers +v0x5648985b6780_0 .net *"_ivl_5", 0 0, L_0x5648985e3c90; 1 drivers +v0x5648985b6860_0 .net *"_ivl_50", 0 0, L_0x5648985e52d0; 1 drivers +v0x5648985b6940_0 .net *"_ivl_53", 0 0, L_0x5648985e5340; 1 drivers +v0x5648985b6a20_0 .net *"_ivl_55", 0 0, L_0x5648985e5430; 1 drivers +v0x5648985b6b00_0 .net *"_ivl_56", 0 0, L_0x5648985e55d0; 1 drivers +v0x5648985b6be0_0 .net *"_ivl_59", 0 0, L_0x5648985e5230; 1 drivers +v0x5648985b6cc0_0 .net *"_ivl_6", 0 0, L_0x5648985e3d80; 1 drivers +v0x5648985b6da0_0 .net *"_ivl_61", 0 0, L_0x5648985e5690; 1 drivers +v0x5648985b6e80_0 .net *"_ivl_62", 0 0, L_0x5648985e5840; 1 drivers +v0x5648985b6f60_0 .net *"_ivl_65", 0 0, L_0x5648985e58b0; 1 drivers +v0x5648985b7040_0 .net *"_ivl_67", 0 0, L_0x5648985e59a0; 1 drivers +v0x5648985b7120_0 .net *"_ivl_68", 0 0, L_0x5648985e5cf0; 1 drivers +v0x5648985b7200_0 .net *"_ivl_72", 0 0, L_0x5648985e5e20; 1 drivers +v0x5648985b72e0_0 .net *"_ivl_74", 0 0, L_0x5648985e5ff0; 1 drivers +v0x5648985b73c0_0 .net *"_ivl_75", 0 0, L_0x5648985e60e0; 1 drivers +v0x5648985b74a0_0 .net *"_ivl_78", 0 0, L_0x5648985e6150; 1 drivers +v0x5648985b7580_0 .net *"_ivl_80", 0 0, L_0x5648985e6330; 1 drivers +v0x5648985b7660_0 .net *"_ivl_81", 0 0, L_0x5648985e6470; 1 drivers +v0x5648985b7b50_0 .net *"_ivl_84", 0 0, L_0x5648985e6560; 1 drivers +v0x5648985b7c30_0 .net *"_ivl_86", 0 0, L_0x5648985e67a0; 1 drivers +v0x5648985b7d10_0 .net *"_ivl_87", 0 0, L_0x5648985e5db0; 1 drivers +v0x5648985b7df0_0 .net *"_ivl_9", 0 0, L_0x5648985e3df0; 1 drivers +v0x5648985b7ed0_0 .net *"_ivl_90", 0 0, L_0x5648985e6890; 1 drivers +v0x5648985b7fb0_0 .net *"_ivl_92", 0 0, L_0x5648985e6a90; 1 drivers +v0x5648985b8090_0 .net *"_ivl_93", 0 0, L_0x5648985e6e30; 1 drivers +v0x5648985b8170_0 .net *"_ivl_97", 0 0, L_0x5648985e6f80; 1 drivers +v0x5648985b8250_0 .net *"_ivl_99", 0 0, L_0x5648985e7070; 1 drivers +v0x5648985b8330_0 .net "and1", 3 0, L_0x5648985e4260; 1 drivers +v0x5648985b8410_0 .net "opCode", 2 0, L_0x5648985e97d0; 1 drivers +v0x5648985b84f0_0 .net "or1", 3 0, L_0x5648985e4ed0; 1 drivers +v0x5648985b85d0_0 .net "resultA", 3 0, L_0x5648985e6b80; alias, 1 drivers +v0x5648985b86b0_0 .net "resultO", 3 0, L_0x5648985e7d00; alias, 1 drivers +v0x5648985b8790_0 .net "resultX", 3 0, L_0x5648985e8f60; alias, 1 drivers +v0x5648985b8870_0 .net "xor1", 3 0, L_0x5648985e5b60; 1 drivers +L_0x5648985e3ba0 .part v0x5648985daf80_0, 0, 1; +L_0x5648985e3c90 .part v0x5648985db060_0, 0, 1; +L_0x5648985e3df0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985e3ee0 .part v0x5648985db060_0, 1, 1; +L_0x5648985e4040 .part v0x5648985daf80_0, 2, 1; +L_0x5648985e4130 .part v0x5648985db060_0, 2, 1; +L_0x5648985e4260 .concat8 [ 1 1 1 1], L_0x5648985e3b30, L_0x5648985e3d80, L_0x5648985e3fd0, L_0x5648985e43f0; +L_0x5648985e44b0 .part v0x5648985daf80_0, 3, 1; +L_0x5648985e45f0 .part v0x5648985db060_0, 3, 1; +L_0x5648985e4750 .part v0x5648985daf80_0, 0, 1; +L_0x5648985e48a0 .part v0x5648985db060_0, 0, 1; +L_0x5648985e49b0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985e4b10 .part v0x5648985db060_0, 1, 1; +L_0x5648985e4c70 .part v0x5648985daf80_0, 2, 1; +L_0x5648985e4de0 .part v0x5648985db060_0, 2, 1; +L_0x5648985e4ed0 .concat8 [ 1 1 1 1], L_0x5648985e46e0, L_0x5648985e4940, L_0x5648985e4c00, L_0x5648985e4aa0; +L_0x5648985e5050 .part v0x5648985daf80_0, 3, 1; +L_0x5648985e5140 .part v0x5648985db060_0, 3, 1; +L_0x5648985e5340 .part v0x5648985daf80_0, 0, 1; +L_0x5648985e5430 .part v0x5648985db060_0, 0, 1; +L_0x5648985e5230 .part v0x5648985daf80_0, 1, 1; +L_0x5648985e5690 .part v0x5648985db060_0, 1, 1; +L_0x5648985e58b0 .part v0x5648985daf80_0, 2, 1; +L_0x5648985e59a0 .part v0x5648985db060_0, 2, 1; +L_0x5648985e5b60 .concat8 [ 1 1 1 1], L_0x5648985e52d0, L_0x5648985e55d0, L_0x5648985e5840, L_0x5648985e5cf0; +L_0x5648985e5e20 .part v0x5648985daf80_0, 3, 1; +L_0x5648985e5ff0 .part v0x5648985db060_0, 3, 1; +L_0x5648985e6150 .part L_0x5648985e97d0, 0, 1; +L_0x5648985e6330 .part L_0x5648985e4260, 0, 1; +L_0x5648985e6560 .part L_0x5648985e97d0, 0, 1; +L_0x5648985e67a0 .part L_0x5648985e4260, 1, 1; +L_0x5648985e6890 .part L_0x5648985e97d0, 0, 1; +L_0x5648985e6a90 .part L_0x5648985e4260, 2, 1; +L_0x5648985e6b80 .concat8 [ 1 1 1 1], L_0x5648985e60e0, L_0x5648985e6470, L_0x5648985e5db0, L_0x5648985e6e30; +L_0x5648985e6f80 .part L_0x5648985e97d0, 0, 1; +L_0x5648985e7070 .part L_0x5648985e4260, 3, 1; +L_0x5648985e6d80 .part L_0x5648985e97d0, 1, 1; +L_0x5648985e7290 .part L_0x5648985e4ed0, 0, 1; +L_0x5648985e7620 .part L_0x5648985e97d0, 1, 1; +L_0x5648985e7710 .part L_0x5648985e4ed0, 1, 1; +L_0x5648985e79c0 .part L_0x5648985e97d0, 1, 1; +L_0x5648985e7ab0 .part L_0x5648985e4ed0, 2, 1; +L_0x5648985e7d00 .concat8 [ 1 1 1 1], L_0x5648985e6d10, L_0x5648985e7510, L_0x5648985e7950, L_0x5648985e7e90; +L_0x5648985e7580 .part L_0x5648985e97d0, 1, 1; +L_0x5648985e81c0 .part L_0x5648985e4ed0, 3, 1; +L_0x5648985e8320 .part L_0x5648985e97d0, 2, 1; +L_0x5648985e8590 .part L_0x5648985e5b60, 0, 1; +L_0x5648985e8800 .part L_0x5648985e97d0, 2, 1; +L_0x5648985e8a80 .part L_0x5648985e5b60, 1, 1; +L_0x5648985e8be0 .part L_0x5648985e97d0, 2, 1; +L_0x5648985e8e70 .part L_0x5648985e5b60, 2, 1; +L_0x5648985e8f60 .concat8 [ 1 1 1 1], L_0x5648985e82b0, L_0x5648985e86d0, L_0x5648985e8b70, L_0x5648985e92a0; +L_0x5648985e9430 .part L_0x5648985e97d0, 2, 1; +L_0x5648985e9520 .part L_0x5648985e5b60, 3, 1; +S_0x5648985b8a10 .scope module, "mU" "multiplier" 4 22, 15 1 0, S_0x56489858fba0; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /OUTPUT 8 "Y"; +L_0x5648985e9900 .functor AND 1, L_0x5648985e9970, L_0x5648985e9a10, C4<1>, C4<1>; +L_0x5648985e9b00 .functor AND 1, L_0x5648985e9b70, L_0x5648985e9c60, C4<1>, C4<1>; +L_0x5648985e9d50 .functor AND 1, L_0x5648985e9dc0, L_0x5648985e9eb0, C4<1>, C4<1>; +L_0x5648985e9fa0 .functor AND 1, L_0x5648985ea010, L_0x5648985ea100, C4<1>, C4<1>; +L_0x7f69dc15a018 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>; +L_0x5648985ea7e0 .functor NOT 1, L_0x7f69dc15a018, C4<0>, C4<0>, C4<0>; +L_0x5648985ea8f0 .functor AND 1, L_0x5648985ea960, L_0x5648985eaa50, C4<1>, C4<1>; +L_0x5648985eab40 .functor AND 1, L_0x5648985eabb0, L_0x5648985ead10, C4<1>, C4<1>; +L_0x5648985eae00 .functor AND 1, L_0x5648985eaec0, L_0x5648985eb030, C4<1>, C4<1>; +L_0x5648985eaca0 .functor AND 1, L_0x5648985eb3e0, L_0x5648985eb4d0, C4<1>, C4<1>; +L_0x5648985ed520 .functor AND 1, L_0x5648985ed8f0, L_0x5648985eb5c0, C4<1>, C4<1>; +L_0x5648985eda40 .functor AND 1, L_0x5648985edab0, L_0x5648985edc10, C4<1>, C4<1>; +L_0x5648985edcb0 .functor AND 1, L_0x5648985edd90, L_0x5648985edf50, C4<1>, C4<1>; +L_0x5648985ee300 .functor AND 1, L_0x5648985ee3c0, L_0x5648985ee4b0, C4<1>, C4<1>; +L_0x5648985f0680 .functor AND 1, L_0x5648985f0c70, L_0x5648985f0d10, C4<1>, C4<1>; +L_0x5648985edd20 .functor AND 1, L_0x5648985f0ec0, L_0x5648985f0f60, C4<1>, C4<1>; +L_0x5648985f1170 .functor AND 1, L_0x5648985f1270, L_0x5648985f1360, C4<1>, C4<1>; +L_0x5648985f1670 .functor AND 1, L_0x5648985f1730, L_0x5648985f1960, C4<1>, C4<1>; +L_0x7f69dc15a138 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f3a40 .functor OR 1, L_0x5648985f40a0, L_0x7f69dc15a138, C4<0>, C4<0>; +L_0x7f69dc15a180 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f42a0 .functor OR 1, L_0x5648985f4310, L_0x7f69dc15a180, C4<0>, C4<0>; +L_0x7f69dc15a1c8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f4450 .functor OR 1, L_0x5648985f4000, L_0x7f69dc15a1c8, C4<0>, C4<0>; +L_0x7f69dc15a210 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f47d0 .functor OR 1, L_0x5648985f4840, L_0x7f69dc15a210, C4<0>, C4<0>; +L_0x7f69dc15a258 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f4980 .functor OR 1, L_0x5648985f4ab0, L_0x7f69dc15a258, C4<0>, C4<0>; +L_0x7f69dc15a2a0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f4db0 .functor OR 1, L_0x5648985f4e20, L_0x7f69dc15a2a0, C4<0>, C4<0>; +L_0x7f69dc15a2e8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x5648985f5410 .functor OR 1, L_0x5648985f55a0, L_0x7f69dc15a2e8, C4<0>, C4<0>; +v0x5648985cae70_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985caf50_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985cb0a0_0 .net "S0", 4 0, L_0x5648985ed7c0; 1 drivers +v0x5648985cb160_0 .net "S1", 4 0, L_0x5648985f09c0; 1 drivers +v0x5648985cb240_0 .net "S2", 4 0, L_0x5648985f3ed0; 1 drivers +v0x5648985cb320_0 .net "Y", 7 0, L_0x5648985f4f10; alias, 1 drivers +v0x5648985cb400_0 .net *"_ivl_1", 0 0, L_0x5648985e9900; 1 drivers +v0x5648985cb4e0_0 .net *"_ivl_10", 0 0, L_0x5648985e9b70; 1 drivers +v0x5648985cb5c0_0 .net *"_ivl_101", 0 0, L_0x5648985f0d10; 1 drivers +v0x5648985cb730_0 .net *"_ivl_102", 0 0, L_0x5648985edd20; 1 drivers +v0x5648985cb810_0 .net *"_ivl_105", 0 0, L_0x5648985f0ec0; 1 drivers +v0x5648985cb8f0_0 .net *"_ivl_107", 0 0, L_0x5648985f0f60; 1 drivers +v0x5648985cb9d0_0 .net *"_ivl_108", 0 0, L_0x5648985f1170; 1 drivers +v0x5648985cbab0_0 .net *"_ivl_111", 0 0, L_0x5648985f1270; 1 drivers +v0x5648985cbb90_0 .net *"_ivl_113", 0 0, L_0x5648985f1360; 1 drivers +v0x5648985cbc70_0 .net *"_ivl_114", 0 0, L_0x5648985f1670; 1 drivers +v0x5648985cbd50_0 .net *"_ivl_118", 0 0, L_0x5648985f1730; 1 drivers +v0x5648985cbe30_0 .net *"_ivl_12", 0 0, L_0x5648985e9c60; 1 drivers +v0x5648985cbf10_0 .net *"_ivl_120", 0 0, L_0x5648985f1960; 1 drivers +v0x5648985cbff0_0 .net *"_ivl_13", 0 0, L_0x5648985e9d50; 1 drivers +v0x5648985cc0d0_0 .net *"_ivl_130", 0 0, L_0x5648985f3a40; 1 drivers +v0x5648985cc1b0_0 .net *"_ivl_133", 0 0, L_0x5648985f40a0; 1 drivers +v0x5648985cc290_0 .net/2u *"_ivl_134", 0 0, L_0x7f69dc15a138; 1 drivers +v0x5648985cc370_0 .net *"_ivl_136", 0 0, L_0x5648985f42a0; 1 drivers +v0x5648985cc450_0 .net *"_ivl_139", 0 0, L_0x5648985f4310; 1 drivers +v0x5648985cc530_0 .net/2u *"_ivl_140", 0 0, L_0x7f69dc15a180; 1 drivers +v0x5648985cc610_0 .net *"_ivl_142", 0 0, L_0x5648985f4450; 1 drivers +v0x5648985cc6f0_0 .net *"_ivl_145", 0 0, L_0x5648985f4000; 1 drivers +v0x5648985cc7d0_0 .net/2u *"_ivl_146", 0 0, L_0x7f69dc15a1c8; 1 drivers +v0x5648985cc8b0_0 .net *"_ivl_148", 0 0, L_0x5648985f47d0; 1 drivers +v0x5648985cc990_0 .net *"_ivl_151", 0 0, L_0x5648985f4840; 1 drivers +v0x5648985cca70_0 .net/2u *"_ivl_152", 0 0, L_0x7f69dc15a210; 1 drivers +v0x5648985ccb50_0 .net *"_ivl_154", 0 0, L_0x5648985f4980; 1 drivers +v0x5648985ccc30_0 .net *"_ivl_157", 0 0, L_0x5648985f4ab0; 1 drivers +v0x5648985ccd10_0 .net/2u *"_ivl_158", 0 0, L_0x7f69dc15a258; 1 drivers +v0x5648985ccdf0_0 .net *"_ivl_16", 0 0, L_0x5648985e9dc0; 1 drivers +v0x5648985cced0_0 .net *"_ivl_160", 0 0, L_0x5648985f4db0; 1 drivers +v0x5648985ccfb0_0 .net *"_ivl_163", 0 0, L_0x5648985f4e20; 1 drivers +v0x5648985cd090_0 .net/2u *"_ivl_164", 0 0, L_0x7f69dc15a2a0; 1 drivers +v0x5648985cd170_0 .net *"_ivl_166", 0 0, L_0x5648985f5410; 1 drivers +v0x5648985cd250_0 .net *"_ivl_170", 0 0, L_0x5648985f55a0; 1 drivers +v0x5648985cd330_0 .net/2u *"_ivl_171", 0 0, L_0x7f69dc15a2e8; 1 drivers +v0x5648985cd410_0 .net *"_ivl_18", 0 0, L_0x5648985e9eb0; 1 drivers +v0x5648985cd4f0_0 .net *"_ivl_19", 0 0, L_0x5648985e9fa0; 1 drivers +v0x5648985cd5d0_0 .net *"_ivl_22", 0 0, L_0x5648985ea010; 1 drivers +v0x5648985cd6b0_0 .net *"_ivl_24", 0 0, L_0x5648985ea100; 1 drivers +v0x5648985cd790_0 .net *"_ivl_25", 0 0, L_0x5648985ea7e0; 1 drivers +v0x5648985cd870_0 .net/2u *"_ivl_28", 0 0, L_0x7f69dc15a018; 1 drivers +v0x5648985cd950_0 .net *"_ivl_30", 0 0, L_0x5648985ea8f0; 1 drivers +v0x5648985cda30_0 .net *"_ivl_33", 0 0, L_0x5648985ea960; 1 drivers +v0x5648985cdb10_0 .net *"_ivl_35", 0 0, L_0x5648985eaa50; 1 drivers +v0x5648985cdbf0_0 .net *"_ivl_36", 0 0, L_0x5648985eab40; 1 drivers +v0x5648985cdcd0_0 .net *"_ivl_39", 0 0, L_0x5648985eabb0; 1 drivers +v0x5648985cddb0_0 .net *"_ivl_4", 0 0, L_0x5648985e9970; 1 drivers +v0x5648985cde90_0 .net *"_ivl_41", 0 0, L_0x5648985ead10; 1 drivers +v0x5648985cdf70_0 .net *"_ivl_42", 0 0, L_0x5648985eae00; 1 drivers +v0x5648985ce050_0 .net *"_ivl_45", 0 0, L_0x5648985eaec0; 1 drivers +v0x5648985ce130_0 .net *"_ivl_47", 0 0, L_0x5648985eb030; 1 drivers +v0x5648985ce210_0 .net *"_ivl_48", 0 0, L_0x5648985eaca0; 1 drivers +v0x5648985ce2f0_0 .net *"_ivl_52", 0 0, L_0x5648985eb3e0; 1 drivers +v0x5648985ce3d0_0 .net *"_ivl_54", 0 0, L_0x5648985eb4d0; 1 drivers +v0x5648985ce4b0_0 .net *"_ivl_6", 0 0, L_0x5648985e9a10; 1 drivers +v0x5648985ce590_0 .net *"_ivl_62", 0 0, L_0x5648985ed520; 1 drivers +v0x5648985ce670_0 .net *"_ivl_65", 0 0, L_0x5648985ed8f0; 1 drivers +v0x5648985ce750_0 .net *"_ivl_67", 0 0, L_0x5648985eb5c0; 1 drivers +v0x5648985cec40_0 .net *"_ivl_68", 0 0, L_0x5648985eda40; 1 drivers +v0x5648985ced20_0 .net *"_ivl_7", 0 0, L_0x5648985e9b00; 1 drivers +v0x5648985cee00_0 .net *"_ivl_71", 0 0, L_0x5648985edab0; 1 drivers +v0x5648985ceee0_0 .net *"_ivl_73", 0 0, L_0x5648985edc10; 1 drivers +v0x5648985cefc0_0 .net *"_ivl_74", 0 0, L_0x5648985edcb0; 1 drivers +v0x5648985cf0a0_0 .net *"_ivl_77", 0 0, L_0x5648985edd90; 1 drivers +v0x5648985cf180_0 .net *"_ivl_79", 0 0, L_0x5648985edf50; 1 drivers +v0x5648985cf260_0 .net *"_ivl_80", 0 0, L_0x5648985ee300; 1 drivers +v0x5648985cf340_0 .net *"_ivl_84", 0 0, L_0x5648985ee3c0; 1 drivers +v0x5648985cf420_0 .net *"_ivl_86", 0 0, L_0x5648985ee4b0; 1 drivers +v0x5648985cf500_0 .net *"_ivl_96", 0 0, L_0x5648985f0680; 1 drivers +v0x5648985cf5e0_0 .net *"_ivl_99", 0 0, L_0x5648985f0c70; 1 drivers +v0x5648985cf6c0_0 .net "a0", 3 0, L_0x5648985eb120; 1 drivers +v0x5648985cf780_0 .net "a1", 3 0, L_0x5648985ee040; 1 drivers +v0x5648985cf850_0 .net "a2", 3 0, L_0x5648985f1050; 1 drivers +v0x5648985cf920_0 .net "b0", 3 0, L_0x5648985ea600; 1 drivers +v0x5648985cf9f0_0 .net "overflow0", 0 0, L_0x5648985ed630; 1 drivers +v0x5648985cfac0_0 .net "overflow1", 0 0, L_0x5648985f0790; 1 drivers +v0x5648985cfb90_0 .net "overflow2", 0 0, L_0x5648985f3b50; 1 drivers +L_0x5648985e9970 .part v0x5648985daf80_0, 0, 1; +L_0x5648985e9a10 .part v0x5648985db060_0, 0, 1; +L_0x5648985e9b70 .part v0x5648985daf80_0, 1, 1; +L_0x5648985e9c60 .part v0x5648985db060_0, 0, 1; +L_0x5648985e9dc0 .part v0x5648985daf80_0, 2, 1; +L_0x5648985e9eb0 .part v0x5648985db060_0, 0, 1; +L_0x5648985ea010 .part v0x5648985daf80_0, 3, 1; +L_0x5648985ea100 .part v0x5648985db060_0, 0, 1; +L_0x5648985ea600 .concat8 [ 1 1 1 1], L_0x5648985e9b00, L_0x5648985e9d50, L_0x5648985e9fa0, L_0x5648985ea7e0; +L_0x5648985ea960 .part v0x5648985daf80_0, 0, 1; +L_0x5648985eaa50 .part v0x5648985db060_0, 1, 1; +L_0x5648985eabb0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985ead10 .part v0x5648985db060_0, 1, 1; +L_0x5648985eaec0 .part v0x5648985daf80_0, 2, 1; +L_0x5648985eb030 .part v0x5648985db060_0, 1, 1; +L_0x5648985eb120 .concat8 [ 1 1 1 1], L_0x5648985ea8f0, L_0x5648985eab40, L_0x5648985eae00, L_0x5648985eaca0; +L_0x5648985eb3e0 .part v0x5648985daf80_0, 3, 1; +L_0x5648985eb4d0 .part v0x5648985db060_0, 1, 1; +L_0x5648985ed7c0 .concat8 [ 4 1 0 0], L_0x5648985ed590, L_0x5648985ed040; +L_0x5648985ed8f0 .part v0x5648985daf80_0, 0, 1; +L_0x5648985eb5c0 .part v0x5648985db060_0, 2, 1; +L_0x5648985edab0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985edc10 .part v0x5648985db060_0, 2, 1; +L_0x5648985edd90 .part v0x5648985daf80_0, 2, 1; +L_0x5648985edf50 .part v0x5648985db060_0, 2, 1; +L_0x5648985ee040 .concat8 [ 1 1 1 1], L_0x5648985ed520, L_0x5648985eda40, L_0x5648985edcb0, L_0x5648985ee300; +L_0x5648985ee3c0 .part v0x5648985daf80_0, 3, 1; +L_0x5648985ee4b0 .part v0x5648985db060_0, 2, 1; +L_0x5648985f0920 .part L_0x5648985ed7c0, 1, 4; +L_0x5648985f09c0 .concat8 [ 4 1 0 0], L_0x5648985f06f0, L_0x5648985f0110; +L_0x5648985f0c70 .part v0x5648985daf80_0, 0, 1; +L_0x5648985f0d10 .part v0x5648985db060_0, 3, 1; +L_0x5648985f0ec0 .part v0x5648985daf80_0, 1, 1; +L_0x5648985f0f60 .part v0x5648985db060_0, 3, 1; +L_0x5648985f1270 .part v0x5648985daf80_0, 2, 1; +L_0x5648985f1360 .part v0x5648985db060_0, 3, 1; +L_0x5648985f1050 .concat8 [ 1 1 1 1], L_0x5648985f0680, L_0x5648985edd20, L_0x5648985f1170, L_0x5648985f1670; +L_0x5648985f1730 .part v0x5648985daf80_0, 3, 1; +L_0x5648985f1960 .part v0x5648985db060_0, 3, 1; +L_0x5648985f3ce0 .part L_0x5648985f09c0, 1, 4; +L_0x5648985f3ed0 .concat8 [ 4 1 0 0], L_0x5648985f3ab0, L_0x5648985f34d0; +L_0x5648985f40a0 .part L_0x5648985ed7c0, 0, 1; +L_0x5648985f4310 .part L_0x5648985f09c0, 0, 1; +L_0x5648985f4000 .part L_0x5648985f3ed0, 0, 1; +L_0x5648985f4840 .part L_0x5648985f3ed0, 1, 1; +L_0x5648985f4ab0 .part L_0x5648985f3ed0, 2, 1; +L_0x5648985f4e20 .part L_0x5648985f3ed0, 3, 1; +LS_0x5648985f4f10_0_0 .concat8 [ 1 1 1 1], L_0x5648985e9900, L_0x5648985f3a40, L_0x5648985f42a0, L_0x5648985f4450; +LS_0x5648985f4f10_0_4 .concat8 [ 1 1 1 1], L_0x5648985f47d0, L_0x5648985f4980, L_0x5648985f4db0, L_0x5648985f5410; +L_0x5648985f4f10 .concat8 [ 4 4 0 0], LS_0x5648985f4f10_0_0, LS_0x5648985f4f10_0_4; +L_0x5648985f55a0 .part L_0x5648985f3ed0, 4, 1; +S_0x5648985b8c10 .scope module, "add0" "addition" 15 26, 6 1 0, S_0x5648985b8a10; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x5648985ed630 .functor XOR 1, L_0x5648985ed6a0, L_0x5648985ed040, C4<0>, C4<0>; +v0x5648985be540_0 .net "A", 3 0, L_0x5648985eb120; alias, 1 drivers +v0x5648985be620_0 .net "B", 3 0, L_0x5648985ea600; alias, 1 drivers +v0x5648985be700_0 .net "Carry4", 2 0, L_0x5648985ecb70; 1 drivers +L_0x7f69dc15a060 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x5648985be7c0_0 .net "CarryIN", 0 0, L_0x7f69dc15a060; 1 drivers +v0x5648985be8b0_0 .net "CarryOUT", 0 0, L_0x5648985ed040; 1 drivers +v0x5648985be9a0_0 .net "Y", 3 0, L_0x5648985ed590; 1 drivers +v0x5648985bea60_0 .net *"_ivl_39", 0 0, L_0x5648985ed6a0; 1 drivers +v0x5648985beb40_0 .net "overflow", 0 0, L_0x5648985ed630; alias, 1 drivers +L_0x5648985eba60 .part L_0x5648985eb120, 0, 1; +L_0x5648985ebb90 .part L_0x5648985ea600, 0, 1; +L_0x5648985ec020 .part L_0x5648985eb120, 1, 1; +L_0x5648985ec1e0 .part L_0x5648985ea600, 1, 1; +L_0x5648985ec3a0 .part L_0x5648985ecb70, 0, 1; +L_0x5648985ec790 .part L_0x5648985eb120, 2, 1; +L_0x5648985ec8c0 .part L_0x5648985ea600, 2, 1; +L_0x5648985ec9f0 .part L_0x5648985ecb70, 1, 1; +L_0x5648985ecb70 .concat8 [ 1 1 1 0], L_0x5648985eb9f0, L_0x5648985ebfb0, L_0x5648985ec720; +L_0x5648985ed100 .part L_0x5648985eb120, 3, 1; +L_0x5648985ed230 .part L_0x5648985ea600, 3, 1; +L_0x5648985ed360 .part L_0x5648985ecb70, 2, 1; +L_0x5648985ed590 .concat8 [ 1 1 1 1], L_0x5648985eb8f0, L_0x5648985ebef0, L_0x5648985ec6b0, L_0x5648985ecf80; +L_0x5648985ed6a0 .part L_0x5648985ecb70, 2, 1; +S_0x5648985b8eb0 .scope module, "f0" "fulladder" 6 11, 7 1 0, S_0x5648985b8c10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985eb9f0 .functor OR 1, L_0x5648985eb660, L_0x5648985eb830, C4<0>, C4<0>; +v0x5648985b9dd0_0 .net "A", 0 0, L_0x5648985eba60; 1 drivers +v0x5648985b9e90_0 .net "B", 0 0, L_0x5648985ebb90; 1 drivers +v0x5648985b9f60_0 .net "Carry", 0 0, L_0x7f69dc15a060; alias, 1 drivers +v0x5648985ba060_0 .net "CarryO", 0 0, L_0x5648985eb9f0; 1 drivers +v0x5648985ba100_0 .net "Sum", 0 0, L_0x5648985eb8f0; 1 drivers +v0x5648985ba1f0_0 .net "and1", 0 0, L_0x5648985eb660; 1 drivers +v0x5648985ba2c0_0 .net "and2", 0 0, L_0x5648985eb830; 1 drivers +v0x5648985ba390_0 .net "xor1", 0 0, L_0x5648985eb7c0; 1 drivers +S_0x5648985b9130 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985b8eb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985eb660 .functor AND 1, L_0x5648985eba60, L_0x5648985ebb90, C4<1>, C4<1>; +L_0x5648985eb7c0 .functor XOR 1, L_0x5648985eba60, L_0x5648985ebb90, C4<0>, C4<0>; +v0x5648985b93d0_0 .net "A", 0 0, L_0x5648985eba60; alias, 1 drivers +v0x5648985b94b0_0 .net "B", 0 0, L_0x5648985ebb90; alias, 1 drivers +v0x5648985b9570_0 .net "Carry", 0 0, L_0x5648985eb660; alias, 1 drivers +v0x5648985b9640_0 .net "Sum", 0 0, L_0x5648985eb7c0; alias, 1 drivers +S_0x5648985b97b0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985b8eb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985eb830 .functor AND 1, L_0x5648985eb7c0, L_0x7f69dc15a060, C4<1>, C4<1>; +L_0x5648985eb8f0 .functor XOR 1, L_0x5648985eb7c0, L_0x7f69dc15a060, C4<0>, C4<0>; +v0x5648985b9a20_0 .net "A", 0 0, L_0x5648985eb7c0; alias, 1 drivers +v0x5648985b9af0_0 .net "B", 0 0, L_0x7f69dc15a060; alias, 1 drivers +v0x5648985b9b90_0 .net "Carry", 0 0, L_0x5648985eb830; alias, 1 drivers +v0x5648985b9c60_0 .net "Sum", 0 0, L_0x5648985eb8f0; alias, 1 drivers +S_0x5648985ba480 .scope module, "f1" "fulladder" 6 12, 7 1 0, S_0x5648985b8c10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985ebfb0 .functor OR 1, L_0x5648985ebcc0, L_0x5648985ebda0, C4<0>, C4<0>; +v0x5648985bb360_0 .net "A", 0 0, L_0x5648985ec020; 1 drivers +v0x5648985bb420_0 .net "B", 0 0, L_0x5648985ec1e0; 1 drivers +v0x5648985bb4f0_0 .net "Carry", 0 0, L_0x5648985ec3a0; 1 drivers +v0x5648985bb5f0_0 .net "CarryO", 0 0, L_0x5648985ebfb0; 1 drivers +v0x5648985bb690_0 .net "Sum", 0 0, L_0x5648985ebef0; 1 drivers +v0x5648985bb780_0 .net "and1", 0 0, L_0x5648985ebcc0; 1 drivers +v0x5648985bb850_0 .net "and2", 0 0, L_0x5648985ebda0; 1 drivers +v0x5648985bb920_0 .net "xor1", 0 0, L_0x5648985ebd30; 1 drivers +S_0x5648985ba6e0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985ba480; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ebcc0 .functor AND 1, L_0x5648985ec020, L_0x5648985ec1e0, C4<1>, C4<1>; +L_0x5648985ebd30 .functor XOR 1, L_0x5648985ec020, L_0x5648985ec1e0, C4<0>, C4<0>; +v0x5648985ba960_0 .net "A", 0 0, L_0x5648985ec020; alias, 1 drivers +v0x5648985baa40_0 .net "B", 0 0, L_0x5648985ec1e0; alias, 1 drivers +v0x5648985bab00_0 .net "Carry", 0 0, L_0x5648985ebcc0; alias, 1 drivers +v0x5648985babd0_0 .net "Sum", 0 0, L_0x5648985ebd30; alias, 1 drivers +S_0x5648985bad40 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985ba480; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ebda0 .functor AND 1, L_0x5648985ebd30, L_0x5648985ec3a0, C4<1>, C4<1>; +L_0x5648985ebef0 .functor XOR 1, L_0x5648985ebd30, L_0x5648985ec3a0, C4<0>, C4<0>; +v0x5648985bafb0_0 .net "A", 0 0, L_0x5648985ebd30; alias, 1 drivers +v0x5648985bb080_0 .net "B", 0 0, L_0x5648985ec3a0; alias, 1 drivers +v0x5648985bb120_0 .net "Carry", 0 0, L_0x5648985ebda0; alias, 1 drivers +v0x5648985bb1f0_0 .net "Sum", 0 0, L_0x5648985ebef0; alias, 1 drivers +S_0x5648985bba10 .scope module, "f2" "fulladder" 6 13, 7 1 0, S_0x5648985b8c10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985ec720 .functor OR 1, L_0x5648985ec4d0, L_0x5648985ec5b0, C4<0>, C4<0>; +v0x5648985bc900_0 .net "A", 0 0, L_0x5648985ec790; 1 drivers +v0x5648985bc9c0_0 .net "B", 0 0, L_0x5648985ec8c0; 1 drivers +v0x5648985bca90_0 .net "Carry", 0 0, L_0x5648985ec9f0; 1 drivers +v0x5648985bcb90_0 .net "CarryO", 0 0, L_0x5648985ec720; 1 drivers +v0x5648985bcc30_0 .net "Sum", 0 0, L_0x5648985ec6b0; 1 drivers +v0x5648985bcd20_0 .net "and1", 0 0, L_0x5648985ec4d0; 1 drivers +v0x5648985bcdf0_0 .net "and2", 0 0, L_0x5648985ec5b0; 1 drivers +v0x5648985bcec0_0 .net "xor1", 0 0, L_0x5648985ec540; 1 drivers +S_0x5648985bbca0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985bba10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ec4d0 .functor AND 1, L_0x5648985ec790, L_0x5648985ec8c0, C4<1>, C4<1>; +L_0x5648985ec540 .functor XOR 1, L_0x5648985ec790, L_0x5648985ec8c0, C4<0>, C4<0>; +v0x5648985bbf20_0 .net "A", 0 0, L_0x5648985ec790; alias, 1 drivers +v0x5648985bbfe0_0 .net "B", 0 0, L_0x5648985ec8c0; alias, 1 drivers +v0x5648985bc0a0_0 .net "Carry", 0 0, L_0x5648985ec4d0; alias, 1 drivers +v0x5648985bc170_0 .net "Sum", 0 0, L_0x5648985ec540; alias, 1 drivers +S_0x5648985bc2e0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985bba10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ec5b0 .functor AND 1, L_0x5648985ec540, L_0x5648985ec9f0, C4<1>, C4<1>; +L_0x5648985ec6b0 .functor XOR 1, L_0x5648985ec540, L_0x5648985ec9f0, C4<0>, C4<0>; +v0x5648985bc550_0 .net "A", 0 0, L_0x5648985ec540; alias, 1 drivers +v0x5648985bc620_0 .net "B", 0 0, L_0x5648985ec9f0; alias, 1 drivers +v0x5648985bc6c0_0 .net "Carry", 0 0, L_0x5648985ec5b0; alias, 1 drivers +v0x5648985bc790_0 .net "Sum", 0 0, L_0x5648985ec6b0; alias, 1 drivers +S_0x5648985bcfb0 .scope module, "f3" "fulladder" 6 14, 7 1 0, S_0x5648985b8c10; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985ed040 .functor OR 1, L_0x5648985ecc60, L_0x5648985ece30, C4<0>, C4<0>; +v0x5648985bde90_0 .net "A", 0 0, L_0x5648985ed100; 1 drivers +v0x5648985bdf50_0 .net "B", 0 0, L_0x5648985ed230; 1 drivers +v0x5648985be020_0 .net "Carry", 0 0, L_0x5648985ed360; 1 drivers +v0x5648985be120_0 .net "CarryO", 0 0, L_0x5648985ed040; alias, 1 drivers +v0x5648985be1c0_0 .net "Sum", 0 0, L_0x5648985ecf80; 1 drivers +v0x5648985be2b0_0 .net "and1", 0 0, L_0x5648985ecc60; 1 drivers +v0x5648985be380_0 .net "and2", 0 0, L_0x5648985ece30; 1 drivers +v0x5648985be450_0 .net "xor1", 0 0, L_0x5648985ecdc0; 1 drivers +S_0x5648985bd210 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985bcfb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ecc60 .functor AND 1, L_0x5648985ed100, L_0x5648985ed230, C4<1>, C4<1>; +L_0x5648985ecdc0 .functor XOR 1, L_0x5648985ed100, L_0x5648985ed230, C4<0>, C4<0>; +v0x5648985bd490_0 .net "A", 0 0, L_0x5648985ed100; alias, 1 drivers +v0x5648985bd570_0 .net "B", 0 0, L_0x5648985ed230; alias, 1 drivers +v0x5648985bd630_0 .net "Carry", 0 0, L_0x5648985ecc60; alias, 1 drivers +v0x5648985bd700_0 .net "Sum", 0 0, L_0x5648985ecdc0; alias, 1 drivers +S_0x5648985bd870 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985bcfb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ece30 .functor AND 1, L_0x5648985ecdc0, L_0x5648985ed360, C4<1>, C4<1>; +L_0x5648985ecf80 .functor XOR 1, L_0x5648985ecdc0, L_0x5648985ed360, C4<0>, C4<0>; +v0x5648985bdae0_0 .net "A", 0 0, L_0x5648985ecdc0; alias, 1 drivers +v0x5648985bdbb0_0 .net "B", 0 0, L_0x5648985ed360; alias, 1 drivers +v0x5648985bdc50_0 .net "Carry", 0 0, L_0x5648985ece30; alias, 1 drivers +v0x5648985bdd20_0 .net "Sum", 0 0, L_0x5648985ecf80; alias, 1 drivers +S_0x5648985becc0 .scope module, "add1" "addition" 15 42, 6 1 0, S_0x5648985b8a10; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x5648985f0790 .functor XOR 1, L_0x5648985f0800, L_0x5648985f0110, C4<0>, C4<0>; +v0x5648985c45d0_0 .net "A", 3 0, L_0x5648985ee040; alias, 1 drivers +v0x5648985c46b0_0 .net "B", 3 0, L_0x5648985f0920; 1 drivers +v0x5648985c4790_0 .net "Carry4", 2 0, L_0x5648985efc40; 1 drivers +L_0x7f69dc15a0a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x5648985c4850_0 .net "CarryIN", 0 0, L_0x7f69dc15a0a8; 1 drivers +v0x5648985c4940_0 .net "CarryOUT", 0 0, L_0x5648985f0110; 1 drivers +v0x5648985c4a30_0 .net "Y", 3 0, L_0x5648985f06f0; 1 drivers +v0x5648985c4af0_0 .net *"_ivl_39", 0 0, L_0x5648985f0800; 1 drivers +v0x5648985c4bd0_0 .net "overflow", 0 0, L_0x5648985f0790; alias, 1 drivers +L_0x5648985eeb20 .part L_0x5648985ee040, 0, 1; +L_0x5648985eec50 .part L_0x5648985f0920, 0, 1; +L_0x5648985ef0e0 .part L_0x5648985ee040, 1, 1; +L_0x5648985ef2a0 .part L_0x5648985f0920, 1, 1; +L_0x5648985ef3d0 .part L_0x5648985efc40, 0, 1; +L_0x5648985ef860 .part L_0x5648985ee040, 2, 1; +L_0x5648985ef990 .part L_0x5648985f0920, 2, 1; +L_0x5648985efac0 .part L_0x5648985efc40, 1, 1; +L_0x5648985efc40 .concat8 [ 1 1 1 0], L_0x5648985eeab0, L_0x5648985ef070, L_0x5648985ef7f0; +L_0x5648985f01d0 .part L_0x5648985ee040, 3, 1; +L_0x5648985f0300 .part L_0x5648985f0920, 3, 1; +L_0x5648985f04c0 .part L_0x5648985efc40, 2, 1; +L_0x5648985f06f0 .concat8 [ 1 1 1 1], L_0x5648985ee9b0, L_0x5648985eefb0, L_0x5648985ef730, L_0x5648985f0050; +L_0x5648985f0800 .part L_0x5648985efc40, 2, 1; +S_0x5648985bef60 .scope module, "f0" "fulladder" 6 11, 7 1 0, S_0x5648985becc0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985eeab0 .functor OR 1, L_0x5648985ee690, L_0x5648985ee860, C4<0>, C4<0>; +v0x5648985bfe60_0 .net "A", 0 0, L_0x5648985eeb20; 1 drivers +v0x5648985bff20_0 .net "B", 0 0, L_0x5648985eec50; 1 drivers +v0x5648985bfff0_0 .net "Carry", 0 0, L_0x7f69dc15a0a8; alias, 1 drivers +v0x5648985c00f0_0 .net "CarryO", 0 0, L_0x5648985eeab0; 1 drivers +v0x5648985c0190_0 .net "Sum", 0 0, L_0x5648985ee9b0; 1 drivers +v0x5648985c0280_0 .net "and1", 0 0, L_0x5648985ee690; 1 drivers +v0x5648985c0350_0 .net "and2", 0 0, L_0x5648985ee860; 1 drivers +v0x5648985c0420_0 .net "xor1", 0 0, L_0x5648985ee7f0; 1 drivers +S_0x5648985bf1c0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985bef60; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ee690 .functor AND 1, L_0x5648985eeb20, L_0x5648985eec50, C4<1>, C4<1>; +L_0x5648985ee7f0 .functor XOR 1, L_0x5648985eeb20, L_0x5648985eec50, C4<0>, C4<0>; +v0x5648985bf460_0 .net "A", 0 0, L_0x5648985eeb20; alias, 1 drivers +v0x5648985bf540_0 .net "B", 0 0, L_0x5648985eec50; alias, 1 drivers +v0x5648985bf600_0 .net "Carry", 0 0, L_0x5648985ee690; alias, 1 drivers +v0x5648985bf6d0_0 .net "Sum", 0 0, L_0x5648985ee7f0; alias, 1 drivers +S_0x5648985bf840 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985bef60; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ee860 .functor AND 1, L_0x5648985ee7f0, L_0x7f69dc15a0a8, C4<1>, C4<1>; +L_0x5648985ee9b0 .functor XOR 1, L_0x5648985ee7f0, L_0x7f69dc15a0a8, C4<0>, C4<0>; +v0x5648985bfab0_0 .net "A", 0 0, L_0x5648985ee7f0; alias, 1 drivers +v0x5648985bfb80_0 .net "B", 0 0, L_0x7f69dc15a0a8; alias, 1 drivers +v0x5648985bfc20_0 .net "Carry", 0 0, L_0x5648985ee860; alias, 1 drivers +v0x5648985bfcf0_0 .net "Sum", 0 0, L_0x5648985ee9b0; alias, 1 drivers +S_0x5648985c0510 .scope module, "f1" "fulladder" 6 12, 7 1 0, S_0x5648985becc0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985ef070 .functor OR 1, L_0x5648985eed80, L_0x5648985eee60, C4<0>, C4<0>; +v0x5648985c13f0_0 .net "A", 0 0, L_0x5648985ef0e0; 1 drivers +v0x5648985c14b0_0 .net "B", 0 0, L_0x5648985ef2a0; 1 drivers +v0x5648985c1580_0 .net "Carry", 0 0, L_0x5648985ef3d0; 1 drivers +v0x5648985c1680_0 .net "CarryO", 0 0, L_0x5648985ef070; 1 drivers +v0x5648985c1720_0 .net "Sum", 0 0, L_0x5648985eefb0; 1 drivers +v0x5648985c1810_0 .net "and1", 0 0, L_0x5648985eed80; 1 drivers +v0x5648985c18e0_0 .net "and2", 0 0, L_0x5648985eee60; 1 drivers +v0x5648985c19b0_0 .net "xor1", 0 0, L_0x5648985eedf0; 1 drivers +S_0x5648985c0770 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c0510; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985eed80 .functor AND 1, L_0x5648985ef0e0, L_0x5648985ef2a0, C4<1>, C4<1>; +L_0x5648985eedf0 .functor XOR 1, L_0x5648985ef0e0, L_0x5648985ef2a0, C4<0>, C4<0>; +v0x5648985c09f0_0 .net "A", 0 0, L_0x5648985ef0e0; alias, 1 drivers +v0x5648985c0ad0_0 .net "B", 0 0, L_0x5648985ef2a0; alias, 1 drivers +v0x5648985c0b90_0 .net "Carry", 0 0, L_0x5648985eed80; alias, 1 drivers +v0x5648985c0c60_0 .net "Sum", 0 0, L_0x5648985eedf0; alias, 1 drivers +S_0x5648985c0dd0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c0510; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985eee60 .functor AND 1, L_0x5648985eedf0, L_0x5648985ef3d0, C4<1>, C4<1>; +L_0x5648985eefb0 .functor XOR 1, L_0x5648985eedf0, L_0x5648985ef3d0, C4<0>, C4<0>; +v0x5648985c1040_0 .net "A", 0 0, L_0x5648985eedf0; alias, 1 drivers +v0x5648985c1110_0 .net "B", 0 0, L_0x5648985ef3d0; alias, 1 drivers +v0x5648985c11b0_0 .net "Carry", 0 0, L_0x5648985eee60; alias, 1 drivers +v0x5648985c1280_0 .net "Sum", 0 0, L_0x5648985eefb0; alias, 1 drivers +S_0x5648985c1aa0 .scope module, "f2" "fulladder" 6 13, 7 1 0, S_0x5648985becc0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985ef7f0 .functor OR 1, L_0x5648985ef500, L_0x5648985ef5e0, C4<0>, C4<0>; +v0x5648985c2990_0 .net "A", 0 0, L_0x5648985ef860; 1 drivers +v0x5648985c2a50_0 .net "B", 0 0, L_0x5648985ef990; 1 drivers +v0x5648985c2b20_0 .net "Carry", 0 0, L_0x5648985efac0; 1 drivers +v0x5648985c2c20_0 .net "CarryO", 0 0, L_0x5648985ef7f0; 1 drivers +v0x5648985c2cc0_0 .net "Sum", 0 0, L_0x5648985ef730; 1 drivers +v0x5648985c2db0_0 .net "and1", 0 0, L_0x5648985ef500; 1 drivers +v0x5648985c2e80_0 .net "and2", 0 0, L_0x5648985ef5e0; 1 drivers +v0x5648985c2f50_0 .net "xor1", 0 0, L_0x5648985ef570; 1 drivers +S_0x5648985c1d30 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c1aa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ef500 .functor AND 1, L_0x5648985ef860, L_0x5648985ef990, C4<1>, C4<1>; +L_0x5648985ef570 .functor XOR 1, L_0x5648985ef860, L_0x5648985ef990, C4<0>, C4<0>; +v0x5648985c1fb0_0 .net "A", 0 0, L_0x5648985ef860; alias, 1 drivers +v0x5648985c2070_0 .net "B", 0 0, L_0x5648985ef990; alias, 1 drivers +v0x5648985c2130_0 .net "Carry", 0 0, L_0x5648985ef500; alias, 1 drivers +v0x5648985c2200_0 .net "Sum", 0 0, L_0x5648985ef570; alias, 1 drivers +S_0x5648985c2370 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c1aa0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985ef5e0 .functor AND 1, L_0x5648985ef570, L_0x5648985efac0, C4<1>, C4<1>; +L_0x5648985ef730 .functor XOR 1, L_0x5648985ef570, L_0x5648985efac0, C4<0>, C4<0>; +v0x5648985c25e0_0 .net "A", 0 0, L_0x5648985ef570; alias, 1 drivers +v0x5648985c26b0_0 .net "B", 0 0, L_0x5648985efac0; alias, 1 drivers +v0x5648985c2750_0 .net "Carry", 0 0, L_0x5648985ef5e0; alias, 1 drivers +v0x5648985c2820_0 .net "Sum", 0 0, L_0x5648985ef730; alias, 1 drivers +S_0x5648985c3040 .scope module, "f3" "fulladder" 6 14, 7 1 0, S_0x5648985becc0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985f0110 .functor OR 1, L_0x5648985efd30, L_0x5648985eff00, C4<0>, C4<0>; +v0x5648985c3f20_0 .net "A", 0 0, L_0x5648985f01d0; 1 drivers +v0x5648985c3fe0_0 .net "B", 0 0, L_0x5648985f0300; 1 drivers +v0x5648985c40b0_0 .net "Carry", 0 0, L_0x5648985f04c0; 1 drivers +v0x5648985c41b0_0 .net "CarryO", 0 0, L_0x5648985f0110; alias, 1 drivers +v0x5648985c4250_0 .net "Sum", 0 0, L_0x5648985f0050; 1 drivers +v0x5648985c4340_0 .net "and1", 0 0, L_0x5648985efd30; 1 drivers +v0x5648985c4410_0 .net "and2", 0 0, L_0x5648985eff00; 1 drivers +v0x5648985c44e0_0 .net "xor1", 0 0, L_0x5648985efe90; 1 drivers +S_0x5648985c32a0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c3040; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985efd30 .functor AND 1, L_0x5648985f01d0, L_0x5648985f0300, C4<1>, C4<1>; +L_0x5648985efe90 .functor XOR 1, L_0x5648985f01d0, L_0x5648985f0300, C4<0>, C4<0>; +v0x5648985c3520_0 .net "A", 0 0, L_0x5648985f01d0; alias, 1 drivers +v0x5648985c3600_0 .net "B", 0 0, L_0x5648985f0300; alias, 1 drivers +v0x5648985c36c0_0 .net "Carry", 0 0, L_0x5648985efd30; alias, 1 drivers +v0x5648985c3790_0 .net "Sum", 0 0, L_0x5648985efe90; alias, 1 drivers +S_0x5648985c3900 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c3040; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985eff00 .functor AND 1, L_0x5648985efe90, L_0x5648985f04c0, C4<1>, C4<1>; +L_0x5648985f0050 .functor XOR 1, L_0x5648985efe90, L_0x5648985f04c0, C4<0>, C4<0>; +v0x5648985c3b70_0 .net "A", 0 0, L_0x5648985efe90; alias, 1 drivers +v0x5648985c3c40_0 .net "B", 0 0, L_0x5648985f04c0; alias, 1 drivers +v0x5648985c3ce0_0 .net "Carry", 0 0, L_0x5648985eff00; alias, 1 drivers +v0x5648985c3db0_0 .net "Sum", 0 0, L_0x5648985f0050; alias, 1 drivers +S_0x5648985c4d90 .scope module, "add2" "addition" 15 58, 6 1 0, S_0x5648985b8a10; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x5648985f3b50 .functor XOR 1, L_0x5648985f3bc0, L_0x5648985f34d0, C4<0>, C4<0>; +v0x5648985ca6b0_0 .net "A", 3 0, L_0x5648985f1050; alias, 1 drivers +v0x5648985ca790_0 .net "B", 3 0, L_0x5648985f3ce0; 1 drivers +v0x5648985ca870_0 .net "Carry4", 2 0, L_0x5648985f3000; 1 drivers +L_0x7f69dc15a0f0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x5648985ca930_0 .net "CarryIN", 0 0, L_0x7f69dc15a0f0; 1 drivers +v0x5648985caa20_0 .net "CarryOUT", 0 0, L_0x5648985f34d0; 1 drivers +v0x5648985cab10_0 .net "Y", 3 0, L_0x5648985f3ab0; 1 drivers +v0x5648985cabd0_0 .net *"_ivl_39", 0 0, L_0x5648985f3bc0; 1 drivers +v0x5648985cacb0_0 .net "overflow", 0 0, L_0x5648985f3b50; alias, 1 drivers +L_0x5648985f1ee0 .part L_0x5648985f1050, 0, 1; +L_0x5648985f2010 .part L_0x5648985f3ce0, 0, 1; +L_0x5648985f24a0 .part L_0x5648985f1050, 1, 1; +L_0x5648985f2660 .part L_0x5648985f3ce0, 1, 1; +L_0x5648985f2790 .part L_0x5648985f3000, 0, 1; +L_0x5648985f2c20 .part L_0x5648985f1050, 2, 1; +L_0x5648985f2d50 .part L_0x5648985f3ce0, 2, 1; +L_0x5648985f2e80 .part L_0x5648985f3000, 1, 1; +L_0x5648985f3000 .concat8 [ 1 1 1 0], L_0x5648985f1e70, L_0x5648985f2430, L_0x5648985f2bb0; +L_0x5648985f3590 .part L_0x5648985f1050, 3, 1; +L_0x5648985f36c0 .part L_0x5648985f3ce0, 3, 1; +L_0x5648985f3880 .part L_0x5648985f3000, 2, 1; +L_0x5648985f3ab0 .concat8 [ 1 1 1 1], L_0x5648985f1d70, L_0x5648985f2370, L_0x5648985f2af0, L_0x5648985f3410; +L_0x5648985f3bc0 .part L_0x5648985f3000, 2, 1; +S_0x5648985c5010 .scope module, "f0" "fulladder" 6 11, 7 1 0, S_0x5648985c4d90; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985f1e70 .functor OR 1, L_0x5648985f1a50, L_0x5648985f1c20, C4<0>, C4<0>; +v0x5648985c5f40_0 .net "A", 0 0, L_0x5648985f1ee0; 1 drivers +v0x5648985c6000_0 .net "B", 0 0, L_0x5648985f2010; 1 drivers +v0x5648985c60d0_0 .net "Carry", 0 0, L_0x7f69dc15a0f0; alias, 1 drivers +v0x5648985c61d0_0 .net "CarryO", 0 0, L_0x5648985f1e70; 1 drivers +v0x5648985c6270_0 .net "Sum", 0 0, L_0x5648985f1d70; 1 drivers +v0x5648985c6360_0 .net "and1", 0 0, L_0x5648985f1a50; 1 drivers +v0x5648985c6430_0 .net "and2", 0 0, L_0x5648985f1c20; 1 drivers +v0x5648985c6500_0 .net "xor1", 0 0, L_0x5648985f1bb0; 1 drivers +S_0x5648985c52a0 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c5010; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f1a50 .functor AND 1, L_0x5648985f1ee0, L_0x5648985f2010, C4<1>, C4<1>; +L_0x5648985f1bb0 .functor XOR 1, L_0x5648985f1ee0, L_0x5648985f2010, C4<0>, C4<0>; +v0x5648985c5540_0 .net "A", 0 0, L_0x5648985f1ee0; alias, 1 drivers +v0x5648985c5620_0 .net "B", 0 0, L_0x5648985f2010; alias, 1 drivers +v0x5648985c56e0_0 .net "Carry", 0 0, L_0x5648985f1a50; alias, 1 drivers +v0x5648985c57b0_0 .net "Sum", 0 0, L_0x5648985f1bb0; alias, 1 drivers +S_0x5648985c5920 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c5010; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f1c20 .functor AND 1, L_0x5648985f1bb0, L_0x7f69dc15a0f0, C4<1>, C4<1>; +L_0x5648985f1d70 .functor XOR 1, L_0x5648985f1bb0, L_0x7f69dc15a0f0, C4<0>, C4<0>; +v0x5648985c5b90_0 .net "A", 0 0, L_0x5648985f1bb0; alias, 1 drivers +v0x5648985c5c60_0 .net "B", 0 0, L_0x7f69dc15a0f0; alias, 1 drivers +v0x5648985c5d00_0 .net "Carry", 0 0, L_0x5648985f1c20; alias, 1 drivers +v0x5648985c5dd0_0 .net "Sum", 0 0, L_0x5648985f1d70; alias, 1 drivers +S_0x5648985c65f0 .scope module, "f1" "fulladder" 6 12, 7 1 0, S_0x5648985c4d90; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985f2430 .functor OR 1, L_0x5648985f2140, L_0x5648985f2220, C4<0>, C4<0>; +v0x5648985c74d0_0 .net "A", 0 0, L_0x5648985f24a0; 1 drivers +v0x5648985c7590_0 .net "B", 0 0, L_0x5648985f2660; 1 drivers +v0x5648985c7660_0 .net "Carry", 0 0, L_0x5648985f2790; 1 drivers +v0x5648985c7760_0 .net "CarryO", 0 0, L_0x5648985f2430; 1 drivers +v0x5648985c7800_0 .net "Sum", 0 0, L_0x5648985f2370; 1 drivers +v0x5648985c78f0_0 .net "and1", 0 0, L_0x5648985f2140; 1 drivers +v0x5648985c79c0_0 .net "and2", 0 0, L_0x5648985f2220; 1 drivers +v0x5648985c7a90_0 .net "xor1", 0 0, L_0x5648985f21b0; 1 drivers +S_0x5648985c6850 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c65f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f2140 .functor AND 1, L_0x5648985f24a0, L_0x5648985f2660, C4<1>, C4<1>; +L_0x5648985f21b0 .functor XOR 1, L_0x5648985f24a0, L_0x5648985f2660, C4<0>, C4<0>; +v0x5648985c6ad0_0 .net "A", 0 0, L_0x5648985f24a0; alias, 1 drivers +v0x5648985c6bb0_0 .net "B", 0 0, L_0x5648985f2660; alias, 1 drivers +v0x5648985c6c70_0 .net "Carry", 0 0, L_0x5648985f2140; alias, 1 drivers +v0x5648985c6d40_0 .net "Sum", 0 0, L_0x5648985f21b0; alias, 1 drivers +S_0x5648985c6eb0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c65f0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f2220 .functor AND 1, L_0x5648985f21b0, L_0x5648985f2790, C4<1>, C4<1>; +L_0x5648985f2370 .functor XOR 1, L_0x5648985f21b0, L_0x5648985f2790, C4<0>, C4<0>; +v0x5648985c7120_0 .net "A", 0 0, L_0x5648985f21b0; alias, 1 drivers +v0x5648985c71f0_0 .net "B", 0 0, L_0x5648985f2790; alias, 1 drivers +v0x5648985c7290_0 .net "Carry", 0 0, L_0x5648985f2220; alias, 1 drivers +v0x5648985c7360_0 .net "Sum", 0 0, L_0x5648985f2370; alias, 1 drivers +S_0x5648985c7b80 .scope module, "f2" "fulladder" 6 13, 7 1 0, S_0x5648985c4d90; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985f2bb0 .functor OR 1, L_0x5648985f28c0, L_0x5648985f29a0, C4<0>, C4<0>; +v0x5648985c8a70_0 .net "A", 0 0, L_0x5648985f2c20; 1 drivers +v0x5648985c8b30_0 .net "B", 0 0, L_0x5648985f2d50; 1 drivers +v0x5648985c8c00_0 .net "Carry", 0 0, L_0x5648985f2e80; 1 drivers +v0x5648985c8d00_0 .net "CarryO", 0 0, L_0x5648985f2bb0; 1 drivers +v0x5648985c8da0_0 .net "Sum", 0 0, L_0x5648985f2af0; 1 drivers +v0x5648985c8e90_0 .net "and1", 0 0, L_0x5648985f28c0; 1 drivers +v0x5648985c8f60_0 .net "and2", 0 0, L_0x5648985f29a0; 1 drivers +v0x5648985c9030_0 .net "xor1", 0 0, L_0x5648985f2930; 1 drivers +S_0x5648985c7e10 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c7b80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f28c0 .functor AND 1, L_0x5648985f2c20, L_0x5648985f2d50, C4<1>, C4<1>; +L_0x5648985f2930 .functor XOR 1, L_0x5648985f2c20, L_0x5648985f2d50, C4<0>, C4<0>; +v0x5648985c8090_0 .net "A", 0 0, L_0x5648985f2c20; alias, 1 drivers +v0x5648985c8150_0 .net "B", 0 0, L_0x5648985f2d50; alias, 1 drivers +v0x5648985c8210_0 .net "Carry", 0 0, L_0x5648985f28c0; alias, 1 drivers +v0x5648985c82e0_0 .net "Sum", 0 0, L_0x5648985f2930; alias, 1 drivers +S_0x5648985c8450 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c7b80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f29a0 .functor AND 1, L_0x5648985f2930, L_0x5648985f2e80, C4<1>, C4<1>; +L_0x5648985f2af0 .functor XOR 1, L_0x5648985f2930, L_0x5648985f2e80, C4<0>, C4<0>; +v0x5648985c86c0_0 .net "A", 0 0, L_0x5648985f2930; alias, 1 drivers +v0x5648985c8790_0 .net "B", 0 0, L_0x5648985f2e80; alias, 1 drivers +v0x5648985c8830_0 .net "Carry", 0 0, L_0x5648985f29a0; alias, 1 drivers +v0x5648985c8900_0 .net "Sum", 0 0, L_0x5648985f2af0; alias, 1 drivers +S_0x5648985c9120 .scope module, "f3" "fulladder" 6 14, 7 1 0, S_0x5648985c4d90; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x5648985f34d0 .functor OR 1, L_0x5648985f30f0, L_0x5648985f32c0, C4<0>, C4<0>; +v0x5648985ca000_0 .net "A", 0 0, L_0x5648985f3590; 1 drivers +v0x5648985ca0c0_0 .net "B", 0 0, L_0x5648985f36c0; 1 drivers +v0x5648985ca190_0 .net "Carry", 0 0, L_0x5648985f3880; 1 drivers +v0x5648985ca290_0 .net "CarryO", 0 0, L_0x5648985f34d0; alias, 1 drivers +v0x5648985ca330_0 .net "Sum", 0 0, L_0x5648985f3410; 1 drivers +v0x5648985ca420_0 .net "and1", 0 0, L_0x5648985f30f0; 1 drivers +v0x5648985ca4f0_0 .net "and2", 0 0, L_0x5648985f32c0; 1 drivers +v0x5648985ca5c0_0 .net "xor1", 0 0, L_0x5648985f3250; 1 drivers +S_0x5648985c9380 .scope module, "h1" "halfadder" 7 8, 8 1 0, S_0x5648985c9120; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f30f0 .functor AND 1, L_0x5648985f3590, L_0x5648985f36c0, C4<1>, C4<1>; +L_0x5648985f3250 .functor XOR 1, L_0x5648985f3590, L_0x5648985f36c0, C4<0>, C4<0>; +v0x5648985c9600_0 .net "A", 0 0, L_0x5648985f3590; alias, 1 drivers +v0x5648985c96e0_0 .net "B", 0 0, L_0x5648985f36c0; alias, 1 drivers +v0x5648985c97a0_0 .net "Carry", 0 0, L_0x5648985f30f0; alias, 1 drivers +v0x5648985c9870_0 .net "Sum", 0 0, L_0x5648985f3250; alias, 1 drivers +S_0x5648985c99e0 .scope module, "h2" "halfadder" 7 9, 8 1 0, S_0x5648985c9120; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x5648985f32c0 .functor AND 1, L_0x5648985f3250, L_0x5648985f3880, C4<1>, C4<1>; +L_0x5648985f3410 .functor XOR 1, L_0x5648985f3250, L_0x5648985f3880, C4<0>, C4<0>; +v0x5648985c9c50_0 .net "A", 0 0, L_0x5648985f3250; alias, 1 drivers +v0x5648985c9d20_0 .net "B", 0 0, L_0x5648985f3880; alias, 1 drivers +v0x5648985c9dc0_0 .net "Carry", 0 0, L_0x5648985f32c0; alias, 1 drivers +v0x5648985c9e90_0 .net "Sum", 0 0, L_0x5648985f3410; alias, 1 drivers +S_0x5648985cfc60 .scope module, "opCd" "opCode" 4 18, 16 1 0, S_0x56489858fba0; + .timescale 0 0; + .port_info 0 /INPUT 3 "A"; + .port_info 1 /OUTPUT 8 "opCode"; +L_0x5648985db4f0 .functor NOT 1, L_0x5648985db580, C4<0>, C4<0>, C4<0>; +L_0x5648985db670 .functor NOT 1, L_0x5648985db700, C4<0>, C4<0>, C4<0>; +L_0x5648985db7f0 .functor NOT 1, L_0x5648985db860, C4<0>, C4<0>, C4<0>; +L_0x5648985db950 .functor AND 1, L_0x5648985dba50, L_0x5648985dbc80, C4<1>, C4<1>; +L_0x5648985dbd70 .functor AND 1, L_0x5648985db4f0, L_0x5648985dbe30, C4<1>, C4<1>; +L_0x5648985dbf60 .functor AND 1, L_0x5648985dc060, L_0x5648985db670, C4<1>, C4<1>; +L_0x5648985dc150 .functor AND 1, L_0x5648985db4f0, L_0x5648985db670, C4<1>, C4<1>; +L_0x5648985dc1c0 .functor AND 1, L_0x5648985dc150, L_0x5648985db7f0, C4<1>, C4<1>; +L_0x5648985dc320 .functor AND 1, L_0x5648985dc150, L_0x5648985dc390, C4<1>, C4<1>; +L_0x5648985dc4d0 .functor AND 1, L_0x5648985dbd70, L_0x5648985db7f0, C4<1>, C4<1>; +L_0x5648985dc5f0 .functor AND 1, L_0x5648985dbd70, L_0x5648985dc660, C4<1>, C4<1>; +L_0x5648985dc700 .functor AND 1, L_0x5648985dbf60, L_0x5648985db7f0, C4<1>, C4<1>; +L_0x5648985dc830 .functor AND 1, L_0x5648985dbf60, L_0x5648985dc8a0, C4<1>, C4<1>; +L_0x5648985dc9a0 .functor AND 1, L_0x5648985db950, L_0x5648985db7f0, C4<1>, C4<1>; +L_0x5648985dc7c0 .functor AND 1, L_0x5648985db950, L_0x5648985dce50, C4<1>, C4<1>; +v0x5648985cfdf0_0 .net "A", 2 0, v0x5648985db320_0; alias, 1 drivers +v0x5648985cfef0_0 .net *"_ivl_1", 0 0, L_0x5648985db580; 1 drivers +v0x5648985cffd0_0 .net *"_ivl_11", 0 0, L_0x5648985dbe30; 1 drivers +v0x5648985d0090_0 .net *"_ivl_13", 0 0, L_0x5648985dc060; 1 drivers +v0x5648985d0170_0 .net *"_ivl_14", 0 0, L_0x5648985dc1c0; 1 drivers +v0x5648985d02a0_0 .net *"_ivl_16", 0 0, L_0x5648985dc320; 1 drivers +v0x5648985d0380_0 .net *"_ivl_19", 0 0, L_0x5648985dc390; 1 drivers +v0x5648985d0460_0 .net *"_ivl_20", 0 0, L_0x5648985dc4d0; 1 drivers +v0x5648985d0540_0 .net *"_ivl_22", 0 0, L_0x5648985dc5f0; 1 drivers +v0x5648985d0620_0 .net *"_ivl_25", 0 0, L_0x5648985dc660; 1 drivers +v0x5648985d0700_0 .net *"_ivl_26", 0 0, L_0x5648985dc700; 1 drivers +v0x5648985d07e0_0 .net *"_ivl_28", 0 0, L_0x5648985dc830; 1 drivers +v0x5648985d08c0_0 .net *"_ivl_3", 0 0, L_0x5648985db700; 1 drivers +v0x5648985d09a0_0 .net *"_ivl_31", 0 0, L_0x5648985dc8a0; 1 drivers +v0x5648985d0a80_0 .net *"_ivl_32", 0 0, L_0x5648985dc9a0; 1 drivers +v0x5648985d0b60_0 .net *"_ivl_34", 0 0, L_0x5648985dc7c0; 1 drivers +v0x5648985d0c40_0 .net *"_ivl_38", 0 0, L_0x5648985dce50; 1 drivers +v0x5648985d0d20_0 .net *"_ivl_5", 0 0, L_0x5648985db860; 1 drivers +v0x5648985d0e00_0 .net *"_ivl_7", 0 0, L_0x5648985dba50; 1 drivers +v0x5648985d0ee0_0 .net *"_ivl_9", 0 0, L_0x5648985dbc80; 1 drivers +v0x5648985d0fc0_0 .net "and1", 0 0, L_0x5648985db950; 1 drivers +v0x5648985d1080_0 .net "and2", 0 0, L_0x5648985dbd70; 1 drivers +v0x5648985d1140_0 .net "and3", 0 0, L_0x5648985dbf60; 1 drivers +v0x5648985d1200_0 .net "and4", 0 0, L_0x5648985dc150; 1 drivers +v0x5648985d12c0_0 .net "notA", 0 0, L_0x5648985db4f0; 1 drivers +v0x5648985d1380_0 .net "notB", 0 0, L_0x5648985db670; 1 drivers +v0x5648985d1440_0 .net "notC", 0 0, L_0x5648985db7f0; 1 drivers +v0x5648985d1500_0 .net "opCode", 7 0, L_0x5648985dca90; alias, 1 drivers +L_0x5648985db580 .part v0x5648985db320_0, 2, 1; +L_0x5648985db700 .part v0x5648985db320_0, 1, 1; +L_0x5648985db860 .part v0x5648985db320_0, 0, 1; +L_0x5648985dba50 .part v0x5648985db320_0, 2, 1; +L_0x5648985dbc80 .part v0x5648985db320_0, 1, 1; +L_0x5648985dbe30 .part v0x5648985db320_0, 1, 1; +L_0x5648985dc060 .part v0x5648985db320_0, 2, 1; +L_0x5648985dc390 .part v0x5648985db320_0, 0, 1; +L_0x5648985dc660 .part v0x5648985db320_0, 0, 1; +L_0x5648985dc8a0 .part v0x5648985db320_0, 0, 1; +LS_0x5648985dca90_0_0 .concat8 [ 1 1 1 1], L_0x5648985dc1c0, L_0x5648985dc320, L_0x5648985dc4d0, L_0x5648985dc5f0; +LS_0x5648985dca90_0_4 .concat8 [ 1 1 1 1], L_0x5648985dc700, L_0x5648985dc830, L_0x5648985dc9a0, L_0x5648985dc7c0; +L_0x5648985dca90 .concat8 [ 4 4 0 0], LS_0x5648985dca90_0_0, LS_0x5648985dca90_0_4; +L_0x5648985dce50 .part v0x5648985db320_0, 0, 1; +S_0x5648985d9f00 .scope module, "s1" "selector" 3 11, 17 1 0, S_0x5648985925d0; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 3 "opCodeA"; + .port_info 3 /INPUT 2 "select"; + .port_info 4 /INPUT 12 "ALUY"; + .port_info 5 /OUTPUT 12 "Y"; +v0x5648985da1c0_0 .net "A", 3 0, v0x5648985daf80_0; alias, 1 drivers +v0x5648985da2a0_0 .net "ALUY", 11 0, L_0x5648986065b0; alias, 1 drivers +v0x5648985da3b0_0 .net "B", 3 0, v0x5648985db060_0; alias, 1 drivers +v0x5648985da450_0 .var "Y", 11 0; +v0x5648985da530_0 .net "opCodeA", 2 0, v0x5648985db320_0; alias, 1 drivers +v0x5648985da690_0 .net "select", 1 0, v0x5648985db3e0_0; alias, 1 drivers +E_0x5648985da150/0 .event edge, v0x5648985da690_0, v0x5648985a2650_0, v0x5648985a2730_0, v0x5648985cfdf0_0; +E_0x5648985da150/1 .event edge, v0x5648985b3270_0; +E_0x5648985da150 .event/or E_0x5648985da150/0, E_0x5648985da150/1; + .scope S_0x5648985d9f00; +T_0 ; + %wait E_0x5648985da150; + %load/vec4 v0x5648985da690_0; + %dup/vec4; + %pushi/vec4 0, 0, 2; + %cmp/u; + %jmp/1 T_0.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 2; + %cmp/u; + %jmp/1 T_0.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 2; + %cmp/u; + %jmp/1 T_0.2, 6; + %dup/vec4; + %pushi/vec4 3, 0, 2; + %cmp/u; + %jmp/1 T_0.3, 6; + %load/vec4 v0x5648985da2a0_0; + %store/vec4 v0x5648985da450_0, 0, 12; + %jmp T_0.5; +T_0.0 ; + %pushi/vec4 0, 0, 8; + %load/vec4 v0x5648985da1c0_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x5648985da450_0, 0, 12; + %jmp T_0.5; +T_0.1 ; + %pushi/vec4 0, 0, 8; + %load/vec4 v0x5648985da3b0_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x5648985da450_0, 0, 12; + %jmp T_0.5; +T_0.2 ; + %pushi/vec4 0, 0, 9; + %load/vec4 v0x5648985da530_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x5648985da450_0, 0, 12; + %jmp T_0.5; +T_0.3 ; + %load/vec4 v0x5648985da2a0_0; + %store/vec4 v0x5648985da450_0, 0, 12; + %jmp T_0.5; +T_0.5 ; + %pop/vec4 1; + %jmp T_0; + .thread T_0, $push; + .scope S_0x5648984ee520; +T_1 ; + %vpi_call 2 17 "$dumpfile", "bttn.vcd" {0 0 0}; + %vpi_call 2 18 "$dumpvars" {0 0 0}; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x5648985daf80_0, 0, 4; + %pushi/vec4 6, 0, 4; + %store/vec4 v0x5648985db060_0, 0, 4; + %pushi/vec4 0, 0, 3; + %store/vec4 v0x5648985db320_0, 0, 3; + %pushi/vec4 1, 0, 2; + %store/vec4 v0x5648985db3e0_0, 0, 2; + %delay 5, 0; + %vpi_call 2 20 "$finish" {0 0 0}; + %end; + .thread T_1; +# The file index is used to find the file name in the following table. +:file_names 18; + "N/A"; + ""; + "bttnTB.v"; + "bttn.v"; + "ALU.v"; + "arithmeticUnit.v"; + "addition.v"; + "fulladder.v"; + "halfadder.v"; + "subtraction.v"; + "fullsubtraction.v"; + "halfsubtraction.v"; + "BinaryToBCD.v"; + "dabble.v"; + "logicUnit.v"; + "multiplier.v"; + "opCode.v"; + "selector.v"; diff --git a/gowin/bttn/src/bttn.cst b/gowin/bttn/src/bttn.cst new file mode 100644 index 0000000..0abaaba --- /dev/null +++ b/gowin/bttn/src/bttn.cst @@ -0,0 +1,59 @@ +//Copyright (C)2014-2024 Gowin Semiconductor Corporation. +//All rights reserved. +//File Title: Physical Constraints file +//Tool Version: V1.9.9.03 Education (64-bit) +//Part Number: GW2A-LV18PG256C8/I7 +//Device: GW2A-18 +//Device Version: C +//Created Time: Sat 01 18 21:56:09 2025 + +IO_LOC "Y[11]" B12; +IO_PORT "Y[11]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[10]" B13; +IO_PORT "Y[10]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[9]" B14; +IO_PORT "Y[9]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[8]" D14; +IO_PORT "Y[8]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[7]" J14; +IO_PORT "Y[7]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[6]" M14; +IO_PORT "Y[6]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[5]" T12; +IO_PORT "Y[5]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[4]" T11; +IO_PORT "Y[4]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[3]" P9; +IO_PORT "Y[3]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[2]" P8; +IO_PORT "Y[2]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[1]" T7; +IO_PORT "Y[1]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "Y[0]" P6; +IO_PORT "Y[0]" IO_TYPE=LVCMOS18 PULL_MODE=NONE DRIVE=8 BANK_VCCIO=1.8; +IO_LOC "select[1]" A14; +IO_PORT "select[1]" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8; +IO_LOC "select[0]" A15; +IO_PORT "select[0]" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8; +IO_LOC "opCodeA[2]" E8; +IO_PORT "opCodeA[2]" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8; +IO_LOC "opCodeA[1]" T4; +IO_PORT "opCodeA[1]" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8; +IO_LOC "opCodeA[0]" T5; +IO_PORT "opCodeA[0]" IO_TYPE=LVCMOS18 PULL_MODE=UP BANK_VCCIO=1.8; +IO_LOC "B[3]" N8; +IO_PORT "B[3]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "B[2]" N7; +IO_PORT "B[2]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "B[1]" D11; +IO_PORT "B[1]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "B[0]" B11; +IO_PORT "B[0]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "A[3]" L9; +IO_PORT "A[3]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "A[2]" E15; +IO_PORT "A[2]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "A[1]" N6; +IO_PORT "A[1]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; +IO_LOC "A[0]" A11; +IO_PORT "A[0]" IO_TYPE=LVCMOS18 PULL_MODE=NONE BANK_VCCIO=1.8; diff --git a/gowin/bttn/src/bttn.v b/gowin/bttn/src/bttn.v new file mode 100644 index 0000000..cda5e7f --- /dev/null +++ b/gowin/bttn/src/bttn.v @@ -0,0 +1,13 @@ +module bttn ( + input [3:0] A, B, + input [2:0] opCodeA, + input [1:0] select, + output [11:0] Y +); + +wire wire1, wire2; +wire [11:0] selectY; +ALU a1(.A(A), .B(B), .opCodeA(opCodeA), .CarryIN(1'b0), .bcd(selectY), .CarryOUT(wire1), .overflow(wire2)); +selector s1(.A(A), .B(B), .opCodeA(opCodeA), .select(select), .ALUY(selectY), .Y(Y)); + +endmodule diff --git a/gowin/bttn/src/bttn.vcd b/gowin/bttn/src/bttn.vcd new file mode 100644 index 0000000..483d8b4 --- /dev/null +++ b/gowin/bttn/src/bttn.vcd @@ -0,0 +1,1103 @@ +$date + Sat Jan 18 22:18:21 2025 +$end +$version + Icarus Verilog +$end +$timescale + 1s +$end +$scope module bttnTB $end +$var wire 12 ! Y [11:0] $end +$var reg 4 " A [3:0] $end +$var reg 4 # B [3:0] $end +$var reg 3 $ opCodeA [2:0] $end +$var reg 2 % select [1:0] $end +$scope module uut $end +$var wire 4 & A [3:0] $end +$var wire 4 ' B [3:0] $end +$var wire 3 ( opCodeA [2:0] $end +$var wire 2 ) select [1:0] $end +$var wire 1 * wire2 $end +$var wire 1 + wire1 $end +$var wire 12 , selectY [11:0] $end +$var wire 12 - Y [11:0] $end +$scope module a1 $end +$var wire 4 . A [3:0] $end +$var wire 4 / B [3:0] $end +$var wire 1 0 CarryIN $end +$var wire 3 1 opCodeA [2:0] $end +$var wire 4 2 wireY [3:0] $end +$var wire 8 3 wireM [7:0] $end +$var wire 4 4 wireLA [3:0] $end +$var wire 4 5 sub_Y [3:0] $end +$var wire 4 6 resultX [3:0] $end +$var wire 4 7 resultO [3:0] $end +$var wire 4 8 resultA [3:0] $end +$var wire 1 * overflow $end +$var wire 8 9 opwireM [7:0] $end +$var wire 8 : opCode8 [7:0] $end +$var wire 4 ; lUOutput2 [3:0] $end +$var wire 4 < lUOutput1 [3:0] $end +$var wire 12 = bcd [11:0] $end +$var wire 4 > add_Y [3:0] $end +$var wire 4 ? aUtemp2 [3:0] $end +$var wire 4 @ aUtemp1 [3:0] $end +$var wire 8 A Y [7:0] $end +$var wire 1 + CarryOUT $end +$scope module aU $end +$var wire 4 B A [3:0] $end +$var wire 4 C B [3:0] $end +$var wire 1 0 CarryIN $end +$var wire 1 + CarryOUT $end +$var wire 2 D opCode [1:0] $end +$var wire 1 * overflow $end +$var wire 1 E tempCAdd $end +$var wire 1 F tempCSub $end +$var wire 1 G tempoverflow $end +$var wire 4 H sub_Y [3:0] $end +$var wire 4 I subY [3:0] $end +$var wire 4 J add_Y [3:0] $end +$var wire 4 K addY [3:0] $end +$var wire 1 L CarryOUTSUB $end +$var wire 1 M CarryOUTADD $end +$scope module a1 $end +$var wire 4 N A [3:0] $end +$var wire 4 O B [3:0] $end +$var wire 1 0 CarryIN $end +$var wire 1 G overflow $end +$var wire 4 P Y [3:0] $end +$var wire 1 M CarryOUT $end +$var wire 3 Q Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 R A $end +$var wire 1 S B $end +$var wire 1 0 Carry $end +$var wire 1 T CarryO $end +$var wire 1 U xor1 $end +$var wire 1 V and2 $end +$var wire 1 W and1 $end +$var wire 1 X Sum $end +$scope module h1 $end +$var wire 1 R A $end +$var wire 1 S B $end +$var wire 1 W Carry $end +$var wire 1 U Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 U A $end +$var wire 1 0 B $end +$var wire 1 V Carry $end +$var wire 1 X Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 Y A $end +$var wire 1 Z B $end +$var wire 1 [ Carry $end +$var wire 1 \ CarryO $end +$var wire 1 ] xor1 $end +$var wire 1 ^ and2 $end +$var wire 1 _ and1 $end +$var wire 1 ` Sum $end +$scope module h1 $end +$var wire 1 Y A $end +$var wire 1 Z B $end +$var wire 1 _ Carry $end +$var wire 1 ] Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 ] A $end +$var wire 1 [ B $end +$var wire 1 ^ Carry $end +$var wire 1 ` Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 a A $end +$var wire 1 b B $end +$var wire 1 c Carry $end +$var wire 1 d CarryO $end +$var wire 1 e xor1 $end +$var wire 1 f and2 $end +$var wire 1 g and1 $end +$var wire 1 h Sum $end +$scope module h1 $end +$var wire 1 a A $end +$var wire 1 b B $end +$var wire 1 g Carry $end +$var wire 1 e Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 e A $end +$var wire 1 c B $end +$var wire 1 f Carry $end +$var wire 1 h Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 i A $end +$var wire 1 j B $end +$var wire 1 k Carry $end +$var wire 1 M CarryO $end +$var wire 1 l xor1 $end +$var wire 1 m and2 $end +$var wire 1 n and1 $end +$var wire 1 o Sum $end +$scope module h1 $end +$var wire 1 i A $end +$var wire 1 j B $end +$var wire 1 n Carry $end +$var wire 1 l Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 l A $end +$var wire 1 k B $end +$var wire 1 m Carry $end +$var wire 1 o Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module s1 $end +$var wire 4 p A [3:0] $end +$var wire 4 q B [3:0] $end +$var wire 1 0 BorrowIN $end +$var wire 4 r tempB [3:0] $end +$var wire 4 s Y [3:0] $end +$var wire 1 L BorrowOUT $end +$scope module f0 $end +$var wire 1 t A $end +$var wire 1 u B $end +$var wire 1 0 BorrowIN $end +$var wire 1 v BorrowOut $end +$var wire 1 w tempD $end +$var wire 1 x tempB2 $end +$var wire 1 y tempB1 $end +$var wire 1 z Difference $end +$scope module hf1 $end +$var wire 1 t A $end +$var wire 1 u B $end +$var wire 1 y Borrow $end +$var wire 1 w Difference $end +$var wire 1 { notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 w A $end +$var wire 1 0 B $end +$var wire 1 x Borrow $end +$var wire 1 z Difference $end +$var wire 1 | notA $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 } A $end +$var wire 1 ~ B $end +$var wire 1 !" BorrowIN $end +$var wire 1 "" BorrowOut $end +$var wire 1 #" tempD $end +$var wire 1 $" tempB2 $end +$var wire 1 %" tempB1 $end +$var wire 1 &" Difference $end +$scope module hf1 $end +$var wire 1 } A $end +$var wire 1 ~ B $end +$var wire 1 %" Borrow $end +$var wire 1 #" Difference $end +$var wire 1 '" notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 #" A $end +$var wire 1 !" B $end +$var wire 1 $" Borrow $end +$var wire 1 &" Difference $end +$var wire 1 (" notA $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 )" A $end +$var wire 1 *" B $end +$var wire 1 +" BorrowIN $end +$var wire 1 ," BorrowOut $end +$var wire 1 -" tempD $end +$var wire 1 ." tempB2 $end +$var wire 1 /" tempB1 $end +$var wire 1 0" Difference $end +$scope module hf1 $end +$var wire 1 )" A $end +$var wire 1 *" B $end +$var wire 1 /" Borrow $end +$var wire 1 -" Difference $end +$var wire 1 1" notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 -" A $end +$var wire 1 +" B $end +$var wire 1 ." Borrow $end +$var wire 1 0" Difference $end +$var wire 1 2" notA $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 3" A $end +$var wire 1 4" B $end +$var wire 1 5" BorrowIN $end +$var wire 1 L BorrowOut $end +$var wire 1 6" tempD $end +$var wire 1 7" tempB2 $end +$var wire 1 8" tempB1 $end +$var wire 1 9" Difference $end +$scope module hf1 $end +$var wire 1 3" A $end +$var wire 1 4" B $end +$var wire 1 8" Borrow $end +$var wire 1 6" Difference $end +$var wire 1 :" notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 6" A $end +$var wire 1 5" B $end +$var wire 1 7" Borrow $end +$var wire 1 9" Difference $end +$var wire 1 ;" notA $end +$upscope $end +$upscope $end +$upscope $end +$upscope $end +$scope module btod1 $end +$var wire 8 <" binary [7:0] $end +$var wire 1 =" empty1 $end +$var wire 1 >" empty2 $end +$var wire 4 ?" dab5 [3:0] $end +$var wire 4 @" dab4 [3:0] $end +$var wire 4 A" dab3 [3:0] $end +$var wire 4 B" dab2 [3:0] $end +$var wire 4 C" dab1 [3:0] $end +$var wire 12 D" bcd [11:0] $end +$scope module d1t $end +$var wire 1 =" A $end +$var wire 1 E" B $end +$var wire 1 F" C $end +$var wire 1 G" D $end +$var wire 1 H" E $end +$var wire 1 I" X $end +$var wire 1 J" Y $end +$var wire 1 K" Z $end +$var wire 1 L" nor1 $end +$var wire 1 M" nor2 $end +$var wire 1 N" nor3 $end +$var wire 1 O" or1 $end +$var wire 1 P" xor1 $end +$var wire 1 Q" xor2 $end +$upscope $end +$scope module d2u $end +$var wire 1 R" A $end +$var wire 1 S" B $end +$var wire 1 T" C $end +$var wire 1 U" D $end +$var wire 1 V" E $end +$var wire 1 W" X $end +$var wire 1 X" Y $end +$var wire 1 Y" Z $end +$var wire 1 Z" nor1 $end +$var wire 1 [" nor2 $end +$var wire 1 \" nor3 $end +$var wire 1 ]" or1 $end +$var wire 1 ^" xor1 $end +$var wire 1 _" xor2 $end +$upscope $end +$scope module d3v $end +$var wire 1 `" A $end +$var wire 1 a" B $end +$var wire 1 b" C $end +$var wire 1 c" D $end +$var wire 1 d" E $end +$var wire 1 e" X $end +$var wire 1 f" Y $end +$var wire 1 g" Z $end +$var wire 1 h" nor1 $end +$var wire 1 i" nor2 $end +$var wire 1 j" nor3 $end +$var wire 1 k" or1 $end +$var wire 1 l" xor1 $end +$var wire 1 m" xor2 $end +$upscope $end +$scope module d4w $end +$var wire 1 >" A $end +$var wire 1 n" B $end +$var wire 1 o" C $end +$var wire 1 p" D $end +$var wire 1 q" E $end +$var wire 1 r" X $end +$var wire 1 s" Y $end +$var wire 1 t" Z $end +$var wire 1 u" nor1 $end +$var wire 1 v" nor2 $end +$var wire 1 w" nor3 $end +$var wire 1 x" or1 $end +$var wire 1 y" xor1 $end +$var wire 1 z" xor2 $end +$upscope $end +$scope module d5x $end +$var wire 1 {" A $end +$var wire 1 |" B $end +$var wire 1 }" C $end +$var wire 1 ~" D $end +$var wire 1 !# E $end +$var wire 1 "# X $end +$var wire 1 ## Y $end +$var wire 1 $# Z $end +$var wire 1 %# nor1 $end +$var wire 1 &# nor2 $end +$var wire 1 '# nor3 $end +$var wire 1 (# or1 $end +$var wire 1 )# xor1 $end +$var wire 1 *# xor2 $end +$upscope $end +$scope module d6y $end +$var wire 1 +# A $end +$var wire 1 ,# B $end +$var wire 1 -# C $end +$var wire 1 .# D $end +$var wire 1 /# E $end +$var wire 1 0# X $end +$var wire 1 1# Y $end +$var wire 1 2# Z $end +$var wire 1 3# nor1 $end +$var wire 1 4# nor2 $end +$var wire 1 5# nor3 $end +$var wire 1 6# or1 $end +$var wire 1 7# xor1 $end +$var wire 1 8# xor2 $end +$upscope $end +$scope module d7z $end +$var wire 1 9# A $end +$var wire 1 :# B $end +$var wire 1 ;# C $end +$var wire 1 <# D $end +$var wire 1 =# E $end +$var wire 1 ># X $end +$var wire 1 ?# Y $end +$var wire 1 @# Z $end +$var wire 1 A# nor1 $end +$var wire 1 B# nor2 $end +$var wire 1 C# nor3 $end +$var wire 1 D# or1 $end +$var wire 1 E# xor1 $end +$var wire 1 F# xor2 $end +$upscope $end +$upscope $end +$scope module lU $end +$var wire 4 G# A [3:0] $end +$var wire 4 H# B [3:0] $end +$var wire 3 I# opCode [2:0] $end +$var wire 4 J# xor1 [3:0] $end +$var wire 4 K# resultX [3:0] $end +$var wire 4 L# resultO [3:0] $end +$var wire 4 M# resultA [3:0] $end +$var wire 4 N# or1 [3:0] $end +$var wire 4 O# and1 [3:0] $end +$upscope $end +$scope module mU $end +$var wire 4 P# A [3:0] $end +$var wire 4 Q# B [3:0] $end +$var wire 1 R# overflow2 $end +$var wire 1 S# overflow1 $end +$var wire 1 T# overflow0 $end +$var wire 4 U# b0 [3:0] $end +$var wire 4 V# a2 [3:0] $end +$var wire 4 W# a1 [3:0] $end +$var wire 4 X# a0 [3:0] $end +$var wire 8 Y# Y [7:0] $end +$var wire 5 Z# S2 [4:0] $end +$var wire 5 [# S1 [4:0] $end +$var wire 5 \# S0 [4:0] $end +$scope module add0 $end +$var wire 4 ]# A [3:0] $end +$var wire 4 ^# B [3:0] $end +$var wire 1 _# CarryIN $end +$var wire 1 T# overflow $end +$var wire 4 `# Y [3:0] $end +$var wire 1 a# CarryOUT $end +$var wire 3 b# Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 c# A $end +$var wire 1 d# B $end +$var wire 1 _# Carry $end +$var wire 1 e# CarryO $end +$var wire 1 f# xor1 $end +$var wire 1 g# and2 $end +$var wire 1 h# and1 $end +$var wire 1 i# Sum $end +$scope module h1 $end +$var wire 1 c# A $end +$var wire 1 d# B $end +$var wire 1 h# Carry $end +$var wire 1 f# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 f# A $end +$var wire 1 _# B $end +$var wire 1 g# Carry $end +$var wire 1 i# Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 j# A $end +$var wire 1 k# B $end +$var wire 1 l# Carry $end +$var wire 1 m# CarryO $end +$var wire 1 n# xor1 $end +$var wire 1 o# and2 $end +$var wire 1 p# and1 $end +$var wire 1 q# Sum $end +$scope module h1 $end +$var wire 1 j# A $end +$var wire 1 k# B $end +$var wire 1 p# Carry $end +$var wire 1 n# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 n# A $end +$var wire 1 l# B $end +$var wire 1 o# Carry $end +$var wire 1 q# Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 r# A $end +$var wire 1 s# B $end +$var wire 1 t# Carry $end +$var wire 1 u# CarryO $end +$var wire 1 v# xor1 $end +$var wire 1 w# and2 $end +$var wire 1 x# and1 $end +$var wire 1 y# Sum $end +$scope module h1 $end +$var wire 1 r# A $end +$var wire 1 s# B $end +$var wire 1 x# Carry $end +$var wire 1 v# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 v# A $end +$var wire 1 t# B $end +$var wire 1 w# Carry $end +$var wire 1 y# Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 z# A $end +$var wire 1 {# B $end +$var wire 1 |# Carry $end +$var wire 1 a# CarryO $end +$var wire 1 }# xor1 $end +$var wire 1 ~# and2 $end +$var wire 1 !$ and1 $end +$var wire 1 "$ Sum $end +$scope module h1 $end +$var wire 1 z# A $end +$var wire 1 {# B $end +$var wire 1 !$ Carry $end +$var wire 1 }# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 }# A $end +$var wire 1 |# B $end +$var wire 1 ~# Carry $end +$var wire 1 "$ Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module add1 $end +$var wire 4 #$ A [3:0] $end +$var wire 4 $$ B [3:0] $end +$var wire 1 %$ CarryIN $end +$var wire 1 S# overflow $end +$var wire 4 &$ Y [3:0] $end +$var wire 1 '$ CarryOUT $end +$var wire 3 ($ Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 )$ A $end +$var wire 1 *$ B $end +$var wire 1 %$ Carry $end +$var wire 1 +$ CarryO $end +$var wire 1 ,$ xor1 $end +$var wire 1 -$ and2 $end +$var wire 1 .$ and1 $end +$var wire 1 /$ Sum $end +$scope module h1 $end +$var wire 1 )$ A $end +$var wire 1 *$ B $end +$var wire 1 .$ Carry $end +$var wire 1 ,$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 ,$ A $end +$var wire 1 %$ B $end +$var wire 1 -$ Carry $end +$var wire 1 /$ Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 0$ A $end +$var wire 1 1$ B $end +$var wire 1 2$ Carry $end +$var wire 1 3$ CarryO $end +$var wire 1 4$ xor1 $end +$var wire 1 5$ and2 $end +$var wire 1 6$ and1 $end +$var wire 1 7$ Sum $end +$scope module h1 $end +$var wire 1 0$ A $end +$var wire 1 1$ B $end +$var wire 1 6$ Carry $end +$var wire 1 4$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 4$ A $end +$var wire 1 2$ B $end +$var wire 1 5$ Carry $end +$var wire 1 7$ Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 8$ A $end +$var wire 1 9$ B $end +$var wire 1 :$ Carry $end +$var wire 1 ;$ CarryO $end +$var wire 1 <$ xor1 $end +$var wire 1 =$ and2 $end +$var wire 1 >$ and1 $end +$var wire 1 ?$ Sum $end +$scope module h1 $end +$var wire 1 8$ A $end +$var wire 1 9$ B $end +$var wire 1 >$ Carry $end +$var wire 1 <$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 <$ A $end +$var wire 1 :$ B $end +$var wire 1 =$ Carry $end +$var wire 1 ?$ Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 @$ A $end +$var wire 1 A$ B $end +$var wire 1 B$ Carry $end +$var wire 1 '$ CarryO $end +$var wire 1 C$ xor1 $end +$var wire 1 D$ and2 $end +$var wire 1 E$ and1 $end +$var wire 1 F$ Sum $end +$scope module h1 $end +$var wire 1 @$ A $end +$var wire 1 A$ B $end +$var wire 1 E$ Carry $end +$var wire 1 C$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 C$ A $end +$var wire 1 B$ B $end +$var wire 1 D$ Carry $end +$var wire 1 F$ Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module add2 $end +$var wire 4 G$ A [3:0] $end +$var wire 4 H$ B [3:0] $end +$var wire 1 I$ CarryIN $end +$var wire 1 R# overflow $end +$var wire 4 J$ Y [3:0] $end +$var wire 1 K$ CarryOUT $end +$var wire 3 L$ Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 M$ A $end +$var wire 1 N$ B $end +$var wire 1 I$ Carry $end +$var wire 1 O$ CarryO $end +$var wire 1 P$ xor1 $end +$var wire 1 Q$ and2 $end +$var wire 1 R$ and1 $end +$var wire 1 S$ Sum $end +$scope module h1 $end +$var wire 1 M$ A $end +$var wire 1 N$ B $end +$var wire 1 R$ Carry $end +$var wire 1 P$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 P$ A $end +$var wire 1 I$ B $end +$var wire 1 Q$ Carry $end +$var wire 1 S$ Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 T$ A $end +$var wire 1 U$ B $end +$var wire 1 V$ Carry $end +$var wire 1 W$ CarryO $end +$var wire 1 X$ xor1 $end +$var wire 1 Y$ and2 $end +$var wire 1 Z$ and1 $end +$var wire 1 [$ Sum $end +$scope module h1 $end +$var wire 1 T$ A $end +$var wire 1 U$ B $end +$var wire 1 Z$ Carry $end +$var wire 1 X$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 X$ A $end +$var wire 1 V$ B $end +$var wire 1 Y$ Carry $end +$var wire 1 [$ Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 \$ A $end +$var wire 1 ]$ B $end +$var wire 1 ^$ Carry $end +$var wire 1 _$ CarryO $end +$var wire 1 `$ xor1 $end +$var wire 1 a$ and2 $end +$var wire 1 b$ and1 $end +$var wire 1 c$ Sum $end +$scope module h1 $end +$var wire 1 \$ A $end +$var wire 1 ]$ B $end +$var wire 1 b$ Carry $end +$var wire 1 `$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 `$ A $end +$var wire 1 ^$ B $end +$var wire 1 a$ Carry $end +$var wire 1 c$ Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 d$ A $end +$var wire 1 e$ B $end +$var wire 1 f$ Carry $end +$var wire 1 K$ CarryO $end +$var wire 1 g$ xor1 $end +$var wire 1 h$ and2 $end +$var wire 1 i$ and1 $end +$var wire 1 j$ Sum $end +$scope module h1 $end +$var wire 1 d$ A $end +$var wire 1 e$ B $end +$var wire 1 i$ Carry $end +$var wire 1 g$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 g$ A $end +$var wire 1 f$ B $end +$var wire 1 h$ Carry $end +$var wire 1 j$ Sum $end +$upscope $end +$upscope $end +$upscope $end +$upscope $end +$scope module opCd $end +$var wire 3 k$ A [2:0] $end +$var wire 1 l$ and1 $end +$var wire 1 m$ and2 $end +$var wire 1 n$ and3 $end +$var wire 1 o$ and4 $end +$var wire 1 p$ notA $end +$var wire 1 q$ notB $end +$var wire 1 r$ notC $end +$var wire 8 s$ opCode [7:0] $end +$upscope $end +$upscope $end +$scope module s1 $end +$var wire 4 t$ A [3:0] $end +$var wire 12 u$ ALUY [11:0] $end +$var wire 4 v$ B [3:0] $end +$var wire 3 w$ opCodeA [2:0] $end +$var wire 2 x$ select [1:0] $end +$var reg 12 y$ Y [11:0] $end +$upscope $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b110 y$ +b1 x$ +b0 w$ +b110 v$ +b111 u$ +b1 t$ +b1 s$ +1r$ +1q$ +1p$ +1o$ +0n$ +0m$ +0l$ +b0 k$ +0j$ +0i$ +0h$ +0g$ +0f$ +0e$ +0d$ +0c$ +0b$ +0a$ +0`$ +0_$ +0^$ +0]$ +0\$ +0[$ +0Z$ +0Y$ +0X$ +0W$ +0V$ +0U$ +0T$ +0S$ +0R$ +0Q$ +0P$ +0O$ +0N$ +0M$ +b0 L$ +0K$ +b0 J$ +0I$ +b0 H$ +b0 G$ +0F$ +0E$ +0D$ +0C$ +0B$ +0A$ +0@$ +0?$ +0>$ +0=$ +0<$ +0;$ +0:$ +09$ +08$ +07$ +06$ +05$ +04$ +03$ +02$ +01$ +00$ +1/$ +0.$ +0-$ +1,$ +0+$ +0*$ +1)$ +b0 ($ +0'$ +b1 &$ +0%$ +b0 $$ +b1 #$ +0"$ +0!$ +0~# +0}# +0|# +0{# +0z# +0y# +0x# +0w# +0v# +0u# +0t# +0s# +0r# +0q# +0p# +0o# +0n# +0m# +0l# +0k# +0j# +1i# +0h# +0g# +1f# +0e# +0d# +1c# +b0 b# +0a# +b1 `# +0_# +b0 ^# +b1 ]# +b1 \# +b1 [# +b0 Z# +b110 Y# +b1 X# +b1 W# +b0 V# +b0 U# +0T# +0S# +0R# +b110 Q# +b1 P# +b0 O# +b111 N# +b0 M# +b0 L# +b0 K# +b111 J# +b0 I# +b110 H# +b1 G# +1F# +1E# +1D# +0C# +0B# +1A# +1@# +0?# +0># +1=# +1<# +1;# +0:# +09# +08# +07# +16# +05# +14# +13# +02# +01# +00# +0/# +0.# +0-# +0,# +0+# +0*# +1)# +1(# +0'# +0&# +1%# +0$# +0## +0"# +1!# +1~" +0}" +0|" +0{" +0z" +0y" +1x" +0w" +1v" +1u" +0t" +0s" +0r" +0q" +0p" +0o" +0n" +0m" +0l" +1k" +0j" +1i" +1h" +0g" +0f" +0e" +0d" +0c" +0b" +0a" +0`" +0_" +0^" +1]" +0\" +1[" +1Z" +0Y" +0X" +0W" +0V" +0U" +0T" +0S" +0R" +0Q" +0P" +1O" +0N" +1M" +1L" +0K" +0J" +0I" +0H" +0G" +0F" +0E" +b111 D" +b0 C" +b0 B" +b0 A" +b0z @" +b1000 ?" +0>" +0=" +b111 <" +1;" +1:" +19" +08" +17" +06" +15" +04" +03" +02" +11" +00" +1/" +0." +1-" +1," +1+" +1*" +0)" +0(" +1'" +1&" +1%" +0$" +1#" +1"" +0!" +1~ +0} +0| +0{ +1z +0y +0x +1w +0v +0u +1t +b1011 s +bz110 r +b110 q +b1 p +0o +0n +0m +0l +0k +0j +0i +1h +0g +0f +1e +0d +0c +1b +0a +1` +0_ +0^ +1] +0\ +0[ +1Z +0Y +1X +0W +0V +1U +0T +0S +1R +b0 Q +b111 P +b110 O +b1 N +0M +1L +b111 K +b111 J +b1011 I +b0 H +0G +0F +0E +b1 D +b110 C +b1 B +b111 A +b111 @ +b0 ? +b111 > +b111 = +b0 < +b0 ; +b1 : +b110 9 +b0 8 +b0 7 +b0 6 +b0 5 +b111 4 +b0 3 +b111 2 +b0 1 +00 +b110 / +b1 . +b110 - +b111 , +0+ +0* +b1 ) +b0 ( +b110 ' +b1 & +b1 % +b0 $ +b110 # +b1 " +b110 ! +$end +#5 diff --git a/gowin/bttn/src/bttnTB.v b/gowin/bttn/src/bttnTB.v new file mode 100644 index 0000000..8bfadd7 --- /dev/null +++ b/gowin/bttn/src/bttnTB.v @@ -0,0 +1,23 @@ +module bttnTB(); + +reg [3:0] A,B; +reg [2:0] opCodeA; +reg [1:0] select; +wire [11:0] Y; + +bttn uut ( + .A(A), + .B(B), + .opCodeA(opCodeA), + .select(select), + .Y(Y) +); + +initial begin + $dumpfile("bttn.vcd"); + $dumpvars; + A = 4'b0001; B = 4'b0110; opCodeA = 3'b000; select = 2'b01; #5; + $finish; +end + +endmodule diff --git a/gowin/bttn/src/dabble.v b/gowin/bttn/src/dabble.v new file mode 100644 index 0000000..f93d023 --- /dev/null +++ b/gowin/bttn/src/dabble.v @@ -0,0 +1,22 @@ +module dabble ( + input A, B, C, D, + output X, Y, Z, E +); + +wire xor1, nor1, xor2, nor2, nor3, or1; + +xor xo1 (xor1, A, D); +nor no1 (nor1, A, B); +xor xo2 (xor2, A, C); + +nor no2 (nor2, xor1, xor2); + +nor no3 (nor3, nor2, nor1); +buf bu1 (X, nor3); +or o1 (or1, xor1, nor1); + +nor no4 (Y, or1, C); +and an1 (Z, or1, xor2); +xor xo3 (E, nor3, D); + +endmodule diff --git a/gowin/bttn/src/fulladder.v b/gowin/bttn/src/fulladder.v new file mode 100644 index 0000000..d89caff --- /dev/null +++ b/gowin/bttn/src/fulladder.v @@ -0,0 +1,12 @@ +module fulladder ( + input A, B, Carry, + output Sum, CarryO +); + +wire xor1, and1, and2; + +halfadder h1(.A(A), .B(B), .Sum(xor1), .Carry(and1)); +halfadder h2 (.A(xor1), .B(Carry), .Sum(Sum), .Carry(and2)); +or o1 (CarryO, and1, and2); + +endmodule diff --git a/gowin/bttn/src/fullsubtraction.v b/gowin/bttn/src/fullsubtraction.v new file mode 100644 index 0000000..092c565 --- /dev/null +++ b/gowin/bttn/src/fullsubtraction.v @@ -0,0 +1,12 @@ +module fullsubtraction ( + input A, B, BorrowIN, + output Difference, BorrowOut +); + +wire tempD, tempB1, tempB2; + +halfsubtraction hf1(.A(A), .B(B), .Difference(tempD), .Borrow(tempB1)); +halfsubtraction hf2(.A(tempD), .B(BorrowIN), .Difference(Difference), .Borrow(tempB2)); +or o1 (BorrowOut, tempB1, tempB2); + +endmodule diff --git a/gowin/bttn/src/halfadder.v b/gowin/bttn/src/halfadder.v new file mode 100644 index 0000000..273c02f --- /dev/null +++ b/gowin/bttn/src/halfadder.v @@ -0,0 +1,9 @@ +module halfadder ( + input A, B, + output Sum, Carry +); + +and a1 (Carry, A, B); +xor xo1 (Sum, A, B); + +endmodule diff --git a/gowin/bttn/src/halfsubtraction.v b/gowin/bttn/src/halfsubtraction.v new file mode 100644 index 0000000..cde8d5d --- /dev/null +++ b/gowin/bttn/src/halfsubtraction.v @@ -0,0 +1,12 @@ +module halfsubtraction ( + input A, B, + output Difference, Borrow +); + +wire notA; + +xor xo1 (Difference, A, B); +not a1 (notA, A); +and an1 (Borrow, notA, B); + +endmodule diff --git a/gowin/bttn/src/logicUnit.v b/gowin/bttn/src/logicUnit.v new file mode 100644 index 0000000..81819af --- /dev/null +++ b/gowin/bttn/src/logicUnit.v @@ -0,0 +1,39 @@ +module logicUnit ( + input [2:0] opCode, + input [3:0] A, B, + output [3:0] resultA, resultO, resultX +); + +wire [3:0] and1, or1, xor1; + +and a01 (and1[0], A[0], B[0]); +and a02 (and1[1], A[1], B[1]); +and a03 (and1[2], A[2], B[2]); +and a04 (and1[3], A[3], B[3]); + +or o01 (or1[0], A[0], B[0]); +or o02 (or1[1], A[1], B[1]); +or o03 (or1[2], A[2], B[2]); +or o04 (or1[3], A[3], B[3]); + +xor xor01 (xor1[0], A[0], B[0]); +xor xor02 (xor1[1], A[1], B[1]); +xor xor03 (xor1[2], A[2], B[2]); +xor xor04 (xor1[3], A[3], B[3]); + +and a_o1 (resultA[0], opCode[0], and1[0]); +and a_o2 (resultA[1], opCode[0], and1[1]); +and a_o3 (resultA[2], opCode[0], and1[2]); +and a_o4 (resultA[3], opCode[0], and1[3]); + +and o_o1 (resultO[0], opCode[1], or1[0]); +and o_o2 (resultO[1], opCode[1], or1[1]); +and o_o3 (resultO[2], opCode[1], or1[2]); +and o_o4 (resultO[3], opCode[1], or1[3]); + +and x_o1 (resultX[0], opCode[2], xor1[0]); +and x_o2 (resultX[1], opCode[2], xor1[1]); +and x_o3 (resultX[2], opCode[2], xor1[2]); +and x_o4 (resultX[3], opCode[2], xor1[3]); + +endmodule diff --git a/gowin/bttn/src/multiplier.v b/gowin/bttn/src/multiplier.v new file mode 100644 index 0000000..2c5ab0b --- /dev/null +++ b/gowin/bttn/src/multiplier.v @@ -0,0 +1,76 @@ +module multiplier ( + input [3:0] A, B, + output [7:0] Y +); + +wire [3:0] b0, a0, a1, a2; +wire [4:0] S0, S1, S2; +wire carry0, carry1, carry2; +wire overflow0, overflow1, overflow2; + +// Partial product generation +and (Y[0], A[0], B[0]); // LSB of the result + +// Generate partial products for B[0] and B[1] +and ab00 (b0[0], A[1], B[0]); +and ab01 (b0[1], A[2], B[0]); +and ab02 (b0[2], A[3], B[0]); +not ab03 (b0[3], 1'b1); // Initialize b0[3] to 0 + +and aa00 (a0[0], A[0], B[1]); +and aa01 (a0[1], A[1], B[1]); +and aa02 (a0[2], A[2], B[1]); +and aa03 (a0[3], A[3], B[1]); + +// First addition +addition add0 ( + .A(a0), + .B(b0), + .CarryIN(1'b0), + .Y(S0[3:0]), + .CarryOUT(S0[4]), + .overflow(overflow0) +); + +// Generate partial products for B[2] +and aa10 (a1[0], A[0], B[2]); +and aa11 (a1[1], A[1], B[2]); +and aa12 (a1[2], A[2], B[2]); +and aa13 (a1[3], A[3], B[2]); + +// Second addition +addition add1 ( + .A(a1), + .B(S0[4:1]), + .CarryIN(1'b0), + .Y(S1[3:0]), + .CarryOUT(S1[4]), + .overflow(overflow1) +); + +// Generate partial products for B[3] +and aa20 (a2[0], A[0], B[3]); +and aa21 (a2[1], A[1], B[3]); +and aa22 (a2[2], A[2], B[3]); +and aa23 (a2[3], A[3], B[3]); + +// Third addition +addition add2 ( + .A(a2), + .B(S1[4:1]), + .CarryIN(1'b0), + .Y(S2[3:0]), + .CarryOUT(S2[4]), + .overflow(overflow2) +); + +// Combine results into the final output Y +or o01 (Y[1], S0[0], 1'b0); +or o02 (Y[2], S1[0], 1'b0); +or o03 (Y[3], S2[0], 1'b0); +or o04 (Y[4], S2[1], 1'b0); +or o05 (Y[5], S2[2], 1'b0); +or o06 (Y[6], S2[3], 1'b0); +or o07 (Y[7], S2[4], 1'b0); + +endmodule diff --git a/gowin/bttn/src/opCode.v b/gowin/bttn/src/opCode.v new file mode 100644 index 0000000..f8e9e03 --- /dev/null +++ b/gowin/bttn/src/opCode.v @@ -0,0 +1,25 @@ +module opCode ( + input [2:0] A, + output [7:0] opCode +); + wire and1, and2, and3, and4, notA, notB, notC; + + not n1(notA, A[2]); + not n2(notB, A[1]); + not n3(notC, A[0]); + + and a01(and1, A[2], A[1]); + and a02(and2, notA, A[1]); + and a03(and3, A[2], notB); + and a04(and4, notA, notB); + + and a1(opCode[0], and4, notC); + and a2(opCode[1], and4, A[0]); + and a3(opCode[2], and2, notC); + and a4(opCode[3], and2, A[0]); + and a5(opCode[4], and3, notC); + and a6(opCode[5], and3, A[0]); + and a7(opCode[6], and1, notC); + and a8(opCode[7], and1, A[0]); + +endmodule diff --git a/gowin/bttn/src/selector.v b/gowin/bttn/src/selector.v new file mode 100644 index 0000000..f48440a --- /dev/null +++ b/gowin/bttn/src/selector.v @@ -0,0 +1,20 @@ +module selector ( + input [3:0] A, + input [3:0] B, + input [2:0] opCodeA, + input [1:0] select, + input [11:0] ALUY, + output reg [11:0] Y +); + +always @(*) begin + case (select) + 2'b00: Y = {8'b00000000, A}; // Zero-extend A to 8 bits + 2'b01: Y = {8'b00000000, B}; // Zero-extend B to 8 bits + 2'b10: Y = {9'b000000000, opCodeA}; // Zero-extend opCodeA to 8 bits + 2'b11: Y = ALUY; // Directly assign ALUY + default: Y = ALUY; // Default case for safety + endcase +end + +endmodule diff --git a/gowin/bttn/src/subtraction.v b/gowin/bttn/src/subtraction.v new file mode 100644 index 0000000..30f33e7 --- /dev/null +++ b/gowin/bttn/src/subtraction.v @@ -0,0 +1,16 @@ +module subtraction ( + input [3:0] A, B, + input BorrowIN, + output [3:0] Y, + output BorrowOUT //Overflow signal'ini yani negatif gonderecek +); + +wire [3:0] tempB; + +// Full Subtraction logic for each bit (borrow-in for each subsequent bit) +fullsubtraction f0 (.A(A[0]), .B(B[0]), .BorrowIN(BorrowIN), .Difference(Y[0]), .BorrowOut(tempB[0])); +fullsubtraction f1 (.A(A[1]), .B(B[1]), .BorrowIN(tempB[0]), .Difference(Y[1]), .BorrowOut(tempB[1])); +fullsubtraction f2 (.A(A[2]), .B(B[2]), .BorrowIN(tempB[1]), .Difference(Y[2]), .BorrowOut(tempB[2])); +fullsubtraction f3 (.A(A[3]), .B(B[3]), .BorrowIN(tempB[2]), .Difference(Y[3]), .BorrowOut(BorrowOUT)); + +endmodule diff --git a/gowin/pmodtest/bttn.v b/gowin/pmodtest/bttn.v new file mode 100644 index 0000000..c9ff024 --- /dev/null +++ b/gowin/pmodtest/bttn.v @@ -0,0 +1,8 @@ +module bttn ( + input [3:0] bttns, + output [3:0] pmod +); + +assign bttns = pmod; + +endmodule diff --git a/spartanTest/ALU b/spartanTest/ALU new file mode 100644 index 0000000..6c34240 --- /dev/null +++ b/spartanTest/ALU @@ -0,0 +1,2109 @@ +#! /usr/bin/vvp +:ivl_version "11.0 (stable)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; +S_0x55e366e13060 .scope module, "ALUtb" "ALUtb" 2 1; + .timescale 0 0; +v0x55e366efdb20_0 .var "A", 3 0; +v0x55e366efdc00_0 .var "B", 3 0; +v0x55e366efdcc0_0 .var "CarryIN", 0 0; +v0x55e366efdd90_0 .net "CarryOUT", 0 0, L_0x55e366f06460; 1 drivers +v0x55e366efde30_0 .net "bcd", 11 0, L_0x55e366f29560; 1 drivers +v0x55e366efdf70_0 .var "opCodeA", 2 0; +v0x55e366efe080_0 .net "overflow", 0 0, L_0x55e366f06570; 1 drivers +S_0x55e366eb6430 .scope module, "uut" "ALU" 2 9, 3 1 0, S_0x55e366e13060; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /INPUT 3 "opCodeA"; + .port_info 4 /OUTPUT 12 "bcd"; + .port_info 5 /OUTPUT 1 "CarryOUT"; + .port_info 6 /OUTPUT 1 "overflow"; +L_0x55e366f184d0 .functor OR 1, L_0x55e366f18540, L_0x55e366f18630, C4<0>, C4<0>; +L_0x55e366f18720 .functor OR 1, L_0x55e366f18790, L_0x55e366f18910, C4<0>, C4<0>; +L_0x55e366f18a40 .functor OR 1, L_0x55e366f18ab0, L_0x55e366f18b50, C4<0>, C4<0>; +L_0x55e366f18e20 .functor OR 1, L_0x55e366f18ee0, L_0x55e366f18fd0, C4<0>, C4<0>; +L_0x55e366f19070 .functor OR 1, L_0x55e366f190e0, L_0x55e366f19290, C4<0>, C4<0>; +L_0x55e366f19380 .functor OR 1, L_0x55e366f193f0, L_0x55e366f19560, C4<0>, C4<0>; +L_0x55e366f19220 .functor OR 1, L_0x55e366f196e0, L_0x55e366f198a0, C4<0>, C4<0>; +L_0x55e366f19b70 .functor OR 1, L_0x55e366f19c80, L_0x55e366f19d70, C4<0>, C4<0>; +L_0x55e366f19f10 .functor AND 1, L_0x55e366f19ad0, L_0x55e366f19fd0, C4<1>, C4<1>; +L_0x55e366f1a180 .functor AND 1, L_0x55e366f1a1f0, L_0x55e366f1a290, C4<1>, C4<1>; +L_0x55e366f1a450 .functor AND 1, L_0x55e366f1a4c0, L_0x55e366f1a560, C4<1>, C4<1>; +L_0x55e366f1a8c0 .functor AND 1, L_0x55e366f1a9f0, L_0x55e366f1abd0, C4<1>, C4<1>; +L_0x55e366f1acc0 .functor AND 1, L_0x55e366f1ad30, L_0x55e366f1af20, C4<1>, C4<1>; +L_0x55e366f1b010 .functor AND 1, L_0x55e366f1b100, L_0x55e366f1b300, C4<1>, C4<1>; +L_0x55e366f1a980 .functor AND 1, L_0x55e366f1b3f0, L_0x55e366f1b5b0, C4<1>, C4<1>; +L_0x55e366f1b490 .functor AND 1, L_0x55e366f1b9f0, L_0x55e366f1ba90, C4<1>, C4<1>; +L_0x55e366f1bcc0 .functor AND 1, L_0x55e366f1bd30, L_0x55e366f1be20, C4<1>, C4<1>; +L_0x55e366f1c060 .functor AND 1, L_0x55e366f1c170, L_0x55e366f1c260, C4<1>, C4<1>; +L_0x55e366f1c4b0 .functor AND 1, L_0x55e366f1c520, L_0x55e366f1c5c0, C4<1>, C4<1>; +L_0x55e366f1c820 .functor AND 1, L_0x55e366f1c0d0, L_0x55e366f1c990, C4<1>, C4<1>; +L_0x55e366f1cc00 .functor AND 1, L_0x55e366f1cc70, L_0x55e366f1cd60, C4<1>, C4<1>; +L_0x55e366f1cfe0 .functor AND 1, L_0x55e366f1d110, L_0x55e366f1d200, C4<1>, C4<1>; +L_0x55e366f1d490 .functor AND 1, L_0x55e366f1d500, L_0x55e366f1d5f0, C4<1>, C4<1>; +L_0x55e366f1dbb0 .functor AND 1, L_0x55e366f1dd40, L_0x55e366f1dff0, C4<1>, C4<1>; +L_0x55e366f1e0e0 .functor OR 1, L_0x55e366f1e150, L_0x55e366f1e460, C4<0>, C4<0>; +L_0x55e366f1e5a0 .functor OR 1, L_0x55e366f1e6f0, L_0x55e366f1e9c0, C4<0>, C4<0>; +L_0x55e366f1eab0 .functor OR 1, L_0x55e366f1eb20, L_0x55e366f1ee00, C4<0>, C4<0>; +L_0x55e366f1f270 .functor OR 1, L_0x55e366f1f420, L_0x55e366f1f510, C4<0>, C4<0>; +L_0x55e366f1f810 .functor OR 1, L_0x55e366f1f880, L_0x55e366f1f9c0, C4<0>, C4<0>; +L_0x55e366f1fd20 .functor OR 1, L_0x55e366f1fe90, L_0x55e366f1ff80, C4<0>, C4<0>; +L_0x55e366f202a0 .functor OR 1, L_0x55e366f20310, L_0x55e366f20490, C4<0>, C4<0>; +L_0x55e366f20940 .functor OR 1, L_0x55e366f20b10, L_0x55e366f20e50, C4<0>, C4<0>; +L_0x55e366f20f40 .functor OR 1, L_0x55e366f20fb0, L_0x55e366f21350, C4<0>, C4<0>; +L_0x55e366f21490 .functor OR 1, L_0x55e366f21620, L_0x55e366f21980, C4<0>, C4<0>; +L_0x55e366f21a70 .functor OR 1, L_0x55e366f21ae0, L_0x55e366f21ee0, C4<0>, C4<0>; +L_0x55e366f22010 .functor OR 1, L_0x55e366f21500, L_0x55e366f22440, C4<0>, C4<0>; +L_0x7f547236c330 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f224e0 .functor OR 1, L_0x7f547236c330, L_0x55e366f225a0, C4<0>, C4<0>; +L_0x7f547236c378 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f22930 .functor OR 1, L_0x7f547236c378, L_0x55e366f22b30, C4<0>, C4<0>; +L_0x7f547236c3c0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f22c20 .functor OR 1, L_0x7f547236c3c0, L_0x55e366f22ce0, C4<0>, C4<0>; +L_0x7f547236c408 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f233f0 .functor OR 1, L_0x7f547236c408, L_0x55e366f23650, C4<0>, C4<0>; +v0x55e366ef5260_0 .net "A", 3 0, v0x55e366efdb20_0; 1 drivers +v0x55e366ef5320_0 .net "B", 3 0, v0x55e366efdc00_0; 1 drivers +v0x55e366ef53e0_0 .net "CarryIN", 0 0, v0x55e366efdcc0_0; 1 drivers +v0x55e366ef5480_0 .net "CarryOUT", 0 0, L_0x55e366f06460; alias, 1 drivers +v0x55e366ef5550_0 .net "Y", 7 0, L_0x55e366f23080; 1 drivers +v0x55e366ef55f0_0 .net *"_ivl_10", 0 0, L_0x55e366f18720; 1 drivers +v0x55e366ef5690_0 .net *"_ivl_101", 0 0, L_0x55e366f1b9f0; 1 drivers +v0x55e366ef5770_0 .net *"_ivl_103", 0 0, L_0x55e366f1ba90; 1 drivers +v0x55e366ef5850_0 .net *"_ivl_104", 0 0, L_0x55e366f1bcc0; 1 drivers +v0x55e366ef5930_0 .net *"_ivl_107", 0 0, L_0x55e366f1bd30; 1 drivers +v0x55e366ef5a10_0 .net *"_ivl_109", 0 0, L_0x55e366f1be20; 1 drivers +v0x55e366ef5af0_0 .net *"_ivl_110", 0 0, L_0x55e366f1c060; 1 drivers +v0x55e366ef5bd0_0 .net *"_ivl_113", 0 0, L_0x55e366f1c170; 1 drivers +v0x55e366ef5cb0_0 .net *"_ivl_115", 0 0, L_0x55e366f1c260; 1 drivers +v0x55e366ef5d90_0 .net *"_ivl_116", 0 0, L_0x55e366f1c4b0; 1 drivers +v0x55e366ef5e70_0 .net *"_ivl_119", 0 0, L_0x55e366f1c520; 1 drivers +v0x55e366ef5f50_0 .net *"_ivl_121", 0 0, L_0x55e366f1c5c0; 1 drivers +v0x55e366ef6140_0 .net *"_ivl_122", 0 0, L_0x55e366f1c820; 1 drivers +v0x55e366ef6220_0 .net *"_ivl_125", 0 0, L_0x55e366f1c0d0; 1 drivers +v0x55e366ef6300_0 .net *"_ivl_127", 0 0, L_0x55e366f1c990; 1 drivers +v0x55e366ef63e0_0 .net *"_ivl_128", 0 0, L_0x55e366f1cc00; 1 drivers +v0x55e366ef64c0_0 .net *"_ivl_13", 0 0, L_0x55e366f18790; 1 drivers +v0x55e366ef65a0_0 .net *"_ivl_131", 0 0, L_0x55e366f1cc70; 1 drivers +v0x55e366ef6680_0 .net *"_ivl_133", 0 0, L_0x55e366f1cd60; 1 drivers +v0x55e366ef6760_0 .net *"_ivl_134", 0 0, L_0x55e366f1cfe0; 1 drivers +v0x55e366ef6840_0 .net *"_ivl_137", 0 0, L_0x55e366f1d110; 1 drivers +v0x55e366ef6920_0 .net *"_ivl_139", 0 0, L_0x55e366f1d200; 1 drivers +v0x55e366ef6a00_0 .net *"_ivl_140", 0 0, L_0x55e366f1d490; 1 drivers +v0x55e366ef6ae0_0 .net *"_ivl_143", 0 0, L_0x55e366f1d500; 1 drivers +v0x55e366ef6bc0_0 .net *"_ivl_145", 0 0, L_0x55e366f1d5f0; 1 drivers +v0x55e366ef6ca0_0 .net *"_ivl_146", 0 0, L_0x55e366f1dbb0; 1 drivers +v0x55e366ef6d80_0 .net *"_ivl_15", 0 0, L_0x55e366f18910; 1 drivers +v0x55e366ef6e60_0 .net *"_ivl_150", 0 0, L_0x55e366f1dd40; 1 drivers +v0x55e366ef6f40_0 .net *"_ivl_152", 0 0, L_0x55e366f1dff0; 1 drivers +v0x55e366ef7020_0 .net *"_ivl_153", 0 0, L_0x55e366f1e0e0; 1 drivers +v0x55e366ef7100_0 .net *"_ivl_156", 0 0, L_0x55e366f1e150; 1 drivers +v0x55e366ef71e0_0 .net *"_ivl_158", 0 0, L_0x55e366f1e460; 1 drivers +v0x55e366ef72c0_0 .net *"_ivl_159", 0 0, L_0x55e366f1e5a0; 1 drivers +v0x55e366ef73a0_0 .net *"_ivl_16", 0 0, L_0x55e366f18a40; 1 drivers +v0x55e366ef7480_0 .net *"_ivl_162", 0 0, L_0x55e366f1e6f0; 1 drivers +v0x55e366ef7560_0 .net *"_ivl_164", 0 0, L_0x55e366f1e9c0; 1 drivers +v0x55e366ef7640_0 .net *"_ivl_165", 0 0, L_0x55e366f1eab0; 1 drivers +v0x55e366ef7720_0 .net *"_ivl_168", 0 0, L_0x55e366f1eb20; 1 drivers +v0x55e366ef7800_0 .net *"_ivl_170", 0 0, L_0x55e366f1ee00; 1 drivers +v0x55e366ef78e0_0 .net *"_ivl_171", 0 0, L_0x55e366f1f270; 1 drivers +v0x55e366ef79c0_0 .net *"_ivl_175", 0 0, L_0x55e366f1f420; 1 drivers +v0x55e366ef7aa0_0 .net *"_ivl_177", 0 0, L_0x55e366f1f510; 1 drivers +v0x55e366ef7b80_0 .net *"_ivl_178", 0 0, L_0x55e366f1f810; 1 drivers +v0x55e366ef7c60_0 .net *"_ivl_181", 0 0, L_0x55e366f1f880; 1 drivers +v0x55e366ef7d40_0 .net *"_ivl_183", 0 0, L_0x55e366f1f9c0; 1 drivers +v0x55e366ef7e20_0 .net *"_ivl_184", 0 0, L_0x55e366f1fd20; 1 drivers +v0x55e366ef7f00_0 .net *"_ivl_187", 0 0, L_0x55e366f1fe90; 1 drivers +v0x55e366ef7fe0_0 .net *"_ivl_189", 0 0, L_0x55e366f1ff80; 1 drivers +v0x55e366ef80c0_0 .net *"_ivl_19", 0 0, L_0x55e366f18ab0; 1 drivers +v0x55e366ef81a0_0 .net *"_ivl_190", 0 0, L_0x55e366f202a0; 1 drivers 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.net *"_ivl_22", 0 0, L_0x55e366f18e20; 1 drivers +v0x55e366ef93b0_0 .net *"_ivl_220", 0 0, L_0x55e366f21ee0; 1 drivers +v0x55e366ef9490_0 .net *"_ivl_221", 0 0, L_0x55e366f22010; 1 drivers +v0x55e366ef9570_0 .net *"_ivl_224", 0 0, L_0x55e366f21500; 1 drivers +v0x55e366ef9650_0 .net *"_ivl_226", 0 0, L_0x55e366f22440; 1 drivers +v0x55e366ef9730_0 .net *"_ivl_227", 0 0, L_0x55e366f224e0; 1 drivers +v0x55e366ef9810_0 .net/2u *"_ivl_229", 0 0, L_0x7f547236c330; 1 drivers +v0x55e366ef98f0_0 .net *"_ivl_232", 0 0, L_0x55e366f225a0; 1 drivers +v0x55e366ef99d0_0 .net *"_ivl_233", 0 0, L_0x55e366f22930; 1 drivers +v0x55e366ef9ab0_0 .net/2u *"_ivl_235", 0 0, L_0x7f547236c378; 1 drivers +v0x55e366ef9b90_0 .net *"_ivl_238", 0 0, L_0x55e366f22b30; 1 drivers +v0x55e366ef9c70_0 .net *"_ivl_239", 0 0, L_0x55e366f22c20; 1 drivers +v0x55e366ef9d50_0 .net/2u *"_ivl_241", 0 0, L_0x7f547236c3c0; 1 drivers +v0x55e366ef9e30_0 .net *"_ivl_244", 0 0, L_0x55e366f22ce0; 1 drivers +v0x55e366ef9f10_0 .net *"_ivl_245", 0 0, L_0x55e366f233f0; 1 drivers +v0x55e366ef9ff0_0 .net/2u *"_ivl_248", 0 0, L_0x7f547236c408; 1 drivers +v0x55e366efa0d0_0 .net *"_ivl_251", 0 0, L_0x55e366f23650; 1 drivers +v0x55e366efa1b0_0 .net *"_ivl_26", 0 0, L_0x55e366f18ee0; 1 drivers +v0x55e366efa290_0 .net *"_ivl_28", 0 0, L_0x55e366f18fd0; 1 drivers +v0x55e366efa370_0 .net *"_ivl_29", 0 0, L_0x55e366f19070; 1 drivers +v0x55e366efa450_0 .net *"_ivl_32", 0 0, L_0x55e366f190e0; 1 drivers +v0x55e366efa530_0 .net *"_ivl_34", 0 0, L_0x55e366f19290; 1 drivers +v0x55e366efa610_0 .net *"_ivl_35", 0 0, L_0x55e366f19380; 1 drivers +v0x55e366efa6f0_0 .net *"_ivl_38", 0 0, L_0x55e366f193f0; 1 drivers +v0x55e366efa7d0_0 .net *"_ivl_4", 0 0, L_0x55e366f184d0; 1 drivers +v0x55e366efa8b0_0 .net *"_ivl_40", 0 0, L_0x55e366f19560; 1 drivers +v0x55e366efa990_0 .net *"_ivl_41", 0 0, L_0x55e366f19220; 1 drivers +v0x55e366efaa70_0 .net *"_ivl_44", 0 0, L_0x55e366f196e0; 1 drivers +v0x55e366efab50_0 .net *"_ivl_46", 0 0, L_0x55e366f198a0; 1 drivers +v0x55e366efac30_0 .net *"_ivl_47", 0 0, L_0x55e366f19b70; 1 drivers +v0x55e366efad10_0 .net *"_ivl_51", 0 0, L_0x55e366f19c80; 1 drivers +v0x55e366efadf0_0 .net *"_ivl_53", 0 0, L_0x55e366f19d70; 1 drivers +v0x55e366efaed0_0 .net *"_ivl_54", 0 0, L_0x55e366f19f10; 1 drivers +v0x55e366efafb0_0 .net *"_ivl_57", 0 0, L_0x55e366f19ad0; 1 drivers +v0x55e366efb090_0 .net *"_ivl_59", 0 0, L_0x55e366f19fd0; 1 drivers +v0x55e366efb170_0 .net *"_ivl_60", 0 0, L_0x55e366f1a180; 1 drivers +v0x55e366efb250_0 .net *"_ivl_63", 0 0, L_0x55e366f1a1f0; 1 drivers +v0x55e366efb330_0 .net *"_ivl_65", 0 0, L_0x55e366f1a290; 1 drivers +v0x55e366efb410_0 .net *"_ivl_66", 0 0, L_0x55e366f1a450; 1 drivers +v0x55e366efb4f0_0 .net *"_ivl_69", 0 0, L_0x55e366f1a4c0; 1 drivers +v0x55e366efb5d0_0 .net *"_ivl_7", 0 0, L_0x55e366f18540; 1 drivers +v0x55e366efb6b0_0 .net *"_ivl_71", 0 0, L_0x55e366f1a560; 1 drivers +v0x55e366efb790_0 .net *"_ivl_72", 0 0, L_0x55e366f1a8c0; 1 drivers +v0x55e366efb870_0 .net *"_ivl_76", 0 0, L_0x55e366f1a9f0; 1 drivers +v0x55e366efb950_0 .net *"_ivl_78", 0 0, L_0x55e366f1abd0; 1 drivers +v0x55e366efba30_0 .net *"_ivl_79", 0 0, L_0x55e366f1acc0; 1 drivers +v0x55e366efbb10_0 .net *"_ivl_82", 0 0, L_0x55e366f1ad30; 1 drivers +v0x55e366efbbf0_0 .net *"_ivl_84", 0 0, L_0x55e366f1af20; 1 drivers +v0x55e366efbcd0_0 .net *"_ivl_85", 0 0, L_0x55e366f1b010; 1 drivers +v0x55e366efbdb0_0 .net *"_ivl_88", 0 0, L_0x55e366f1b100; 1 drivers +v0x55e366efbe90_0 .net *"_ivl_9", 0 0, L_0x55e366f18630; 1 drivers +v0x55e366efbf70_0 .net *"_ivl_90", 0 0, L_0x55e366f1b300; 1 drivers +v0x55e366efc050_0 .net *"_ivl_91", 0 0, L_0x55e366f1a980; 1 drivers +v0x55e366efc130_0 .net *"_ivl_94", 0 0, L_0x55e366f1b3f0; 1 drivers +v0x55e366efc210_0 .net *"_ivl_96", 0 0, L_0x55e366f1b5b0; 1 drivers +v0x55e366efc2f0_0 .net *"_ivl_97", 0 0, L_0x55e366f1b490; 1 drivers +v0x55e366efc3d0_0 .net "aUtemp1", 3 0, L_0x55e366f1a730; 1 drivers +v0x55e366efc4b0_0 .net "aUtemp2", 3 0, L_0x55e366f1b6a0; 1 drivers +v0x55e366efc590_0 .net "add_Y", 3 0, L_0x55e366f04d10; 1 drivers +v0x55e366efc680_0 .net "bcd", 11 0, L_0x55e366f29560; alias, 1 drivers +v0x55e366efcf60_0 .net "lUOutput1", 3 0, L_0x55e366f18c90; 1 drivers +v0x55e366efd020_0 .net "lUOutput2", 3 0, L_0x55e366f19940; 1 drivers +v0x55e366efd100_0 .net "opCode8", 7 0, L_0x55e366eff690; 1 drivers +v0x55e366efd1f0_0 .net "opCodeA", 2 0, v0x55e366efdf70_0; 1 drivers +v0x55e366efd2c0_0 .net "opwireM", 7 0, L_0x55e366f17d00; 1 drivers +v0x55e366efd390_0 .net "overflow", 0 0, L_0x55e366f06570; alias, 1 drivers +v0x55e366efd460_0 .net "resultA", 3 0, L_0x55e366f09af0; 1 drivers +v0x55e366efd530_0 .net "resultO", 3 0, L_0x55e366f0ac70; 1 drivers +v0x55e366efd600_0 .net "resultX", 3 0, L_0x55e366f0bed0; 1 drivers +v0x55e366efd6d0_0 .net "sub_Y", 3 0, L_0x55e366f05a90; 1 drivers +v0x55e366efd7a0_0 .net "wireLA", 3 0, L_0x55e366f20800; 1 drivers +v0x55e366efd840_0 .net "wireM", 7 0, L_0x55e366f1d890; 1 drivers +v0x55e366efd920_0 .net "wireY", 3 0, L_0x55e366f1ef30; 1 drivers +L_0x55e366f066a0 .part L_0x55e366eff690, 0, 2; +L_0x55e366f0c740 .part L_0x55e366eff690, 4, 3; +L_0x55e366f18540 .part L_0x55e366f09af0, 0, 1; +L_0x55e366f18630 .part L_0x55e366f0ac70, 0, 1; +L_0x55e366f18790 .part L_0x55e366f09af0, 1, 1; +L_0x55e366f18910 .part L_0x55e366f0ac70, 1, 1; +L_0x55e366f18ab0 .part L_0x55e366f09af0, 2, 1; +L_0x55e366f18b50 .part L_0x55e366f0ac70, 2, 1; +L_0x55e366f18c90 .concat8 [ 1 1 1 1], L_0x55e366f184d0, L_0x55e366f18720, L_0x55e366f18a40, L_0x55e366f18e20; +L_0x55e366f18ee0 .part L_0x55e366f09af0, 3, 1; +L_0x55e366f18fd0 .part L_0x55e366f0ac70, 3, 1; +L_0x55e366f190e0 .part L_0x55e366f18c90, 0, 1; +L_0x55e366f19290 .part L_0x55e366f0bed0, 0, 1; +L_0x55e366f193f0 .part L_0x55e366f18c90, 1, 1; +L_0x55e366f19560 .part L_0x55e366f0bed0, 1, 1; +L_0x55e366f196e0 .part L_0x55e366f18c90, 2, 1; +L_0x55e366f198a0 .part L_0x55e366f0bed0, 2, 1; +L_0x55e366f19940 .concat8 [ 1 1 1 1], L_0x55e366f19070, L_0x55e366f19380, L_0x55e366f19220, L_0x55e366f19b70; +L_0x55e366f19c80 .part L_0x55e366f18c90, 3, 1; +L_0x55e366f19d70 .part L_0x55e366f0bed0, 3, 1; +L_0x55e366f19ad0 .part L_0x55e366eff690, 0, 1; +L_0x55e366f19fd0 .part L_0x55e366f04d10, 0, 1; +L_0x55e366f1a1f0 .part L_0x55e366eff690, 0, 1; +L_0x55e366f1a290 .part L_0x55e366f04d10, 1, 1; +L_0x55e366f1a4c0 .part L_0x55e366eff690, 0, 1; +L_0x55e366f1a560 .part L_0x55e366f04d10, 2, 1; +L_0x55e366f1a730 .concat8 [ 1 1 1 1], L_0x55e366f19f10, L_0x55e366f1a180, L_0x55e366f1a450, L_0x55e366f1a8c0; +L_0x55e366f1a9f0 .part L_0x55e366eff690, 0, 1; +L_0x55e366f1abd0 .part L_0x55e366f04d10, 3, 1; +L_0x55e366f1ad30 .part L_0x55e366eff690, 1, 1; +L_0x55e366f1af20 .part L_0x55e366f05a90, 0, 1; +L_0x55e366f1b100 .part L_0x55e366eff690, 1, 1; +L_0x55e366f1b300 .part L_0x55e366f05a90, 1, 1; +L_0x55e366f1b3f0 .part L_0x55e366eff690, 1, 1; +L_0x55e366f1b5b0 .part L_0x55e366f05a90, 2, 1; +L_0x55e366f1b6a0 .concat8 [ 1 1 1 1], L_0x55e366f1acc0, L_0x55e366f1b010, L_0x55e366f1a980, L_0x55e366f1b490; +L_0x55e366f1b9f0 .part L_0x55e366eff690, 1, 1; +L_0x55e366f1ba90 .part L_0x55e366f05a90, 3, 1; +L_0x55e366f1bd30 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1be20 .part L_0x55e366f17d00, 0, 1; +L_0x55e366f1c170 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1c260 .part L_0x55e366f17d00, 1, 1; +L_0x55e366f1c520 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1c5c0 .part L_0x55e366f17d00, 2, 1; +L_0x55e366f1c0d0 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1c990 .part L_0x55e366f17d00, 3, 1; +L_0x55e366f1cc70 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1cd60 .part L_0x55e366f17d00, 4, 1; +L_0x55e366f1d110 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1d200 .part L_0x55e366f17d00, 5, 1; +L_0x55e366f1d500 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1d5f0 .part L_0x55e366f17d00, 6, 1; +LS_0x55e366f1d890_0_0 .concat8 [ 1 1 1 1], L_0x55e366f1bcc0, L_0x55e366f1c060, L_0x55e366f1c4b0, L_0x55e366f1c820; +LS_0x55e366f1d890_0_4 .concat8 [ 1 1 1 1], L_0x55e366f1cc00, L_0x55e366f1cfe0, L_0x55e366f1d490, L_0x55e366f1dbb0; +L_0x55e366f1d890 .concat8 [ 4 4 0 0], LS_0x55e366f1d890_0_0, LS_0x55e366f1d890_0_4; +L_0x55e366f1dd40 .part L_0x55e366eff690, 2, 1; +L_0x55e366f1dff0 .part L_0x55e366f17d00, 7, 1; +L_0x55e366f1e150 .part L_0x55e366f1a730, 0, 1; +L_0x55e366f1e460 .part L_0x55e366f1b6a0, 0, 1; +L_0x55e366f1e6f0 .part L_0x55e366f1a730, 1, 1; +L_0x55e366f1e9c0 .part L_0x55e366f1b6a0, 1, 1; +L_0x55e366f1eb20 .part L_0x55e366f1a730, 2, 1; +L_0x55e366f1ee00 .part L_0x55e366f1b6a0, 2, 1; +L_0x55e366f1ef30 .concat8 [ 1 1 1 1], L_0x55e366f1e0e0, L_0x55e366f1e5a0, L_0x55e366f1eab0, L_0x55e366f1f270; +L_0x55e366f1f420 .part L_0x55e366f1a730, 3, 1; +L_0x55e366f1f510 .part L_0x55e366f1b6a0, 3, 1; +L_0x55e366f1f880 .part L_0x55e366f19940, 0, 1; +L_0x55e366f1f9c0 .part L_0x55e366f1ef30, 0, 1; +L_0x55e366f1fe90 .part L_0x55e366f19940, 1, 1; +L_0x55e366f1ff80 .part L_0x55e366f1ef30, 1, 1; +L_0x55e366f20310 .part L_0x55e366f19940, 2, 1; +L_0x55e366f20490 .part L_0x55e366f1ef30, 2, 1; +L_0x55e366f20800 .concat8 [ 1 1 1 1], L_0x55e366f1f810, L_0x55e366f1fd20, L_0x55e366f202a0, L_0x55e366f20940; +L_0x55e366f20b10 .part L_0x55e366f19940, 3, 1; +L_0x55e366f20e50 .part L_0x55e366f1ef30, 3, 1; +L_0x55e366f20fb0 .part L_0x55e366f20800, 0, 1; +L_0x55e366f21350 .part L_0x55e366f1d890, 0, 1; +L_0x55e366f21620 .part L_0x55e366f20800, 1, 1; +L_0x55e366f21980 .part L_0x55e366f1d890, 1, 1; +L_0x55e366f21ae0 .part L_0x55e366f20800, 2, 1; +L_0x55e366f21ee0 .part L_0x55e366f1d890, 2, 1; +L_0x55e366f21500 .part L_0x55e366f20800, 3, 1; +L_0x55e366f22440 .part L_0x55e366f1d890, 3, 1; +L_0x55e366f225a0 .part L_0x55e366f1d890, 4, 1; +L_0x55e366f22b30 .part L_0x55e366f1d890, 5, 1; +L_0x55e366f22ce0 .part L_0x55e366f1d890, 6, 1; +LS_0x55e366f23080_0_0 .concat8 [ 1 1 1 1], L_0x55e366f20f40, L_0x55e366f21490, L_0x55e366f21a70, L_0x55e366f22010; +LS_0x55e366f23080_0_4 .concat8 [ 1 1 1 1], L_0x55e366f224e0, L_0x55e366f22930, L_0x55e366f22c20, L_0x55e366f233f0; +L_0x55e366f23080 .concat8 [ 4 4 0 0], LS_0x55e366f23080_0_0, LS_0x55e366f23080_0_4; +L_0x55e366f23650 .part L_0x55e366f1d890, 7, 1; +S_0x55e366eb3a00 .scope module, "aU" "arithmeticUnit" 3 20, 4 1 0, S_0x55e366eb6430; + .timescale 0 0; + .port_info 0 /INPUT 2 "opCode"; + .port_info 1 /INPUT 4 "A"; + .port_info 2 /INPUT 4 "B"; + .port_info 3 /INPUT 1 "CarryIN"; + .port_info 4 /OUTPUT 4 "add_Y"; + .port_info 5 /OUTPUT 4 "sub_Y"; + .port_info 6 /OUTPUT 1 "CarryOUT"; + .port_info 7 /OUTPUT 1 "overflow"; +L_0x55e366f04620 .functor AND 1, L_0x55e366f046b0, L_0x55e366f04750, C4<1>, C4<1>; +L_0x55e366f047f0 .functor AND 1, L_0x55e366f04860, L_0x55e366f04950, C4<1>, C4<1>; +L_0x55e366f04ad0 .functor AND 1, L_0x55e366f04b40, L_0x55e366f04be0, C4<1>, C4<1>; +L_0x55e366f04ef0 .functor AND 1, L_0x55e366f04fb0, L_0x55e366f05180, C4<1>, C4<1>; +L_0x55e366f05220 .functor AND 1, L_0x55e366f05290, L_0x55e366f053e0, C4<1>, C4<1>; +L_0x55e366f05480 .functor AND 1, L_0x55e366f05530, L_0x55e366f05690, C4<1>, C4<1>; +L_0x55e366f05810 .functor AND 1, L_0x55e366f05880, L_0x55e366f059a0, C4<1>, C4<1>; +L_0x55e366f05620 .functor AND 1, L_0x55e366f05da0, L_0x55e366f05fa0, C4<1>, C4<1>; +L_0x55e366f06130 .functor AND 1, L_0x55e366f04070, L_0x55e366f061a0, C4<1>, C4<1>; +L_0x55e366f06240 .functor AND 1, L_0x55e366f017b0, L_0x55e366f06310, C4<1>, C4<1>; +L_0x55e366f06460 .functor OR 1, L_0x55e366f06240, L_0x55e366f06130, C4<0>, C4<0>; +L_0x55e366f06570 .functor AND 1, L_0x55e366f06090, L_0x55e366f01df0, C4<1>, C4<1>; +v0x55e366eccf00_0 .net "A", 3 0, v0x55e366efdb20_0; alias, 1 drivers +v0x55e366ecd030_0 .net "B", 3 0, v0x55e366efdc00_0; alias, 1 drivers +v0x55e366ecd140_0 .net "CarryIN", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ecd1e0_0 .net "CarryOUT", 0 0, L_0x55e366f06460; alias, 1 drivers +v0x55e366ecd280_0 .net "CarryOUTADD", 0 0, L_0x55e366f017b0; 1 drivers +v0x55e366ecd3c0_0 .net "CarryOUTSUB", 0 0, L_0x55e366f04070; 1 drivers +v0x55e366ecd4b0_0 .net *"_ivl_0", 0 0, L_0x55e366f04620; 1 drivers +v0x55e366ecd590_0 .net *"_ivl_11", 0 0, L_0x55e366f04950; 1 drivers +v0x55e366ecd670_0 .net *"_ivl_12", 0 0, L_0x55e366f04ad0; 1 drivers +v0x55e366ecd7e0_0 .net *"_ivl_15", 0 0, L_0x55e366f04b40; 1 drivers +v0x55e366ecd8c0_0 .net *"_ivl_17", 0 0, L_0x55e366f04be0; 1 drivers +v0x55e366ecd9a0_0 .net *"_ivl_18", 0 0, L_0x55e366f04ef0; 1 drivers +v0x55e366ecda80_0 .net *"_ivl_22", 0 0, L_0x55e366f04fb0; 1 drivers +v0x55e366ecdb60_0 .net *"_ivl_24", 0 0, L_0x55e366f05180; 1 drivers +v0x55e366ecdc40_0 .net *"_ivl_25", 0 0, L_0x55e366f05220; 1 drivers +v0x55e366ecdd20_0 .net *"_ivl_28", 0 0, L_0x55e366f05290; 1 drivers +v0x55e366ecde00_0 .net *"_ivl_3", 0 0, L_0x55e366f046b0; 1 drivers +v0x55e366ecdee0_0 .net *"_ivl_30", 0 0, L_0x55e366f053e0; 1 drivers +v0x55e366ecdfc0_0 .net *"_ivl_31", 0 0, L_0x55e366f05480; 1 drivers +v0x55e366ece0a0_0 .net *"_ivl_34", 0 0, L_0x55e366f05530; 1 drivers +v0x55e366ece180_0 .net *"_ivl_36", 0 0, L_0x55e366f05690; 1 drivers +v0x55e366ece260_0 .net *"_ivl_37", 0 0, L_0x55e366f05810; 1 drivers +v0x55e366ece340_0 .net *"_ivl_40", 0 0, L_0x55e366f05880; 1 drivers +v0x55e366ece420_0 .net *"_ivl_42", 0 0, L_0x55e366f059a0; 1 drivers +v0x55e366ece500_0 .net *"_ivl_43", 0 0, L_0x55e366f05620; 1 drivers +v0x55e366ece5e0_0 .net *"_ivl_47", 0 0, L_0x55e366f05da0; 1 drivers +v0x55e366ece6c0_0 .net *"_ivl_49", 0 0, L_0x55e366f05fa0; 1 drivers +v0x55e366ece7a0_0 .net *"_ivl_5", 0 0, L_0x55e366f04750; 1 drivers +v0x55e366ece880_0 .net *"_ivl_51", 0 0, L_0x55e366f061a0; 1 drivers +v0x55e366ece960_0 .net *"_ivl_53", 0 0, L_0x55e366f06310; 1 drivers +v0x55e366ecea40_0 .net *"_ivl_55", 0 0, L_0x55e366f06090; 1 drivers +v0x55e366eceb20_0 .net *"_ivl_6", 0 0, L_0x55e366f047f0; 1 drivers +v0x55e366ecec00_0 .net *"_ivl_9", 0 0, L_0x55e366f04860; 1 drivers +v0x55e366eceef0_0 .net "addY", 3 0, L_0x55e366f01d50; 1 drivers +v0x55e366ecefb0_0 .net "add_Y", 3 0, L_0x55e366f04d10; alias, 1 drivers +v0x55e366ecf070_0 .net "opCode", 1 0, L_0x55e366f066a0; 1 drivers +v0x55e366ecf150_0 .net "overflow", 0 0, L_0x55e366f06570; alias, 1 drivers +v0x55e366ecf210_0 .net "subY", 3 0, L_0x55e366f04510; 1 drivers +v0x55e366ecf2d0_0 .net "sub_Y", 3 0, L_0x55e366f05a90; alias, 1 drivers +v0x55e366ecf390_0 .net "tempCAdd", 0 0, L_0x55e366f06240; 1 drivers +v0x55e366ecf450_0 .net "tempCSub", 0 0, L_0x55e366f06130; 1 drivers +v0x55e366ecf510_0 .net "tempoverflow", 0 0, L_0x55e366f01df0; 1 drivers +L_0x55e366f046b0 .part L_0x55e366f066a0, 0, 1; +L_0x55e366f04750 .part L_0x55e366f01d50, 0, 1; +L_0x55e366f04860 .part L_0x55e366f066a0, 0, 1; +L_0x55e366f04950 .part L_0x55e366f01d50, 1, 1; +L_0x55e366f04b40 .part L_0x55e366f066a0, 0, 1; +L_0x55e366f04be0 .part L_0x55e366f01d50, 2, 1; +L_0x55e366f04d10 .concat8 [ 1 1 1 1], L_0x55e366f04620, L_0x55e366f047f0, L_0x55e366f04ad0, L_0x55e366f04ef0; +L_0x55e366f04fb0 .part L_0x55e366f066a0, 0, 1; +L_0x55e366f05180 .part L_0x55e366f01d50, 3, 1; +L_0x55e366f05290 .part L_0x55e366f066a0, 1, 1; +L_0x55e366f053e0 .part L_0x55e366f04510, 0, 1; +L_0x55e366f05530 .part L_0x55e366f066a0, 1, 1; +L_0x55e366f05690 .part L_0x55e366f04510, 1, 1; +L_0x55e366f05880 .part L_0x55e366f066a0, 1, 1; +L_0x55e366f059a0 .part L_0x55e366f04510, 2, 1; +L_0x55e366f05a90 .concat8 [ 1 1 1 1], L_0x55e366f05220, L_0x55e366f05480, L_0x55e366f05810, L_0x55e366f05620; +L_0x55e366f05da0 .part L_0x55e366f066a0, 1, 1; +L_0x55e366f05fa0 .part L_0x55e366f04510, 3, 1; +L_0x55e366f061a0 .part L_0x55e366f066a0, 1, 1; +L_0x55e366f06310 .part L_0x55e366f066a0, 0, 1; +L_0x55e366f06090 .part L_0x55e366f066a0, 0, 1; +S_0x55e366eb1660 .scope module, "a1" "addition" 4 13, 5 1 0, S_0x55e366eb3a00; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x55e366f01df0 .functor XOR 1, L_0x55e366f01f10, L_0x55e366f017b0, C4<0>, C4<0>; +v0x55e366ec62f0_0 .net "A", 3 0, v0x55e366efdb20_0; alias, 1 drivers +v0x55e366ec63d0_0 .net "B", 3 0, v0x55e366efdc00_0; alias, 1 drivers +v0x55e366ec64b0_0 .net "Carry4", 2 0, L_0x55e366f01220; 1 drivers +v0x55e366ec6570_0 .net "CarryIN", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ec6660_0 .net "CarryOUT", 0 0, L_0x55e366f017b0; alias, 1 drivers +v0x55e366ec6750_0 .net "Y", 3 0, L_0x55e366f01d50; alias, 1 drivers +v0x55e366ec6810_0 .net *"_ivl_39", 0 0, L_0x55e366f01f10; 1 drivers +v0x55e366ec68f0_0 .net "overflow", 0 0, L_0x55e366f01df0; alias, 1 drivers +L_0x55e366efff20 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f00050 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f00570 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f007b0 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f00960 .part L_0x55e366f01220, 0, 1; +L_0x55e366f00e00 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f00f70 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f010a0 .part L_0x55e366f01220, 1, 1; +L_0x55e366f01220 .concat8 [ 1 1 1 0], L_0x55e366effeb0, L_0x55e366f004e0, L_0x55e366f00d70; +L_0x55e366f01860 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f019f0 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f01b20 .part L_0x55e366f01220, 2, 1; +L_0x55e366f01d50 .concat8 [ 1 1 1 1], L_0x55e366effe40, L_0x55e366f00400, L_0x55e366f00c90, L_0x55e366f016d0; +L_0x55e366f01f10 .part L_0x55e366f01220, 2, 1; +S_0x55e366eaeeb0 .scope module, "f0" "fulladder" 5 11, 6 1 0, S_0x55e366eb1660; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366effeb0 .functor OR 1, L_0x55e366effbb0, L_0x55e366effd80, C4<0>, C4<0>; +v0x55e366ec1fa0_0 .net "A", 0 0, L_0x55e366efff20; 1 drivers +v0x55e366ec2060_0 .net "B", 0 0, L_0x55e366f00050; 1 drivers +v0x55e366ec2130_0 .net "Carry", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ec2230_0 .net "CarryO", 0 0, L_0x55e366effeb0; 1 drivers +v0x55e366ec22d0_0 .net "Sum", 0 0, L_0x55e366effe40; 1 drivers +v0x55e366ec23c0_0 .net "and1", 0 0, L_0x55e366effbb0; 1 drivers +v0x55e366ec2490_0 .net "and2", 0 0, L_0x55e366effd80; 1 drivers +v0x55e366ec2560_0 .net "xor1", 0 0, L_0x55e366effd10; 1 drivers +S_0x55e366eac700 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366eaeeb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366effbb0 .functor AND 1, L_0x55e366efff20, L_0x55e366f00050, C4<1>, C4<1>; +L_0x55e366effd10 .functor XOR 1, L_0x55e366efff20, L_0x55e366f00050, C4<0>, C4<0>; +v0x55e366e48690_0 .net "A", 0 0, L_0x55e366efff20; alias, 1 drivers +v0x55e366e46980_0 .net "B", 0 0, L_0x55e366f00050; alias, 1 drivers +v0x55e366ebbc80_0 .net "Carry", 0 0, L_0x55e366effbb0; alias, 1 drivers +v0x55e366ebbf90_0 .net "Sum", 0 0, L_0x55e366effd10; alias, 1 drivers +S_0x55e366ec1bb0 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366eaeeb0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366effd80 .functor AND 1, L_0x55e366effd10, v0x55e366efdcc0_0, C4<1>, C4<1>; +L_0x55e366effe40 .functor XOR 1, L_0x55e366effd10, v0x55e366efdcc0_0, C4<0>, C4<0>; +v0x55e366ebc2a0_0 .net "A", 0 0, L_0x55e366effd10; alias, 1 drivers +v0x55e366ebc550_0 .net "B", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ec1d60_0 .net "Carry", 0 0, L_0x55e366effd80; alias, 1 drivers +v0x55e366ec1e30_0 .net "Sum", 0 0, L_0x55e366effe40; alias, 1 drivers +S_0x55e366ec2650 .scope module, "f1" "fulladder" 5 12, 6 1 0, S_0x55e366eb1660; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f004e0 .functor OR 1, L_0x55e366f00180, L_0x55e366f002b0, C4<0>, C4<0>; +v0x55e366ec33d0_0 .net "A", 0 0, L_0x55e366f00570; 1 drivers +v0x55e366ec3490_0 .net "B", 0 0, L_0x55e366f007b0; 1 drivers +v0x55e366ec3560_0 .net "Carry", 0 0, L_0x55e366f00960; 1 drivers +v0x55e366ec3660_0 .net "CarryO", 0 0, L_0x55e366f004e0; 1 drivers +v0x55e366ec3700_0 .net "Sum", 0 0, L_0x55e366f00400; 1 drivers +v0x55e366ec37f0_0 .net "and1", 0 0, L_0x55e366f00180; 1 drivers +v0x55e366ec38c0_0 .net "and2", 0 0, L_0x55e366f002b0; 1 drivers +v0x55e366ec3990_0 .net "xor1", 0 0, L_0x55e366f00240; 1 drivers +S_0x55e366ec2830 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ec2650; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f00180 .functor AND 1, L_0x55e366f00570, L_0x55e366f007b0, C4<1>, C4<1>; +L_0x55e366f00240 .functor XOR 1, L_0x55e366f00570, L_0x55e366f007b0, C4<0>, C4<0>; +v0x55e366ec2a40_0 .net "A", 0 0, L_0x55e366f00570; alias, 1 drivers +v0x55e366ec2b20_0 .net "B", 0 0, L_0x55e366f007b0; alias, 1 drivers +v0x55e366ec2be0_0 .net "Carry", 0 0, L_0x55e366f00180; alias, 1 drivers +v0x55e366ec2cb0_0 .net "Sum", 0 0, L_0x55e366f00240; alias, 1 drivers +S_0x55e366ec2e20 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ec2650; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f002b0 .functor AND 1, L_0x55e366f00240, L_0x55e366f00960, C4<1>, C4<1>; +L_0x55e366f00400 .functor XOR 1, L_0x55e366f00240, L_0x55e366f00960, C4<0>, C4<0>; +v0x55e366ec3020_0 .net "A", 0 0, L_0x55e366f00240; alias, 1 drivers +v0x55e366ec30f0_0 .net "B", 0 0, L_0x55e366f00960; alias, 1 drivers +v0x55e366ec3190_0 .net "Carry", 0 0, L_0x55e366f002b0; alias, 1 drivers +v0x55e366ec3260_0 .net "Sum", 0 0, L_0x55e366f00400; alias, 1 drivers +S_0x55e366ec3a80 .scope module, "f2" "fulladder" 5 13, 6 1 0, S_0x55e366eb1660; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f00d70 .functor OR 1, L_0x55e366f00a00, L_0x55e366f00b00, C4<0>, C4<0>; +v0x55e366ec4810_0 .net "A", 0 0, L_0x55e366f00e00; 1 drivers +v0x55e366ec48d0_0 .net "B", 0 0, L_0x55e366f00f70; 1 drivers +v0x55e366ec49a0_0 .net "Carry", 0 0, L_0x55e366f010a0; 1 drivers +v0x55e366ec4aa0_0 .net "CarryO", 0 0, L_0x55e366f00d70; 1 drivers +v0x55e366ec4b40_0 .net "Sum", 0 0, L_0x55e366f00c90; 1 drivers +v0x55e366ec4c30_0 .net "and1", 0 0, L_0x55e366f00a00; 1 drivers +v0x55e366ec4d00_0 .net "and2", 0 0, L_0x55e366f00b00; 1 drivers +v0x55e366ec4dd0_0 .net "xor1", 0 0, L_0x55e366f00a70; 1 drivers +S_0x55e366ec3c90 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ec3a80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f00a00 .functor AND 1, L_0x55e366f00e00, L_0x55e366f00f70, C4<1>, C4<1>; +L_0x55e366f00a70 .functor XOR 1, L_0x55e366f00e00, L_0x55e366f00f70, C4<0>, C4<0>; +v0x55e366ec3ea0_0 .net "A", 0 0, L_0x55e366f00e00; alias, 1 drivers +v0x55e366ec3f60_0 .net "B", 0 0, L_0x55e366f00f70; alias, 1 drivers +v0x55e366ec4020_0 .net "Carry", 0 0, L_0x55e366f00a00; alias, 1 drivers +v0x55e366ec40f0_0 .net "Sum", 0 0, L_0x55e366f00a70; alias, 1 drivers +S_0x55e366ec4260 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ec3a80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f00b00 .functor AND 1, L_0x55e366f00a70, L_0x55e366f010a0, C4<1>, C4<1>; +L_0x55e366f00c90 .functor XOR 1, L_0x55e366f00a70, L_0x55e366f010a0, C4<0>, C4<0>; +v0x55e366ec4460_0 .net "A", 0 0, L_0x55e366f00a70; alias, 1 drivers +v0x55e366ec4530_0 .net "B", 0 0, L_0x55e366f010a0; alias, 1 drivers +v0x55e366ec45d0_0 .net "Carry", 0 0, L_0x55e366f00b00; alias, 1 drivers +v0x55e366ec46a0_0 .net "Sum", 0 0, L_0x55e366f00c90; alias, 1 drivers +S_0x55e366ec4ec0 .scope module, "f3" "fulladder" 5 14, 6 1 0, S_0x55e366eb1660; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f017b0 .functor OR 1, L_0x55e366f01310, L_0x55e366f01540, C4<0>, C4<0>; +v0x55e366ec5c40_0 .net "A", 0 0, L_0x55e366f01860; 1 drivers +v0x55e366ec5d00_0 .net "B", 0 0, L_0x55e366f019f0; 1 drivers +v0x55e366ec5dd0_0 .net "Carry", 0 0, L_0x55e366f01b20; 1 drivers +v0x55e366ec5ed0_0 .net "CarryO", 0 0, L_0x55e366f017b0; alias, 1 drivers +v0x55e366ec5f70_0 .net "Sum", 0 0, L_0x55e366f016d0; 1 drivers +v0x55e366ec6060_0 .net "and1", 0 0, L_0x55e366f01310; 1 drivers +v0x55e366ec6130_0 .net "and2", 0 0, L_0x55e366f01540; 1 drivers +v0x55e366ec6200_0 .net "xor1", 0 0, L_0x55e366f014b0; 1 drivers +S_0x55e366ec50a0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ec4ec0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f01310 .functor AND 1, L_0x55e366f01860, L_0x55e366f019f0, C4<1>, C4<1>; +L_0x55e366f014b0 .functor XOR 1, L_0x55e366f01860, L_0x55e366f019f0, C4<0>, C4<0>; +v0x55e366ec52b0_0 .net "A", 0 0, L_0x55e366f01860; alias, 1 drivers +v0x55e366ec5390_0 .net "B", 0 0, L_0x55e366f019f0; alias, 1 drivers +v0x55e366ec5450_0 .net "Carry", 0 0, L_0x55e366f01310; alias, 1 drivers +v0x55e366ec5520_0 .net "Sum", 0 0, L_0x55e366f014b0; alias, 1 drivers +S_0x55e366ec5690 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ec4ec0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f01540 .functor AND 1, L_0x55e366f014b0, L_0x55e366f01b20, C4<1>, C4<1>; +L_0x55e366f016d0 .functor XOR 1, L_0x55e366f014b0, L_0x55e366f01b20, C4<0>, C4<0>; +v0x55e366ec5890_0 .net "A", 0 0, L_0x55e366f014b0; alias, 1 drivers +v0x55e366ec5960_0 .net "B", 0 0, L_0x55e366f01b20; alias, 1 drivers +v0x55e366ec5a00_0 .net "Carry", 0 0, L_0x55e366f01540; alias, 1 drivers +v0x55e366ec5ad0_0 .net "Sum", 0 0, L_0x55e366f016d0; alias, 1 drivers +S_0x55e366ec6a70 .scope module, "s1" "subtraction" 4 14, 8 1 0, S_0x55e366eb3a00; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "BorrowOUT"; +v0x55e366ecc8a0_0 .net "A", 3 0, v0x55e366efdb20_0; alias, 1 drivers +v0x55e366ecc960_0 .net "B", 3 0, v0x55e366efdc00_0; alias, 1 drivers +v0x55e366ecca30_0 .net "BorrowIN", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366eccb00_0 .net "BorrowOUT", 0 0, L_0x55e366f04070; alias, 1 drivers +v0x55e366eccbd0_0 .net "Y", 3 0, L_0x55e366f04510; alias, 1 drivers +o0x7f54723b7358 .functor BUFZ 1, C4; HiZ drive +; Elide local net with no drivers, v0x55e366ecccc0_0 name=_ivl_39 +v0x55e366eccd80_0 .net "tempB", 3 0, L_0x55e366f29c50; 1 drivers +L_0x55e366f02530 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f02680 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f02dc0 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f02ef0 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f03020 .part L_0x55e366f29c50, 0, 1; +L_0x55e366f036d0 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f03840 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f03970 .part L_0x55e366f29c50, 1, 1; +L_0x55e366f04120 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f04250 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f043e0 .part L_0x55e366f29c50, 2, 1; +L_0x55e366f04510 .concat8 [ 1 1 1 1], L_0x55e366f021c0, L_0x55e366f02a00, L_0x55e366f03310, L_0x55e366f03d40; +L_0x55e366f29c50 .concat [ 1 1 1 1], L_0x55e366f024a0, L_0x55e366f02d30, L_0x55e366f03640, o0x7f54723b7358; +S_0x55e366ec6c70 .scope module, "f0" "fullsubtraction" 8 11, 9 1 0, S_0x55e366ec6a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x55e366f024a0 .functor OR 1, L_0x55e366f02100, L_0x55e366f023e0, C4<0>, C4<0>; +v0x55e366ec7cc0_0 .net "A", 0 0, L_0x55e366f02530; 1 drivers +v0x55e366ec7d80_0 .net "B", 0 0, L_0x55e366f02680; 1 drivers +v0x55e366ec7e50_0 .net "BorrowIN", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ec7fb0_0 .net "BorrowOut", 0 0, L_0x55e366f024a0; 1 drivers +v0x55e366ec8050_0 .net "Difference", 0 0, L_0x55e366f021c0; 1 drivers +v0x55e366ec80f0_0 .net "tempB1", 0 0, L_0x55e366f02100; 1 drivers +v0x55e366ec81c0_0 .net "tempB2", 0 0, L_0x55e366f023e0; 1 drivers +v0x55e366ec8290_0 .net "tempD", 0 0, L_0x55e366f01ce0; 1 drivers +S_0x55e366ec6e80 .scope module, "hf1" "halfsubtraction" 9 8, 10 1 0, S_0x55e366ec6c70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f01ce0 .functor XOR 1, L_0x55e366f02530, L_0x55e366f02680, C4<0>, C4<0>; +L_0x55e366f02070 .functor NOT 1, L_0x55e366f02530, C4<0>, C4<0>, C4<0>; +L_0x55e366f02100 .functor AND 1, L_0x55e366f02070, L_0x55e366f02680, C4<1>, C4<1>; +v0x55e366ec7120_0 .net "A", 0 0, L_0x55e366f02530; alias, 1 drivers +v0x55e366ec7200_0 .net "B", 0 0, L_0x55e366f02680; alias, 1 drivers +v0x55e366ec72c0_0 .net "Borrow", 0 0, L_0x55e366f02100; alias, 1 drivers +v0x55e366ec7390_0 .net "Difference", 0 0, L_0x55e366f01ce0; alias, 1 drivers +v0x55e366ec7450_0 .net "notA", 0 0, L_0x55e366f02070; 1 drivers +S_0x55e366ec75e0 .scope module, "hf2" "halfsubtraction" 9 9, 10 1 0, S_0x55e366ec6c70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f021c0 .functor XOR 1, L_0x55e366f01ce0, v0x55e366efdcc0_0, C4<0>, C4<0>; +L_0x55e366f02350 .functor NOT 1, L_0x55e366f01ce0, C4<0>, C4<0>, C4<0>; +L_0x55e366f023e0 .functor AND 1, L_0x55e366f02350, v0x55e366efdcc0_0, C4<1>, C4<1>; +v0x55e366ec7850_0 .net "A", 0 0, L_0x55e366f01ce0; alias, 1 drivers +v0x55e366ec7920_0 .net "B", 0 0, v0x55e366efdcc0_0; alias, 1 drivers +v0x55e366ec79c0_0 .net "Borrow", 0 0, L_0x55e366f023e0; alias, 1 drivers +v0x55e366ec7a90_0 .net "Difference", 0 0, L_0x55e366f021c0; alias, 1 drivers +v0x55e366ec7b30_0 .net "notA", 0 0, L_0x55e366f02350; 1 drivers +S_0x55e366ec8380 .scope module, "f1" "fullsubtraction" 8 12, 9 1 0, S_0x55e366ec6a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x55e366f02d30 .functor OR 1, L_0x55e366f028f0, L_0x55e366f02c20, C4<0>, C4<0>; +v0x55e366ec93c0_0 .net "A", 0 0, L_0x55e366f02dc0; 1 drivers +v0x55e366ec9480_0 .net "B", 0 0, L_0x55e366f02ef0; 1 drivers +v0x55e366ec9550_0 .net "BorrowIN", 0 0, L_0x55e366f03020; 1 drivers +v0x55e366ec9650_0 .net "BorrowOut", 0 0, L_0x55e366f02d30; 1 drivers +v0x55e366ec96f0_0 .net "Difference", 0 0, L_0x55e366f02a00; 1 drivers +v0x55e366ec97e0_0 .net "tempB1", 0 0, L_0x55e366f028f0; 1 drivers +v0x55e366ec98b0_0 .net "tempB2", 0 0, L_0x55e366f02c20; 1 drivers +v0x55e366ec9980_0 .net "tempD", 0 0, L_0x55e366f027b0; 1 drivers +S_0x55e366ec8580 .scope module, "hf1" "halfsubtraction" 9 8, 10 1 0, S_0x55e366ec8380; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f027b0 .functor XOR 1, L_0x55e366f02dc0, L_0x55e366f02ef0, C4<0>, C4<0>; +L_0x55e366f02860 .functor NOT 1, L_0x55e366f02dc0, C4<0>, C4<0>, C4<0>; +L_0x55e366f028f0 .functor AND 1, L_0x55e366f02860, L_0x55e366f02ef0, C4<1>, C4<1>; +v0x55e366ec8800_0 .net "A", 0 0, L_0x55e366f02dc0; alias, 1 drivers +v0x55e366ec88e0_0 .net "B", 0 0, L_0x55e366f02ef0; alias, 1 drivers +v0x55e366ec89a0_0 .net "Borrow", 0 0, L_0x55e366f028f0; alias, 1 drivers +v0x55e366ec8a70_0 .net "Difference", 0 0, L_0x55e366f027b0; alias, 1 drivers +v0x55e366ec8b30_0 .net "notA", 0 0, L_0x55e366f02860; 1 drivers +S_0x55e366ec8cc0 .scope module, "hf2" "halfsubtraction" 9 9, 10 1 0, S_0x55e366ec8380; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f02a00 .functor XOR 1, L_0x55e366f027b0, L_0x55e366f03020, C4<0>, C4<0>; +L_0x55e366f02b90 .functor NOT 1, L_0x55e366f027b0, C4<0>, C4<0>, C4<0>; +L_0x55e366f02c20 .functor AND 1, L_0x55e366f02b90, L_0x55e366f03020, C4<1>, C4<1>; +v0x55e366ec8f30_0 .net "A", 0 0, L_0x55e366f027b0; alias, 1 drivers +v0x55e366ec9000_0 .net "B", 0 0, L_0x55e366f03020; alias, 1 drivers +v0x55e366ec90a0_0 .net "Borrow", 0 0, L_0x55e366f02c20; alias, 1 drivers +v0x55e366ec9170_0 .net "Difference", 0 0, L_0x55e366f02a00; alias, 1 drivers +v0x55e366ec9230_0 .net "notA", 0 0, L_0x55e366f02b90; 1 drivers +S_0x55e366ec9a70 .scope module, "f2" "fullsubtraction" 8 13, 9 1 0, S_0x55e366ec6a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x55e366f03640 .functor OR 1, L_0x55e366f03250, L_0x55e366f03530, C4<0>, C4<0>; +v0x55e366ecaaa0_0 .net "A", 0 0, L_0x55e366f036d0; 1 drivers +v0x55e366ecab60_0 .net "B", 0 0, L_0x55e366f03840; 1 drivers +v0x55e366ecac30_0 .net "BorrowIN", 0 0, L_0x55e366f03970; 1 drivers +v0x55e366ecad30_0 .net "BorrowOut", 0 0, L_0x55e366f03640; 1 drivers +v0x55e366ecadd0_0 .net "Difference", 0 0, L_0x55e366f03310; 1 drivers +v0x55e366ecaec0_0 .net "tempB1", 0 0, L_0x55e366f03250; 1 drivers +v0x55e366ecaf90_0 .net "tempB2", 0 0, L_0x55e366f03530; 1 drivers +v0x55e366ecb060_0 .net "tempD", 0 0, L_0x55e366f03150; 1 drivers +S_0x55e366ec9c80 .scope module, "hf1" "halfsubtraction" 9 8, 10 1 0, S_0x55e366ec9a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f03150 .functor XOR 1, L_0x55e366f036d0, L_0x55e366f03840, C4<0>, C4<0>; +L_0x55e366f031c0 .functor NOT 1, L_0x55e366f036d0, C4<0>, C4<0>, C4<0>; +L_0x55e366f03250 .functor AND 1, L_0x55e366f031c0, L_0x55e366f03840, C4<1>, C4<1>; +v0x55e366ec9f00_0 .net "A", 0 0, L_0x55e366f036d0; alias, 1 drivers +v0x55e366ec9fc0_0 .net "B", 0 0, L_0x55e366f03840; alias, 1 drivers +v0x55e366eca080_0 .net "Borrow", 0 0, L_0x55e366f03250; alias, 1 drivers +v0x55e366eca150_0 .net "Difference", 0 0, L_0x55e366f03150; alias, 1 drivers +v0x55e366eca210_0 .net "notA", 0 0, L_0x55e366f031c0; 1 drivers +S_0x55e366eca3a0 .scope module, "hf2" "halfsubtraction" 9 9, 10 1 0, S_0x55e366ec9a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f03310 .functor XOR 1, L_0x55e366f03150, L_0x55e366f03970, C4<0>, C4<0>; +L_0x55e366f034a0 .functor NOT 1, L_0x55e366f03150, C4<0>, C4<0>, C4<0>; +L_0x55e366f03530 .functor AND 1, L_0x55e366f034a0, L_0x55e366f03970, C4<1>, C4<1>; +v0x55e366eca610_0 .net "A", 0 0, L_0x55e366f03150; alias, 1 drivers +v0x55e366eca6e0_0 .net "B", 0 0, L_0x55e366f03970; alias, 1 drivers +v0x55e366eca780_0 .net "Borrow", 0 0, L_0x55e366f03530; alias, 1 drivers +v0x55e366eca850_0 .net "Difference", 0 0, L_0x55e366f03310; alias, 1 drivers +v0x55e366eca910_0 .net "notA", 0 0, L_0x55e366f034a0; 1 drivers +S_0x55e366ecb150 .scope module, "f3" "fullsubtraction" 8 14, 9 1 0, S_0x55e366ec6a70; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "BorrowIN"; + .port_info 3 /OUTPUT 1 "Difference"; + .port_info 4 /OUTPUT 1 "BorrowOut"; +L_0x55e366f04070 .functor OR 1, L_0x55e366f03c30, L_0x55e366f03f60, C4<0>, C4<0>; +v0x55e366ecc1f0_0 .net "A", 0 0, L_0x55e366f04120; 1 drivers +v0x55e366ecc2b0_0 .net "B", 0 0, L_0x55e366f04250; 1 drivers +v0x55e366ecc380_0 .net "BorrowIN", 0 0, L_0x55e366f043e0; 1 drivers +v0x55e366ecc480_0 .net "BorrowOut", 0 0, L_0x55e366f04070; alias, 1 drivers +v0x55e366ecc520_0 .net "Difference", 0 0, L_0x55e366f03d40; 1 drivers +v0x55e366ecc610_0 .net "tempB1", 0 0, L_0x55e366f03c30; 1 drivers +v0x55e366ecc6e0_0 .net "tempB2", 0 0, L_0x55e366f03f60; 1 drivers +v0x55e366ecc7b0_0 .net "tempD", 0 0, L_0x55e366f03af0; 1 drivers +S_0x55e366ecb3b0 .scope module, "hf1" "halfsubtraction" 9 8, 10 1 0, S_0x55e366ecb150; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f03af0 .functor XOR 1, L_0x55e366f04120, L_0x55e366f04250, C4<0>, C4<0>; +L_0x55e366f03ba0 .functor NOT 1, L_0x55e366f04120, C4<0>, C4<0>, C4<0>; +L_0x55e366f03c30 .functor AND 1, L_0x55e366f03ba0, L_0x55e366f04250, C4<1>, C4<1>; +v0x55e366ecb630_0 .net "A", 0 0, L_0x55e366f04120; alias, 1 drivers +v0x55e366ecb710_0 .net "B", 0 0, L_0x55e366f04250; alias, 1 drivers +v0x55e366ecb7d0_0 .net "Borrow", 0 0, L_0x55e366f03c30; alias, 1 drivers +v0x55e366ecb8a0_0 .net "Difference", 0 0, L_0x55e366f03af0; alias, 1 drivers +v0x55e366ecb960_0 .net "notA", 0 0, L_0x55e366f03ba0; 1 drivers +S_0x55e366ecbaf0 .scope module, "hf2" "halfsubtraction" 9 9, 10 1 0, S_0x55e366ecb150; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Difference"; + .port_info 3 /OUTPUT 1 "Borrow"; +L_0x55e366f03d40 .functor XOR 1, L_0x55e366f03af0, L_0x55e366f043e0, C4<0>, C4<0>; +L_0x55e366f03ed0 .functor NOT 1, L_0x55e366f03af0, C4<0>, C4<0>, C4<0>; +L_0x55e366f03f60 .functor AND 1, L_0x55e366f03ed0, L_0x55e366f043e0, C4<1>, C4<1>; +v0x55e366ecbd60_0 .net "A", 0 0, L_0x55e366f03af0; alias, 1 drivers +v0x55e366ecbe30_0 .net "B", 0 0, L_0x55e366f043e0; alias, 1 drivers +v0x55e366ecbed0_0 .net "Borrow", 0 0, L_0x55e366f03f60; alias, 1 drivers +v0x55e366ecbfa0_0 .net "Difference", 0 0, L_0x55e366f03d40; alias, 1 drivers +v0x55e366ecc060_0 .net "notA", 0 0, L_0x55e366f03ed0; 1 drivers +S_0x55e366ecf690 .scope module, "btod1" "BinaryToBCD" 3 76, 11 1 0, S_0x55e366eb6430; + .timescale 0 0; + .port_info 0 /INPUT 8 "binary"; + .port_info 1 /OUTPUT 12 "bcd"; +L_0x7f547236c450 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f547236c498 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f23a00 .functor AND 1, L_0x7f547236c450, L_0x7f547236c498, C4<1>, C4<1>; +L_0x7f547236c4e0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f547236c528 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f23b60 .functor AND 1, L_0x7f547236c4e0, L_0x7f547236c528, C4<1>, C4<1>; +L_0x7f547236c570 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f547236c5b8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f23cc0 .functor AND 1, L_0x7f547236c570, L_0x7f547236c5b8, C4<1>, C4<1>; +L_0x7f547236c600 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x7f547236c648 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f23dd0 .functor AND 1, L_0x7f547236c600, L_0x7f547236c648, C4<1>, C4<1>; +L_0x7f547236c690 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f29940 .functor OR 1, L_0x55e366f29a00, L_0x7f547236c690, C4<0>, C4<0>; +v0x55e366ed61c0_0 .net/2u *"_ivl_0", 0 0, L_0x7f547236c450; 1 drivers +v0x55e366ed62c0_0 .net/2u *"_ivl_10", 0 0, L_0x7f547236c570; 1 drivers +v0x55e366ed63a0_0 .net/2u *"_ivl_12", 0 0, L_0x7f547236c5b8; 1 drivers +v0x55e366ed6460_0 .net *"_ivl_132", 0 0, L_0x55e366f29940; 1 drivers +v0x55e366ed6540_0 .net *"_ivl_136", 0 0, L_0x55e366f29a00; 1 drivers +v0x55e366ed6620_0 .net/2u *"_ivl_137", 0 0, L_0x7f547236c690; 1 drivers +v0x55e366ed6700_0 .net *"_ivl_14", 0 0, L_0x55e366f23dd0; 1 drivers +o0x7f54723b9ab8 .functor BUFZ 1, C4; HiZ drive +; Elide local net with no drivers, v0x55e366ed67e0_0 name=_ivl_141 +v0x55e366ed68c0_0 .net/2u *"_ivl_16", 0 0, L_0x7f547236c600; 1 drivers +v0x55e366ed6a30_0 .net/2u *"_ivl_18", 0 0, L_0x7f547236c648; 1 drivers +v0x55e366ed6b10_0 .net/2u *"_ivl_2", 0 0, L_0x7f547236c498; 1 drivers +v0x55e366ed6bf0_0 .net/2u *"_ivl_4", 0 0, L_0x7f547236c4e0; 1 drivers +v0x55e366ed6cd0_0 .net/2u *"_ivl_6", 0 0, L_0x7f547236c528; 1 drivers +v0x55e366ed6db0_0 .net *"_ivl_8", 0 0, L_0x55e366f23cc0; 1 drivers +v0x55e366ed6e90_0 .net "bcd", 11 0, L_0x55e366f29560; alias, 1 drivers +v0x55e366ed6f70_0 .net "binary", 7 0, L_0x55e366f23080; alias, 1 drivers +v0x55e366ed7050_0 .net "dab1", 3 0, L_0x55e366f247a0; 1 drivers +v0x55e366ed7130_0 .net "dab2", 3 0, L_0x55e366f25500; 1 drivers +v0x55e366ed7210_0 .net "dab3", 3 0, L_0x55e366f262e0; 1 drivers +v0x55e366ed72f0_0 .net "dab4", 3 0, L_0x55e366f29e20; 1 drivers +v0x55e366ed73d0_0 .net "dab5", 3 0, L_0x55e366f27a00; 1 drivers +v0x55e366ed74b0_0 .net "empty1", 0 0, L_0x55e366f23a00; 1 drivers +v0x55e366ed7550_0 .net "empty2", 0 0, L_0x55e366f23b60; 1 drivers +L_0x55e366f245c0 .part L_0x55e366f23080, 7, 1; +L_0x55e366f24660 .part L_0x55e366f23080, 6, 1; +L_0x55e366f24700 .part L_0x55e366f23080, 5, 1; +L_0x55e366f247a0 .concat8 [ 1 1 1 1], L_0x55e366f24200, L_0x55e366f24330, L_0x55e366f24490, L_0x55e366f24500; +L_0x55e366f25110 .part L_0x55e366f247a0, 1, 1; +L_0x55e366f25240 .part L_0x55e366f247a0, 2, 1; +L_0x55e366f252e0 .part L_0x55e366f247a0, 3, 1; +L_0x55e366f25410 .part L_0x55e366f23080, 4, 1; +L_0x55e366f25500 .concat8 [ 1 1 1 1], L_0x55e366f24cf0, L_0x55e366f24e20, L_0x55e366f24f80, L_0x55e366f24ff0; +L_0x55e366f25e70 .part L_0x55e366f25500, 1, 1; +L_0x55e366f26000 .part L_0x55e366f25500, 2, 1; +L_0x55e366f260a0 .part L_0x55e366f25500, 3, 1; +L_0x55e366f26240 .part L_0x55e366f23080, 3, 1; +L_0x55e366f262e0 .concat8 [ 1 1 1 1], L_0x55e366f25a50, L_0x55e366f25b80, L_0x55e366f25ce0, L_0x55e366f25d50; +L_0x55e366f26ba0 .part L_0x55e366f247a0, 0, 1; +L_0x55e366f26c40 .part L_0x55e366f25500, 0, 1; +L_0x55e366f26d70 .part L_0x55e366f262e0, 0, 1; +L_0x55e366f27640 .part L_0x55e366f262e0, 1, 1; +L_0x55e366f27810 .part L_0x55e366f262e0, 2, 1; +L_0x55e366f278b0 .part L_0x55e366f262e0, 3, 1; +L_0x55e366f27770 .part L_0x55e366f23080, 2, 1; +L_0x55e366f27a00 .concat8 [ 1 1 1 1], L_0x55e366f27220, L_0x55e366f27350, L_0x55e366f274b0, L_0x55e366f27520; +L_0x55e366f28370 .part L_0x55e366f29e20, 1, 1; +L_0x55e366f28410 .part L_0x55e366f29e20, 2, 1; +L_0x55e366f28580 .part L_0x55e366f29e20, 3, 1; +L_0x55e366f28620 .part L_0x55e366f27a00, 0, 1; +L_0x55e366f28fd0 .part L_0x55e366f27a00, 1, 1; +L_0x55e366f29100 .part L_0x55e366f27a00, 2, 1; +L_0x55e366f29320 .part L_0x55e366f27a00, 3, 1; +L_0x55e366f293c0 .part L_0x55e366f23080, 1, 1; +LS_0x55e366f29560_0_0 .concat8 [ 1 1 1 1], L_0x55e366f29940, L_0x55e366f28eb0, L_0x55e366f28e40, L_0x55e366f28ce0; +LS_0x55e366f29560_0_4 .concat8 [ 1 1 1 1], L_0x55e366f28bb0, L_0x55e366f28250, L_0x55e366f281e0, L_0x55e366f28080; +LS_0x55e366f29560_0_8 .concat8 [ 1 1 1 1], L_0x55e366f27f50, L_0x55e366f267e0, L_0x55e366f23dd0, L_0x55e366f23cc0; +L_0x55e366f29560 .concat8 [ 4 4 4 0], LS_0x55e366f29560_0_0, LS_0x55e366f29560_0_4, LS_0x55e366f29560_0_8; +L_0x55e366f29a00 .part L_0x55e366f23080, 0, 1; +L_0x55e366f29e20 .concat [ 1 1 1 1], o0x7f54723b9ab8, L_0x55e366f26910, L_0x55e366f26a70, L_0x55e366f26ae0; +S_0x55e366ecf840 .scope module, "d1t" "dabble" 11 14, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f23ee0 .functor XOR 1, L_0x55e366f23a00, L_0x55e366f24700, C4<0>, C4<0>; +L_0x55e366f23f50 .functor NOR 1, L_0x55e366f23a00, L_0x55e366f245c0, C4<0>, C4<0>; +L_0x55e366f23fc0 .functor XOR 1, L_0x55e366f23a00, L_0x55e366f24660, C4<0>, C4<0>; +L_0x55e366f24030 .functor NOR 1, L_0x55e366f23ee0, L_0x55e366f23fc0, C4<0>, C4<0>; +L_0x55e366f240f0 .functor NOR 1, L_0x55e366f24030, L_0x55e366f23f50, C4<0>, C4<0>; +L_0x55e366f24200 .functor BUF 1, L_0x55e366f240f0, C4<0>, C4<0>, C4<0>; +L_0x55e366f242c0 .functor OR 1, L_0x55e366f23ee0, L_0x55e366f23f50, C4<0>, C4<0>; +L_0x55e366f24330 .functor NOR 1, L_0x55e366f242c0, L_0x55e366f24660, C4<0>, C4<0>; +L_0x55e366f24490 .functor AND 1, L_0x55e366f242c0, L_0x55e366f23fc0, C4<1>, C4<1>; +L_0x55e366f24500 .functor XOR 1, L_0x55e366f240f0, L_0x55e366f24700, C4<0>, C4<0>; +v0x55e366ecfb60_0 .net "A", 0 0, L_0x55e366f23a00; alias, 1 drivers +v0x55e366ecfc40_0 .net "B", 0 0, L_0x55e366f245c0; 1 drivers +v0x55e366ecfd00_0 .net "C", 0 0, L_0x55e366f24660; 1 drivers +v0x55e366ecfda0_0 .net "D", 0 0, L_0x55e366f24700; 1 drivers +v0x55e366ecfe60_0 .net "E", 0 0, L_0x55e366f24500; 1 drivers +v0x55e366ecff70_0 .net "X", 0 0, L_0x55e366f24200; 1 drivers +v0x55e366ed0030_0 .net "Y", 0 0, L_0x55e366f24330; 1 drivers +v0x55e366ed00f0_0 .net "Z", 0 0, L_0x55e366f24490; 1 drivers +v0x55e366ed01b0_0 .net "nor1", 0 0, L_0x55e366f23f50; 1 drivers +v0x55e366ed0270_0 .net "nor2", 0 0, L_0x55e366f24030; 1 drivers +v0x55e366ed0330_0 .net "nor3", 0 0, L_0x55e366f240f0; 1 drivers +v0x55e366ed03f0_0 .net "or1", 0 0, L_0x55e366f242c0; 1 drivers +v0x55e366ed04b0_0 .net "xor1", 0 0, L_0x55e366f23ee0; 1 drivers +v0x55e366ed0570_0 .net "xor2", 0 0, L_0x55e366f23fc0; 1 drivers +S_0x55e366ed0730 .scope module, "d2u" "dabble" 11 23, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f24930 .functor XOR 1, L_0x55e366f25110, L_0x55e366f25410, C4<0>, C4<0>; +L_0x55e366f249a0 .functor NOR 1, L_0x55e366f25110, L_0x55e366f25240, C4<0>, C4<0>; +L_0x55e366f24a60 .functor XOR 1, L_0x55e366f25110, L_0x55e366f252e0, C4<0>, C4<0>; +L_0x55e366f24ad0 .functor NOR 1, L_0x55e366f24930, L_0x55e366f24a60, C4<0>, C4<0>; +L_0x55e366f24be0 .functor NOR 1, L_0x55e366f24ad0, L_0x55e366f249a0, C4<0>, C4<0>; +L_0x55e366f24cf0 .functor BUF 1, L_0x55e366f24be0, C4<0>, C4<0>, C4<0>; +L_0x55e366f24db0 .functor OR 1, L_0x55e366f24930, L_0x55e366f249a0, C4<0>, C4<0>; +L_0x55e366f24e20 .functor NOR 1, L_0x55e366f24db0, L_0x55e366f252e0, C4<0>, C4<0>; +L_0x55e366f24f80 .functor AND 1, L_0x55e366f24db0, L_0x55e366f24a60, C4<1>, C4<1>; +L_0x55e366f24ff0 .functor XOR 1, L_0x55e366f24be0, L_0x55e366f25410, C4<0>, C4<0>; +v0x55e366ed0a00_0 .net "A", 0 0, L_0x55e366f25110; 1 drivers +v0x55e366ed0ac0_0 .net "B", 0 0, L_0x55e366f25240; 1 drivers +v0x55e366ed0b80_0 .net "C", 0 0, L_0x55e366f252e0; 1 drivers +v0x55e366ed0c20_0 .net "D", 0 0, L_0x55e366f25410; 1 drivers +v0x55e366ed0ce0_0 .net "E", 0 0, L_0x55e366f24ff0; 1 drivers +v0x55e366ed0df0_0 .net "X", 0 0, L_0x55e366f24cf0; 1 drivers +v0x55e366ed0eb0_0 .net "Y", 0 0, L_0x55e366f24e20; 1 drivers +v0x55e366ed0f70_0 .net "Z", 0 0, L_0x55e366f24f80; 1 drivers +v0x55e366ed1030_0 .net "nor1", 0 0, L_0x55e366f249a0; 1 drivers +v0x55e366ed1180_0 .net "nor2", 0 0, L_0x55e366f24ad0; 1 drivers +v0x55e366ed1240_0 .net "nor3", 0 0, L_0x55e366f24be0; 1 drivers +v0x55e366ed1300_0 .net "or1", 0 0, L_0x55e366f24db0; 1 drivers +v0x55e366ed13c0_0 .net "xor1", 0 0, L_0x55e366f24930; 1 drivers +v0x55e366ed1480_0 .net "xor2", 0 0, L_0x55e366f24a60; 1 drivers +S_0x55e366ed1640 .scope module, "d3v" "dabble" 11 32, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f25690 .functor XOR 1, L_0x55e366f25e70, L_0x55e366f26240, C4<0>, C4<0>; +L_0x55e366f25700 .functor NOR 1, L_0x55e366f25e70, L_0x55e366f26000, C4<0>, C4<0>; +L_0x55e366f257c0 .functor XOR 1, L_0x55e366f25e70, L_0x55e366f260a0, C4<0>, C4<0>; +L_0x55e366f25830 .functor NOR 1, L_0x55e366f25690, L_0x55e366f257c0, C4<0>, C4<0>; +L_0x55e366f25940 .functor NOR 1, L_0x55e366f25830, L_0x55e366f25700, C4<0>, C4<0>; +L_0x55e366f25a50 .functor BUF 1, L_0x55e366f25940, C4<0>, C4<0>, C4<0>; +L_0x55e366f25b10 .functor OR 1, L_0x55e366f25690, L_0x55e366f25700, C4<0>, C4<0>; +L_0x55e366f25b80 .functor NOR 1, L_0x55e366f25b10, L_0x55e366f260a0, C4<0>, C4<0>; +L_0x55e366f25ce0 .functor AND 1, L_0x55e366f25b10, L_0x55e366f257c0, C4<1>, C4<1>; +L_0x55e366f25d50 .functor XOR 1, L_0x55e366f25940, L_0x55e366f26240, C4<0>, C4<0>; +v0x55e366ed18f0_0 .net "A", 0 0, L_0x55e366f25e70; 1 drivers +v0x55e366ed19b0_0 .net "B", 0 0, L_0x55e366f26000; 1 drivers +v0x55e366ed1a70_0 .net "C", 0 0, L_0x55e366f260a0; 1 drivers +v0x55e366ed1b10_0 .net "D", 0 0, L_0x55e366f26240; 1 drivers +v0x55e366ed1bd0_0 .net "E", 0 0, L_0x55e366f25d50; 1 drivers +v0x55e366ed1ce0_0 .net "X", 0 0, L_0x55e366f25a50; 1 drivers +v0x55e366ed1da0_0 .net "Y", 0 0, L_0x55e366f25b80; 1 drivers +v0x55e366ed1e60_0 .net "Z", 0 0, L_0x55e366f25ce0; 1 drivers +v0x55e366ed1f20_0 .net "nor1", 0 0, L_0x55e366f25700; 1 drivers +v0x55e366ed2070_0 .net "nor2", 0 0, L_0x55e366f25830; 1 drivers +v0x55e366ed2130_0 .net "nor3", 0 0, L_0x55e366f25940; 1 drivers +v0x55e366ed21f0_0 .net "or1", 0 0, L_0x55e366f25b10; 1 drivers +v0x55e366ed22b0_0 .net "xor1", 0 0, L_0x55e366f25690; 1 drivers +v0x55e366ed2370_0 .net "xor2", 0 0, L_0x55e366f257c0; 1 drivers +S_0x55e366ed2530 .scope module, "d4w" "dabble" 11 41, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f261d0 .functor XOR 1, L_0x55e366f23b60, L_0x55e366f26d70, C4<0>, C4<0>; +L_0x55e366f264a0 .functor NOR 1, L_0x55e366f23b60, L_0x55e366f26ba0, C4<0>, C4<0>; +L_0x55e366f265a0 .functor XOR 1, L_0x55e366f23b60, L_0x55e366f26c40, C4<0>, C4<0>; +L_0x55e366f26610 .functor NOR 1, L_0x55e366f261d0, L_0x55e366f265a0, C4<0>, C4<0>; +L_0x55e366f266d0 .functor NOR 1, L_0x55e366f26610, L_0x55e366f264a0, C4<0>, C4<0>; +L_0x55e366f267e0 .functor BUF 1, L_0x55e366f266d0, C4<0>, C4<0>, C4<0>; +L_0x55e366f268a0 .functor OR 1, L_0x55e366f261d0, L_0x55e366f264a0, C4<0>, C4<0>; +L_0x55e366f26910 .functor NOR 1, L_0x55e366f268a0, L_0x55e366f26c40, C4<0>, C4<0>; +L_0x55e366f26a70 .functor AND 1, L_0x55e366f268a0, L_0x55e366f265a0, C4<1>, C4<1>; +L_0x55e366f26ae0 .functor XOR 1, L_0x55e366f266d0, L_0x55e366f26d70, C4<0>, C4<0>; +v0x55e366ed27e0_0 .net "A", 0 0, L_0x55e366f23b60; alias, 1 drivers +v0x55e366ed28c0_0 .net "B", 0 0, L_0x55e366f26ba0; 1 drivers +v0x55e366ed2980_0 .net "C", 0 0, L_0x55e366f26c40; 1 drivers +v0x55e366ed2a20_0 .net "D", 0 0, L_0x55e366f26d70; 1 drivers +v0x55e366ed2ae0_0 .net "E", 0 0, L_0x55e366f26ae0; 1 drivers +v0x55e366ed2bf0_0 .net "X", 0 0, L_0x55e366f267e0; 1 drivers +v0x55e366ed2cb0_0 .net "Y", 0 0, L_0x55e366f26910; 1 drivers +v0x55e366ed2d70_0 .net "Z", 0 0, L_0x55e366f26a70; 1 drivers +v0x55e366ed2e30_0 .net "nor1", 0 0, L_0x55e366f264a0; 1 drivers +v0x55e366ed2f80_0 .net "nor2", 0 0, L_0x55e366f26610; 1 drivers +v0x55e366ed3040_0 .net "nor3", 0 0, L_0x55e366f266d0; 1 drivers +v0x55e366ed3100_0 .net "or1", 0 0, L_0x55e366f268a0; 1 drivers +v0x55e366ed31c0_0 .net "xor1", 0 0, L_0x55e366f261d0; 1 drivers +v0x55e366ed3280_0 .net "xor2", 0 0, L_0x55e366f265a0; 1 drivers +S_0x55e366ed3440 .scope module, "d5x" "dabble" 11 50, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f26e60 .functor XOR 1, L_0x55e366f27640, L_0x55e366f27770, C4<0>, C4<0>; +L_0x55e366f26ed0 .functor NOR 1, L_0x55e366f27640, L_0x55e366f27810, C4<0>, C4<0>; +L_0x55e366f26f90 .functor XOR 1, L_0x55e366f27640, L_0x55e366f278b0, C4<0>, C4<0>; +L_0x55e366f27000 .functor NOR 1, L_0x55e366f26e60, L_0x55e366f26f90, C4<0>, C4<0>; +L_0x55e366f27110 .functor NOR 1, L_0x55e366f27000, L_0x55e366f26ed0, C4<0>, C4<0>; +L_0x55e366f27220 .functor BUF 1, L_0x55e366f27110, C4<0>, C4<0>, C4<0>; +L_0x55e366f272e0 .functor OR 1, L_0x55e366f26e60, L_0x55e366f26ed0, C4<0>, C4<0>; +L_0x55e366f27350 .functor NOR 1, L_0x55e366f272e0, L_0x55e366f278b0, C4<0>, C4<0>; +L_0x55e366f274b0 .functor AND 1, L_0x55e366f272e0, L_0x55e366f26f90, C4<1>, C4<1>; +L_0x55e366f27520 .functor XOR 1, L_0x55e366f27110, L_0x55e366f27770, C4<0>, C4<0>; +v0x55e366ed3740_0 .net "A", 0 0, L_0x55e366f27640; 1 drivers +v0x55e366ed3820_0 .net "B", 0 0, L_0x55e366f27810; 1 drivers +v0x55e366ed38e0_0 .net "C", 0 0, L_0x55e366f278b0; 1 drivers +v0x55e366ed3980_0 .net "D", 0 0, L_0x55e366f27770; 1 drivers +v0x55e366ed3a40_0 .net "E", 0 0, L_0x55e366f27520; 1 drivers +v0x55e366ed3b50_0 .net "X", 0 0, L_0x55e366f27220; 1 drivers +v0x55e366ed3c10_0 .net "Y", 0 0, L_0x55e366f27350; 1 drivers +v0x55e366ed3cd0_0 .net "Z", 0 0, L_0x55e366f274b0; 1 drivers +v0x55e366ed3d90_0 .net "nor1", 0 0, L_0x55e366f26ed0; 1 drivers +v0x55e366ed3ee0_0 .net "nor2", 0 0, L_0x55e366f27000; 1 drivers +v0x55e366ed3fa0_0 .net "nor3", 0 0, L_0x55e366f27110; 1 drivers +v0x55e366ed4060_0 .net "or1", 0 0, L_0x55e366f272e0; 1 drivers +v0x55e366ed4120_0 .net "xor1", 0 0, L_0x55e366f26e60; 1 drivers +v0x55e366ed41e0_0 .net "xor2", 0 0, L_0x55e366f26f90; 1 drivers +S_0x55e366ed43a0 .scope module, "d6y" "dabble" 11 59, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f27950 .functor XOR 1, L_0x55e366f28370, L_0x55e366f28620, C4<0>, C4<0>; +L_0x55e366f27c00 .functor NOR 1, L_0x55e366f28370, L_0x55e366f28410, C4<0>, C4<0>; +L_0x55e366f27cc0 .functor XOR 1, L_0x55e366f28370, L_0x55e366f28580, C4<0>, C4<0>; +L_0x55e366f27d30 .functor NOR 1, L_0x55e366f27950, L_0x55e366f27cc0, C4<0>, C4<0>; +L_0x55e366f27e40 .functor NOR 1, L_0x55e366f27d30, L_0x55e366f27c00, C4<0>, C4<0>; +L_0x55e366f27f50 .functor BUF 1, L_0x55e366f27e40, C4<0>, C4<0>, C4<0>; +L_0x55e366f28010 .functor OR 1, L_0x55e366f27950, L_0x55e366f27c00, C4<0>, C4<0>; +L_0x55e366f28080 .functor NOR 1, L_0x55e366f28010, L_0x55e366f28580, C4<0>, C4<0>; +L_0x55e366f281e0 .functor AND 1, L_0x55e366f28010, L_0x55e366f27cc0, C4<1>, C4<1>; +L_0x55e366f28250 .functor XOR 1, L_0x55e366f27e40, L_0x55e366f28620, C4<0>, C4<0>; +v0x55e366ed4650_0 .net "A", 0 0, L_0x55e366f28370; 1 drivers +v0x55e366ed4730_0 .net "B", 0 0, L_0x55e366f28410; 1 drivers +v0x55e366ed47f0_0 .net "C", 0 0, L_0x55e366f28580; 1 drivers +v0x55e366ed4890_0 .net "D", 0 0, L_0x55e366f28620; 1 drivers +v0x55e366ed4950_0 .net "E", 0 0, L_0x55e366f28250; 1 drivers +v0x55e366ed4a60_0 .net "X", 0 0, L_0x55e366f27f50; 1 drivers +v0x55e366ed4b20_0 .net "Y", 0 0, L_0x55e366f28080; 1 drivers +v0x55e366ed4be0_0 .net "Z", 0 0, L_0x55e366f281e0; 1 drivers +v0x55e366ed4ca0_0 .net "nor1", 0 0, L_0x55e366f27c00; 1 drivers +v0x55e366ed4df0_0 .net "nor2", 0 0, L_0x55e366f27d30; 1 drivers +v0x55e366ed4eb0_0 .net "nor3", 0 0, L_0x55e366f27e40; 1 drivers +v0x55e366ed4f70_0 .net "or1", 0 0, L_0x55e366f28010; 1 drivers +v0x55e366ed5030_0 .net "xor1", 0 0, L_0x55e366f27950; 1 drivers +v0x55e366ed50f0_0 .net "xor2", 0 0, L_0x55e366f27cc0; 1 drivers +S_0x55e366ed52b0 .scope module, "d7z" "dabble" 11 68, 12 1 0, S_0x55e366ecf690; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "C"; + .port_info 3 /INPUT 1 "D"; + .port_info 4 /OUTPUT 1 "X"; + .port_info 5 /OUTPUT 1 "Y"; + .port_info 6 /OUTPUT 1 "Z"; + .port_info 7 /OUTPUT 1 "E"; +L_0x55e366f287f0 .functor XOR 1, L_0x55e366f28fd0, L_0x55e366f293c0, C4<0>, C4<0>; +L_0x55e366f28860 .functor NOR 1, L_0x55e366f28fd0, L_0x55e366f29100, C4<0>, C4<0>; +L_0x55e366f28920 .functor XOR 1, L_0x55e366f28fd0, L_0x55e366f29320, C4<0>, C4<0>; +L_0x55e366f28990 .functor NOR 1, L_0x55e366f287f0, L_0x55e366f28920, C4<0>, C4<0>; +L_0x55e366f28aa0 .functor NOR 1, L_0x55e366f28990, L_0x55e366f28860, C4<0>, C4<0>; +L_0x55e366f28bb0 .functor BUF 1, L_0x55e366f28aa0, C4<0>, C4<0>, C4<0>; +L_0x55e366f28c70 .functor OR 1, L_0x55e366f287f0, L_0x55e366f28860, C4<0>, C4<0>; +L_0x55e366f28ce0 .functor NOR 1, L_0x55e366f28c70, L_0x55e366f29320, C4<0>, C4<0>; +L_0x55e366f28e40 .functor AND 1, L_0x55e366f28c70, L_0x55e366f28920, C4<1>, C4<1>; +L_0x55e366f28eb0 .functor XOR 1, L_0x55e366f28aa0, L_0x55e366f293c0, C4<0>, C4<0>; +v0x55e366ed5560_0 .net "A", 0 0, L_0x55e366f28fd0; 1 drivers +v0x55e366ed5640_0 .net "B", 0 0, L_0x55e366f29100; 1 drivers +v0x55e366ed5700_0 .net "C", 0 0, L_0x55e366f29320; 1 drivers +v0x55e366ed57a0_0 .net "D", 0 0, L_0x55e366f293c0; 1 drivers +v0x55e366ed5860_0 .net "E", 0 0, L_0x55e366f28eb0; 1 drivers +v0x55e366ed5970_0 .net "X", 0 0, L_0x55e366f28bb0; 1 drivers +v0x55e366ed5a30_0 .net "Y", 0 0, L_0x55e366f28ce0; 1 drivers +v0x55e366ed5af0_0 .net "Z", 0 0, L_0x55e366f28e40; 1 drivers +v0x55e366ed5bb0_0 .net "nor1", 0 0, L_0x55e366f28860; 1 drivers +v0x55e366ed5d00_0 .net "nor2", 0 0, L_0x55e366f28990; 1 drivers +v0x55e366ed5dc0_0 .net "nor3", 0 0, L_0x55e366f28aa0; 1 drivers +v0x55e366ed5e80_0 .net "or1", 0 0, L_0x55e366f28c70; 1 drivers +v0x55e366ed5f40_0 .net "xor1", 0 0, L_0x55e366f287f0; 1 drivers +v0x55e366ed6000_0 .net "xor2", 0 0, L_0x55e366f28920; 1 drivers +S_0x55e366ed7610 .scope module, "lU" "logicUnit" 3 21, 13 1 0, S_0x55e366eb6430; + .timescale 0 0; + .port_info 0 /INPUT 3 "opCode"; + .port_info 1 /INPUT 4 "A"; + .port_info 2 /INPUT 4 "B"; + .port_info 3 /OUTPUT 4 "resultA"; + .port_info 4 /OUTPUT 4 "resultO"; + .port_info 5 /OUTPUT 4 "resultX"; +L_0x55e366f06740 .functor AND 1, L_0x55e366f067b0, L_0x55e366f068a0, C4<1>, C4<1>; +L_0x55e366f06990 .functor AND 1, L_0x55e366f06a00, L_0x55e366f06af0, C4<1>, C4<1>; +L_0x55e366f06df0 .functor AND 1, L_0x55e366f06e60, L_0x55e366f06f50, C4<1>, C4<1>; +L_0x55e366f07210 .functor AND 1, L_0x55e366f072d0, L_0x55e366f07410, C4<1>, C4<1>; +L_0x55e366f07500 .functor OR 1, L_0x55e366f07570, L_0x55e366f076c0, C4<0>, C4<0>; +L_0x55e366f07760 .functor OR 1, L_0x55e366f077d0, L_0x55e366f07930, C4<0>, C4<0>; +L_0x55e366f07a20 .functor OR 1, L_0x55e366f07a90, L_0x55e366f07c00, C4<0>, C4<0>; +L_0x55e366f078c0 .functor OR 1, L_0x55e366f07fb0, L_0x55e366f080a0, C4<0>, C4<0>; +L_0x55e366f08230 .functor XOR 1, L_0x55e366f082a0, L_0x55e366f08390, C4<0>, C4<0>; +L_0x55e366f08530 .functor XOR 1, L_0x55e366f08190, L_0x55e366f08600, C4<0>, C4<0>; +L_0x55e366f087b0 .functor XOR 1, L_0x55e366f08820, L_0x55e366f08910, C4<0>, C4<0>; +L_0x55e366f08c60 .functor XOR 1, L_0x55e366f08d90, L_0x55e366f08f60, C4<0>, C4<0>; +L_0x55e366f09050 .functor AND 1, L_0x55e366f090c0, L_0x55e366f092a0, C4<1>, C4<1>; +L_0x55e366f093e0 .functor AND 1, L_0x55e366f094d0, L_0x55e366f09710, C4<1>, C4<1>; +L_0x55e366f08d20 .functor AND 1, L_0x55e366f09800, L_0x55e366f09a00, C4<1>, C4<1>; +L_0x55e366f09da0 .functor AND 1, L_0x55e366f09ef0, L_0x55e366f09fe0, C4<1>, C4<1>; +L_0x55e366f09c80 .functor AND 1, L_0x55e366f09cf0, L_0x55e366f0a200, C4<1>, C4<1>; +L_0x55e366f0a480 .functor AND 1, L_0x55e366f0a590, L_0x55e366f0a680, C4<1>, C4<1>; +L_0x55e366f0a8c0 .functor AND 1, L_0x55e366f0a930, L_0x55e366f0aa20, C4<1>, C4<1>; +L_0x55e366f0ae00 .functor AND 1, L_0x55e366f0a4f0, L_0x55e366f0b130, C4<1>, C4<1>; +L_0x55e366f0b220 .functor AND 1, L_0x55e366f0b290, L_0x55e366f0b500, C4<1>, C4<1>; +L_0x55e366f0b640 .functor AND 1, L_0x55e366f0b770, L_0x55e366f0b9f0, C4<1>, C4<1>; +L_0x55e366f0bae0 .functor AND 1, L_0x55e366f0bb50, L_0x55e366f0bde0, C4<1>, C4<1>; +L_0x55e366f0c210 .functor AND 1, L_0x55e366f0c3a0, L_0x55e366f0c490, C4<1>, C4<1>; +v0x55e366ed7870_0 .net "A", 3 0, v0x55e366efdb20_0; alias, 1 drivers +v0x55e366ed7910_0 .net "B", 3 0, v0x55e366efdc00_0; alias, 1 drivers +v0x55e366ed79d0_0 .net *"_ivl_0", 0 0, L_0x55e366f06740; 1 drivers +v0x55e366ed7ac0_0 .net *"_ivl_100", 0 0, L_0x55e366f09c80; 1 drivers +v0x55e366ed7ba0_0 .net *"_ivl_103", 0 0, L_0x55e366f09cf0; 1 drivers +v0x55e366ed7cd0_0 .net *"_ivl_105", 0 0, L_0x55e366f0a200; 1 drivers +v0x55e366ed7db0_0 .net *"_ivl_106", 0 0, L_0x55e366f0a480; 1 drivers +v0x55e366ed7e90_0 .net *"_ivl_109", 0 0, L_0x55e366f0a590; 1 drivers +v0x55e366ed7f70_0 .net *"_ivl_11", 0 0, L_0x55e366f06af0; 1 drivers +v0x55e366ed8050_0 .net *"_ivl_111", 0 0, L_0x55e366f0a680; 1 drivers +v0x55e366ed8130_0 .net *"_ivl_112", 0 0, L_0x55e366f0a8c0; 1 drivers +v0x55e366ed8210_0 .net *"_ivl_115", 0 0, L_0x55e366f0a930; 1 drivers +v0x55e366ed82f0_0 .net *"_ivl_117", 0 0, L_0x55e366f0aa20; 1 drivers +v0x55e366ed83d0_0 .net *"_ivl_118", 0 0, L_0x55e366f0ae00; 1 drivers +v0x55e366ed84b0_0 .net *"_ivl_12", 0 0, L_0x55e366f06df0; 1 drivers +v0x55e366ed8590_0 .net *"_ivl_122", 0 0, L_0x55e366f0a4f0; 1 drivers +v0x55e366ed8670_0 .net *"_ivl_124", 0 0, L_0x55e366f0b130; 1 drivers +v0x55e366ed8750_0 .net *"_ivl_125", 0 0, L_0x55e366f0b220; 1 drivers +v0x55e366ed8830_0 .net *"_ivl_128", 0 0, L_0x55e366f0b290; 1 drivers +v0x55e366ed8910_0 .net *"_ivl_130", 0 0, L_0x55e366f0b500; 1 drivers +v0x55e366ed89f0_0 .net *"_ivl_131", 0 0, L_0x55e366f0b640; 1 drivers +v0x55e366ed8ad0_0 .net *"_ivl_134", 0 0, L_0x55e366f0b770; 1 drivers +v0x55e366ed8bb0_0 .net *"_ivl_136", 0 0, L_0x55e366f0b9f0; 1 drivers +v0x55e366ed8c90_0 .net *"_ivl_137", 0 0, L_0x55e366f0bae0; 1 drivers +v0x55e366ed8d70_0 .net *"_ivl_140", 0 0, L_0x55e366f0bb50; 1 drivers +v0x55e366ed8e50_0 .net *"_ivl_142", 0 0, L_0x55e366f0bde0; 1 drivers +v0x55e366ed8f30_0 .net *"_ivl_143", 0 0, L_0x55e366f0c210; 1 drivers +v0x55e366ed9010_0 .net *"_ivl_147", 0 0, L_0x55e366f0c3a0; 1 drivers +v0x55e366ed90f0_0 .net *"_ivl_149", 0 0, L_0x55e366f0c490; 1 drivers +v0x55e366ed91d0_0 .net *"_ivl_15", 0 0, L_0x55e366f06e60; 1 drivers +v0x55e366ed92b0_0 .net *"_ivl_17", 0 0, L_0x55e366f06f50; 1 drivers +v0x55e366ed9390_0 .net *"_ivl_18", 0 0, L_0x55e366f07210; 1 drivers +v0x55e366ed9470_0 .net *"_ivl_22", 0 0, L_0x55e366f072d0; 1 drivers +v0x55e366ed9760_0 .net *"_ivl_24", 0 0, L_0x55e366f07410; 1 drivers +v0x55e366ed9840_0 .net *"_ivl_25", 0 0, L_0x55e366f07500; 1 drivers +v0x55e366ed9920_0 .net *"_ivl_28", 0 0, L_0x55e366f07570; 1 drivers +v0x55e366ed9a00_0 .net *"_ivl_3", 0 0, L_0x55e366f067b0; 1 drivers +v0x55e366ed9ae0_0 .net *"_ivl_30", 0 0, L_0x55e366f076c0; 1 drivers +v0x55e366ed9bc0_0 .net *"_ivl_31", 0 0, L_0x55e366f07760; 1 drivers +v0x55e366ed9ca0_0 .net *"_ivl_34", 0 0, L_0x55e366f077d0; 1 drivers +v0x55e366ed9d80_0 .net *"_ivl_36", 0 0, L_0x55e366f07930; 1 drivers +v0x55e366ed9e60_0 .net *"_ivl_37", 0 0, L_0x55e366f07a20; 1 drivers +v0x55e366ed9f40_0 .net *"_ivl_40", 0 0, L_0x55e366f07a90; 1 drivers +v0x55e366eda020_0 .net *"_ivl_42", 0 0, L_0x55e366f07c00; 1 drivers +v0x55e366eda100_0 .net *"_ivl_43", 0 0, L_0x55e366f078c0; 1 drivers +v0x55e366eda1e0_0 .net *"_ivl_47", 0 0, L_0x55e366f07fb0; 1 drivers +v0x55e366eda2c0_0 .net *"_ivl_49", 0 0, L_0x55e366f080a0; 1 drivers +v0x55e366eda3a0_0 .net *"_ivl_5", 0 0, L_0x55e366f068a0; 1 drivers +v0x55e366eda480_0 .net *"_ivl_50", 0 0, L_0x55e366f08230; 1 drivers +v0x55e366eda560_0 .net *"_ivl_53", 0 0, L_0x55e366f082a0; 1 drivers +v0x55e366eda640_0 .net *"_ivl_55", 0 0, L_0x55e366f08390; 1 drivers +v0x55e366eda720_0 .net *"_ivl_56", 0 0, L_0x55e366f08530; 1 drivers +v0x55e366eda800_0 .net *"_ivl_59", 0 0, L_0x55e366f08190; 1 drivers +v0x55e366eda8e0_0 .net *"_ivl_6", 0 0, L_0x55e366f06990; 1 drivers +v0x55e366eda9c0_0 .net *"_ivl_61", 0 0, L_0x55e366f08600; 1 drivers +v0x55e366edaaa0_0 .net *"_ivl_62", 0 0, L_0x55e366f087b0; 1 drivers +v0x55e366edab80_0 .net *"_ivl_65", 0 0, L_0x55e366f08820; 1 drivers +v0x55e366edac60_0 .net *"_ivl_67", 0 0, L_0x55e366f08910; 1 drivers +v0x55e366edad40_0 .net *"_ivl_68", 0 0, L_0x55e366f08c60; 1 drivers +v0x55e366edae20_0 .net *"_ivl_72", 0 0, L_0x55e366f08d90; 1 drivers +v0x55e366edaf00_0 .net *"_ivl_74", 0 0, L_0x55e366f08f60; 1 drivers +v0x55e366edafe0_0 .net *"_ivl_75", 0 0, L_0x55e366f09050; 1 drivers +v0x55e366edb0c0_0 .net *"_ivl_78", 0 0, L_0x55e366f090c0; 1 drivers +v0x55e366edb1a0_0 .net *"_ivl_80", 0 0, L_0x55e366f092a0; 1 drivers +v0x55e366edb280_0 .net *"_ivl_81", 0 0, L_0x55e366f093e0; 1 drivers +v0x55e366edb770_0 .net *"_ivl_84", 0 0, L_0x55e366f094d0; 1 drivers +v0x55e366edb850_0 .net *"_ivl_86", 0 0, L_0x55e366f09710; 1 drivers +v0x55e366edb930_0 .net *"_ivl_87", 0 0, L_0x55e366f08d20; 1 drivers +v0x55e366edba10_0 .net *"_ivl_9", 0 0, L_0x55e366f06a00; 1 drivers +v0x55e366edbaf0_0 .net *"_ivl_90", 0 0, L_0x55e366f09800; 1 drivers +v0x55e366edbbd0_0 .net *"_ivl_92", 0 0, L_0x55e366f09a00; 1 drivers +v0x55e366edbcb0_0 .net *"_ivl_93", 0 0, L_0x55e366f09da0; 1 drivers +v0x55e366edbd90_0 .net *"_ivl_97", 0 0, L_0x55e366f09ef0; 1 drivers +v0x55e366edbe70_0 .net *"_ivl_99", 0 0, L_0x55e366f09fe0; 1 drivers +v0x55e366edbf50_0 .net "and1", 3 0, L_0x55e366f07080; 1 drivers +v0x55e366edc030_0 .net "opCode", 2 0, L_0x55e366f0c740; 1 drivers +v0x55e366edc110_0 .net "or1", 3 0, L_0x55e366f07cf0; 1 drivers +v0x55e366edc1f0_0 .net "resultA", 3 0, L_0x55e366f09af0; alias, 1 drivers +v0x55e366edc2d0_0 .net "resultO", 3 0, L_0x55e366f0ac70; alias, 1 drivers +v0x55e366edc3b0_0 .net "resultX", 3 0, L_0x55e366f0bed0; alias, 1 drivers +v0x55e366edc490_0 .net "xor1", 3 0, L_0x55e366f08ad0; 1 drivers +L_0x55e366f067b0 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f068a0 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f06a00 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f06af0 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f06e60 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f06f50 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f07080 .concat8 [ 1 1 1 1], L_0x55e366f06740, L_0x55e366f06990, L_0x55e366f06df0, L_0x55e366f07210; +L_0x55e366f072d0 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f07410 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f07570 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f076c0 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f077d0 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f07930 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f07a90 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f07c00 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f07cf0 .concat8 [ 1 1 1 1], L_0x55e366f07500, L_0x55e366f07760, L_0x55e366f07a20, L_0x55e366f078c0; +L_0x55e366f07fb0 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f080a0 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f082a0 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f08390 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f08190 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f08600 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f08820 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f08910 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f08ad0 .concat8 [ 1 1 1 1], L_0x55e366f08230, L_0x55e366f08530, L_0x55e366f087b0, L_0x55e366f08c60; +L_0x55e366f08d90 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f08f60 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f090c0 .part L_0x55e366f0c740, 0, 1; +L_0x55e366f092a0 .part L_0x55e366f07080, 0, 1; +L_0x55e366f094d0 .part L_0x55e366f0c740, 0, 1; +L_0x55e366f09710 .part L_0x55e366f07080, 1, 1; +L_0x55e366f09800 .part L_0x55e366f0c740, 0, 1; +L_0x55e366f09a00 .part L_0x55e366f07080, 2, 1; +L_0x55e366f09af0 .concat8 [ 1 1 1 1], L_0x55e366f09050, L_0x55e366f093e0, L_0x55e366f08d20, L_0x55e366f09da0; +L_0x55e366f09ef0 .part L_0x55e366f0c740, 0, 1; +L_0x55e366f09fe0 .part L_0x55e366f07080, 3, 1; +L_0x55e366f09cf0 .part L_0x55e366f0c740, 1, 1; +L_0x55e366f0a200 .part L_0x55e366f07cf0, 0, 1; +L_0x55e366f0a590 .part L_0x55e366f0c740, 1, 1; +L_0x55e366f0a680 .part L_0x55e366f07cf0, 1, 1; +L_0x55e366f0a930 .part L_0x55e366f0c740, 1, 1; +L_0x55e366f0aa20 .part L_0x55e366f07cf0, 2, 1; +L_0x55e366f0ac70 .concat8 [ 1 1 1 1], L_0x55e366f09c80, L_0x55e366f0a480, L_0x55e366f0a8c0, L_0x55e366f0ae00; +L_0x55e366f0a4f0 .part L_0x55e366f0c740, 1, 1; +L_0x55e366f0b130 .part L_0x55e366f07cf0, 3, 1; +L_0x55e366f0b290 .part L_0x55e366f0c740, 2, 1; +L_0x55e366f0b500 .part L_0x55e366f08ad0, 0, 1; +L_0x55e366f0b770 .part L_0x55e366f0c740, 2, 1; +L_0x55e366f0b9f0 .part L_0x55e366f08ad0, 1, 1; +L_0x55e366f0bb50 .part L_0x55e366f0c740, 2, 1; +L_0x55e366f0bde0 .part L_0x55e366f08ad0, 2, 1; +L_0x55e366f0bed0 .concat8 [ 1 1 1 1], L_0x55e366f0b220, L_0x55e366f0b640, L_0x55e366f0bae0, L_0x55e366f0c210; +L_0x55e366f0c3a0 .part L_0x55e366f0c740, 2, 1; +L_0x55e366f0c490 .part L_0x55e366f08ad0, 3, 1; +S_0x55e366edc630 .scope module, "mU" "multiplier" 3 22, 14 1 0, S_0x55e366eb6430; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /OUTPUT 8 "Y"; +L_0x55e366f0c870 .functor AND 1, L_0x55e366f0c8e0, L_0x55e366f0c980, C4<1>, C4<1>; +L_0x55e366f0ca70 .functor AND 1, L_0x55e366f0cae0, L_0x55e366f0cbd0, C4<1>, C4<1>; +L_0x55e366f0ccc0 .functor AND 1, L_0x55e366f0cd30, L_0x55e366f0ce20, C4<1>, C4<1>; +L_0x55e366f0cf10 .functor AND 1, L_0x55e366f0cf80, L_0x55e366f0d070, C4<1>, C4<1>; +L_0x7f547236c018 .functor BUFT 1, C4<1>, C4<0>, C4<0>, C4<0>; +L_0x55e366f0d390 .functor NOT 1, L_0x7f547236c018, C4<0>, C4<0>, C4<0>; +L_0x55e366f0d450 .functor AND 1, L_0x55e366f0d4c0, L_0x55e366f0d560, C4<1>, C4<1>; +L_0x55e366f0d600 .functor AND 1, L_0x55e366f0d670, L_0x55e366f0d7d0, C4<1>, C4<1>; +L_0x55e366f0dcd0 .functor AND 1, L_0x55e366f0dd40, L_0x55e366f0deb0, C4<1>, C4<1>; +L_0x55e366f0d760 .functor AND 1, L_0x55e366f0e260, L_0x55e366f0e350, C4<1>, C4<1>; +L_0x55e366f10400 .functor AND 1, L_0x55e366f107d0, L_0x55e366f0e440, C4<1>, C4<1>; +L_0x55e366f10920 .functor AND 1, L_0x55e366f10990, L_0x55e366f10af0, C4<1>, C4<1>; +L_0x55e366f10be0 .functor AND 1, L_0x55e366f10cc0, L_0x55e366f10e80, C4<1>, C4<1>; +L_0x55e366f110f0 .functor AND 1, L_0x55e366f11160, L_0x55e366f11250, C4<1>, C4<1>; +L_0x55e366f13470 .functor AND 1, L_0x55e366f13a60, L_0x55e366f13b00, C4<1>, C4<1>; +L_0x55e366f10c50 .functor AND 1, L_0x55e366f13cb0, L_0x55e366f13d50, C4<1>, C4<1>; +L_0x55e366f13f60 .functor AND 1, L_0x55e366f14060, L_0x55e366f14150, C4<1>, C4<1>; +L_0x55e366f14460 .functor AND 1, L_0x55e366f14520, L_0x55e366f14750, C4<1>, C4<1>; +L_0x7f547236c138 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f16830 .functor OR 1, L_0x55e366f16e90, L_0x7f547236c138, C4<0>, C4<0>; +L_0x7f547236c180 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f17090 .functor OR 1, L_0x55e366f17100, L_0x7f547236c180, C4<0>, C4<0>; +L_0x7f547236c1c8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f17240 .functor OR 1, L_0x55e366f16df0, L_0x7f547236c1c8, C4<0>, C4<0>; +L_0x7f547236c210 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f175c0 .functor OR 1, L_0x55e366f17630, L_0x7f547236c210, C4<0>, C4<0>; +L_0x7f547236c258 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f17770 .functor OR 1, L_0x55e366f178a0, L_0x7f547236c258, C4<0>, C4<0>; +L_0x7f547236c2a0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f17ba0 .functor OR 1, L_0x55e366f17c10, L_0x7f547236c2a0, C4<0>, C4<0>; +L_0x7f547236c2e8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55e366f18200 .functor OR 1, L_0x55e366f18390, L_0x7f547236c2e8, C4<0>, C4<0>; +v0x55e366eeea90_0 .net "A", 3 0, v0x55e366efdb20_0; alias, 1 drivers +v0x55e366eeeb70_0 .net "B", 3 0, v0x55e366efdc00_0; alias, 1 drivers +v0x55e366eeecc0_0 .net "S0", 4 0, L_0x55e366f106a0; 1 drivers +v0x55e366eeed80_0 .net "S1", 4 0, L_0x55e366f137b0; 1 drivers +v0x55e366eeee60_0 .net "S2", 4 0, L_0x55e366f16cc0; 1 drivers +v0x55e366eeef40_0 .net "Y", 7 0, L_0x55e366f17d00; alias, 1 drivers +v0x55e366eef020_0 .net *"_ivl_1", 0 0, L_0x55e366f0c870; 1 drivers +v0x55e366eef100_0 .net *"_ivl_10", 0 0, L_0x55e366f0cae0; 1 drivers +v0x55e366eef1e0_0 .net *"_ivl_101", 0 0, L_0x55e366f13b00; 1 drivers +v0x55e366eef350_0 .net *"_ivl_102", 0 0, L_0x55e366f10c50; 1 drivers +v0x55e366eef430_0 .net *"_ivl_105", 0 0, L_0x55e366f13cb0; 1 drivers +v0x55e366eef510_0 .net *"_ivl_107", 0 0, L_0x55e366f13d50; 1 drivers +v0x55e366eef5f0_0 .net *"_ivl_108", 0 0, L_0x55e366f13f60; 1 drivers +v0x55e366eef6d0_0 .net *"_ivl_111", 0 0, L_0x55e366f14060; 1 drivers +v0x55e366eef7b0_0 .net *"_ivl_113", 0 0, L_0x55e366f14150; 1 drivers +v0x55e366eef890_0 .net *"_ivl_114", 0 0, L_0x55e366f14460; 1 drivers +v0x55e366eef970_0 .net *"_ivl_118", 0 0, L_0x55e366f14520; 1 drivers +v0x55e366eefa50_0 .net *"_ivl_12", 0 0, L_0x55e366f0cbd0; 1 drivers +v0x55e366eefb30_0 .net *"_ivl_120", 0 0, L_0x55e366f14750; 1 drivers +v0x55e366eefc10_0 .net *"_ivl_13", 0 0, L_0x55e366f0ccc0; 1 drivers +v0x55e366eefcf0_0 .net *"_ivl_130", 0 0, L_0x55e366f16830; 1 drivers +v0x55e366eefdd0_0 .net *"_ivl_133", 0 0, L_0x55e366f16e90; 1 drivers +v0x55e366eefeb0_0 .net/2u *"_ivl_134", 0 0, L_0x7f547236c138; 1 drivers +v0x55e366eeff90_0 .net *"_ivl_136", 0 0, L_0x55e366f17090; 1 drivers +v0x55e366ef0070_0 .net *"_ivl_139", 0 0, L_0x55e366f17100; 1 drivers +v0x55e366ef0150_0 .net/2u *"_ivl_140", 0 0, L_0x7f547236c180; 1 drivers +v0x55e366ef0230_0 .net *"_ivl_142", 0 0, L_0x55e366f17240; 1 drivers +v0x55e366ef0310_0 .net *"_ivl_145", 0 0, L_0x55e366f16df0; 1 drivers +v0x55e366ef03f0_0 .net/2u *"_ivl_146", 0 0, L_0x7f547236c1c8; 1 drivers +v0x55e366ef04d0_0 .net *"_ivl_148", 0 0, L_0x55e366f175c0; 1 drivers +v0x55e366ef05b0_0 .net *"_ivl_151", 0 0, L_0x55e366f17630; 1 drivers +v0x55e366ef0690_0 .net/2u *"_ivl_152", 0 0, L_0x7f547236c210; 1 drivers +v0x55e366ef0770_0 .net *"_ivl_154", 0 0, L_0x55e366f17770; 1 drivers +v0x55e366ef0850_0 .net *"_ivl_157", 0 0, L_0x55e366f178a0; 1 drivers +v0x55e366ef0930_0 .net/2u *"_ivl_158", 0 0, L_0x7f547236c258; 1 drivers +v0x55e366ef0a10_0 .net *"_ivl_16", 0 0, L_0x55e366f0cd30; 1 drivers +v0x55e366ef0af0_0 .net *"_ivl_160", 0 0, L_0x55e366f17ba0; 1 drivers +v0x55e366ef0bd0_0 .net *"_ivl_163", 0 0, L_0x55e366f17c10; 1 drivers +v0x55e366ef0cb0_0 .net/2u *"_ivl_164", 0 0, L_0x7f547236c2a0; 1 drivers +v0x55e366ef0d90_0 .net *"_ivl_166", 0 0, L_0x55e366f18200; 1 drivers +v0x55e366ef0e70_0 .net *"_ivl_170", 0 0, L_0x55e366f18390; 1 drivers +v0x55e366ef0f50_0 .net/2u *"_ivl_171", 0 0, L_0x7f547236c2e8; 1 drivers +v0x55e366ef1030_0 .net *"_ivl_18", 0 0, L_0x55e366f0ce20; 1 drivers +v0x55e366ef1110_0 .net *"_ivl_19", 0 0, L_0x55e366f0cf10; 1 drivers +v0x55e366ef11f0_0 .net *"_ivl_22", 0 0, L_0x55e366f0cf80; 1 drivers +v0x55e366ef12d0_0 .net *"_ivl_24", 0 0, L_0x55e366f0d070; 1 drivers +v0x55e366ef13b0_0 .net *"_ivl_25", 0 0, L_0x55e366f0d390; 1 drivers +v0x55e366ef1490_0 .net/2u *"_ivl_28", 0 0, L_0x7f547236c018; 1 drivers +v0x55e366ef1570_0 .net *"_ivl_30", 0 0, L_0x55e366f0d450; 1 drivers +v0x55e366ef1650_0 .net *"_ivl_33", 0 0, L_0x55e366f0d4c0; 1 drivers +v0x55e366ef1730_0 .net *"_ivl_35", 0 0, L_0x55e366f0d560; 1 drivers +v0x55e366ef1810_0 .net *"_ivl_36", 0 0, L_0x55e366f0d600; 1 drivers +v0x55e366ef18f0_0 .net *"_ivl_39", 0 0, L_0x55e366f0d670; 1 drivers +v0x55e366ef19d0_0 .net *"_ivl_4", 0 0, L_0x55e366f0c8e0; 1 drivers +v0x55e366ef1ab0_0 .net *"_ivl_41", 0 0, L_0x55e366f0d7d0; 1 drivers +v0x55e366ef1b90_0 .net *"_ivl_42", 0 0, L_0x55e366f0dcd0; 1 drivers +v0x55e366ef1c70_0 .net *"_ivl_45", 0 0, L_0x55e366f0dd40; 1 drivers +v0x55e366ef1d50_0 .net *"_ivl_47", 0 0, L_0x55e366f0deb0; 1 drivers +v0x55e366ef1e30_0 .net *"_ivl_48", 0 0, L_0x55e366f0d760; 1 drivers +v0x55e366ef1f10_0 .net *"_ivl_52", 0 0, L_0x55e366f0e260; 1 drivers +v0x55e366ef1ff0_0 .net *"_ivl_54", 0 0, L_0x55e366f0e350; 1 drivers +v0x55e366ef20d0_0 .net *"_ivl_6", 0 0, L_0x55e366f0c980; 1 drivers +v0x55e366ef21b0_0 .net *"_ivl_62", 0 0, L_0x55e366f10400; 1 drivers +v0x55e366ef2290_0 .net *"_ivl_65", 0 0, L_0x55e366f107d0; 1 drivers +v0x55e366ef2370_0 .net *"_ivl_67", 0 0, L_0x55e366f0e440; 1 drivers +v0x55e366ef2860_0 .net *"_ivl_68", 0 0, L_0x55e366f10920; 1 drivers +v0x55e366ef2940_0 .net *"_ivl_7", 0 0, L_0x55e366f0ca70; 1 drivers +v0x55e366ef2a20_0 .net *"_ivl_71", 0 0, L_0x55e366f10990; 1 drivers +v0x55e366ef2b00_0 .net *"_ivl_73", 0 0, L_0x55e366f10af0; 1 drivers +v0x55e366ef2be0_0 .net *"_ivl_74", 0 0, L_0x55e366f10be0; 1 drivers +v0x55e366ef2cc0_0 .net *"_ivl_77", 0 0, L_0x55e366f10cc0; 1 drivers +v0x55e366ef2da0_0 .net *"_ivl_79", 0 0, L_0x55e366f10e80; 1 drivers +v0x55e366ef2e80_0 .net *"_ivl_80", 0 0, L_0x55e366f110f0; 1 drivers +v0x55e366ef2f60_0 .net *"_ivl_84", 0 0, L_0x55e366f11160; 1 drivers +v0x55e366ef3040_0 .net *"_ivl_86", 0 0, L_0x55e366f11250; 1 drivers +v0x55e366ef3120_0 .net *"_ivl_96", 0 0, L_0x55e366f13470; 1 drivers +v0x55e366ef3200_0 .net *"_ivl_99", 0 0, L_0x55e366f13a60; 1 drivers +v0x55e366ef32e0_0 .net "a0", 3 0, L_0x55e366f0dfa0; 1 drivers +v0x55e366ef33a0_0 .net "a1", 3 0, L_0x55e366f10f70; 1 drivers +v0x55e366ef3470_0 .net "a2", 3 0, L_0x55e366f13e40; 1 drivers +v0x55e366ef3540_0 .net "b0", 3 0, L_0x55e366f0d1b0; 1 drivers +v0x55e366ef3610_0 .net "overflow0", 0 0, L_0x55e366f10510; 1 drivers +v0x55e366ef36e0_0 .net "overflow1", 0 0, L_0x55e366f13580; 1 drivers +v0x55e366ef37b0_0 .net "overflow2", 0 0, L_0x55e366f16940; 1 drivers +L_0x55e366f0c8e0 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f0c980 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f0cae0 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f0cbd0 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f0cd30 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f0ce20 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f0cf80 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f0d070 .part v0x55e366efdc00_0, 0, 1; +L_0x55e366f0d1b0 .concat8 [ 1 1 1 1], L_0x55e366f0ca70, L_0x55e366f0ccc0, L_0x55e366f0cf10, L_0x55e366f0d390; +L_0x55e366f0d4c0 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f0d560 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f0d670 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f0d7d0 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f0dd40 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f0deb0 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f0dfa0 .concat8 [ 1 1 1 1], L_0x55e366f0d450, L_0x55e366f0d600, L_0x55e366f0dcd0, L_0x55e366f0d760; +L_0x55e366f0e260 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f0e350 .part v0x55e366efdc00_0, 1, 1; +L_0x55e366f106a0 .concat8 [ 4 1 0 0], L_0x55e366f10470, L_0x55e366f0fec0; +L_0x55e366f107d0 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f0e440 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f10990 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f10af0 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f10cc0 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f10e80 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f10f70 .concat8 [ 1 1 1 1], L_0x55e366f10400, L_0x55e366f10920, L_0x55e366f10be0, L_0x55e366f110f0; +L_0x55e366f11160 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f11250 .part v0x55e366efdc00_0, 2, 1; +L_0x55e366f13710 .part L_0x55e366f106a0, 1, 4; +L_0x55e366f137b0 .concat8 [ 4 1 0 0], L_0x55e366f134e0, L_0x55e366f12f00; +L_0x55e366f13a60 .part v0x55e366efdb20_0, 0, 1; +L_0x55e366f13b00 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f13cb0 .part v0x55e366efdb20_0, 1, 1; +L_0x55e366f13d50 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f14060 .part v0x55e366efdb20_0, 2, 1; +L_0x55e366f14150 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f13e40 .concat8 [ 1 1 1 1], L_0x55e366f13470, L_0x55e366f10c50, L_0x55e366f13f60, L_0x55e366f14460; +L_0x55e366f14520 .part v0x55e366efdb20_0, 3, 1; +L_0x55e366f14750 .part v0x55e366efdc00_0, 3, 1; +L_0x55e366f16ad0 .part L_0x55e366f137b0, 1, 4; +L_0x55e366f16cc0 .concat8 [ 4 1 0 0], L_0x55e366f168a0, L_0x55e366f162c0; +L_0x55e366f16e90 .part L_0x55e366f106a0, 0, 1; +L_0x55e366f17100 .part L_0x55e366f137b0, 0, 1; +L_0x55e366f16df0 .part L_0x55e366f16cc0, 0, 1; +L_0x55e366f17630 .part L_0x55e366f16cc0, 1, 1; +L_0x55e366f178a0 .part L_0x55e366f16cc0, 2, 1; +L_0x55e366f17c10 .part L_0x55e366f16cc0, 3, 1; +LS_0x55e366f17d00_0_0 .concat8 [ 1 1 1 1], L_0x55e366f0c870, L_0x55e366f16830, L_0x55e366f17090, L_0x55e366f17240; +LS_0x55e366f17d00_0_4 .concat8 [ 1 1 1 1], L_0x55e366f175c0, L_0x55e366f17770, L_0x55e366f17ba0, L_0x55e366f18200; +L_0x55e366f17d00 .concat8 [ 4 4 0 0], LS_0x55e366f17d00_0_0, LS_0x55e366f17d00_0_4; +L_0x55e366f18390 .part L_0x55e366f16cc0, 4, 1; +S_0x55e366edc830 .scope module, "add0" "addition" 14 26, 5 1 0, S_0x55e366edc630; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x55e366f10510 .functor XOR 1, L_0x55e366f10580, L_0x55e366f0fec0, C4<0>, C4<0>; +v0x55e366ee2160_0 .net "A", 3 0, L_0x55e366f0dfa0; alias, 1 drivers +v0x55e366ee2240_0 .net "B", 3 0, L_0x55e366f0d1b0; alias, 1 drivers +v0x55e366ee2320_0 .net "Carry4", 2 0, L_0x55e366f0f9f0; 1 drivers +L_0x7f547236c060 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x55e366ee23e0_0 .net "CarryIN", 0 0, L_0x7f547236c060; 1 drivers +v0x55e366ee24d0_0 .net "CarryOUT", 0 0, L_0x55e366f0fec0; 1 drivers +v0x55e366ee25c0_0 .net "Y", 3 0, L_0x55e366f10470; 1 drivers +v0x55e366ee2680_0 .net *"_ivl_39", 0 0, L_0x55e366f10580; 1 drivers +v0x55e366ee2760_0 .net "overflow", 0 0, L_0x55e366f10510; alias, 1 drivers +L_0x55e366f0e8e0 .part L_0x55e366f0dfa0, 0, 1; +L_0x55e366f0ea10 .part L_0x55e366f0d1b0, 0, 1; +L_0x55e366f0eea0 .part L_0x55e366f0dfa0, 1, 1; +L_0x55e366f0f060 .part L_0x55e366f0d1b0, 1, 1; +L_0x55e366f0f220 .part L_0x55e366f0f9f0, 0, 1; +L_0x55e366f0f610 .part L_0x55e366f0dfa0, 2, 1; +L_0x55e366f0f740 .part L_0x55e366f0d1b0, 2, 1; +L_0x55e366f0f870 .part L_0x55e366f0f9f0, 1, 1; +L_0x55e366f0f9f0 .concat8 [ 1 1 1 0], L_0x55e366f0e870, L_0x55e366f0ee30, L_0x55e366f0f5a0; +L_0x55e366f0ff80 .part L_0x55e366f0dfa0, 3, 1; +L_0x55e366f10110 .part L_0x55e366f0d1b0, 3, 1; +L_0x55e366f10240 .part L_0x55e366f0f9f0, 2, 1; +L_0x55e366f10470 .concat8 [ 1 1 1 1], L_0x55e366f0e770, L_0x55e366f0ed70, L_0x55e366f0f530, L_0x55e366f0fe00; +L_0x55e366f10580 .part L_0x55e366f0f9f0, 2, 1; +S_0x55e366edcad0 .scope module, "f0" "fulladder" 5 11, 6 1 0, S_0x55e366edc830; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f0e870 .functor OR 1, L_0x55e366f0e4e0, L_0x55e366f0e6b0, C4<0>, C4<0>; +v0x55e366edd9f0_0 .net "A", 0 0, L_0x55e366f0e8e0; 1 drivers +v0x55e366eddab0_0 .net "B", 0 0, L_0x55e366f0ea10; 1 drivers +v0x55e366eddb80_0 .net "Carry", 0 0, L_0x7f547236c060; alias, 1 drivers +v0x55e366eddc80_0 .net "CarryO", 0 0, L_0x55e366f0e870; 1 drivers +v0x55e366eddd20_0 .net "Sum", 0 0, L_0x55e366f0e770; 1 drivers +v0x55e366edde10_0 .net "and1", 0 0, L_0x55e366f0e4e0; 1 drivers +v0x55e366eddee0_0 .net "and2", 0 0, L_0x55e366f0e6b0; 1 drivers +v0x55e366eddfb0_0 .net "xor1", 0 0, L_0x55e366f0e640; 1 drivers +S_0x55e366edcd50 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366edcad0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0e4e0 .functor AND 1, L_0x55e366f0e8e0, L_0x55e366f0ea10, C4<1>, C4<1>; +L_0x55e366f0e640 .functor XOR 1, L_0x55e366f0e8e0, L_0x55e366f0ea10, C4<0>, C4<0>; +v0x55e366edcff0_0 .net "A", 0 0, L_0x55e366f0e8e0; alias, 1 drivers +v0x55e366edd0d0_0 .net "B", 0 0, L_0x55e366f0ea10; alias, 1 drivers +v0x55e366edd190_0 .net "Carry", 0 0, L_0x55e366f0e4e0; alias, 1 drivers +v0x55e366edd260_0 .net "Sum", 0 0, L_0x55e366f0e640; alias, 1 drivers +S_0x55e366edd3d0 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366edcad0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0e6b0 .functor AND 1, L_0x55e366f0e640, L_0x7f547236c060, C4<1>, C4<1>; +L_0x55e366f0e770 .functor XOR 1, L_0x55e366f0e640, L_0x7f547236c060, C4<0>, C4<0>; +v0x55e366edd640_0 .net "A", 0 0, L_0x55e366f0e640; alias, 1 drivers +v0x55e366edd710_0 .net "B", 0 0, L_0x7f547236c060; alias, 1 drivers +v0x55e366edd7b0_0 .net "Carry", 0 0, L_0x55e366f0e6b0; alias, 1 drivers +v0x55e366edd880_0 .net "Sum", 0 0, L_0x55e366f0e770; alias, 1 drivers +S_0x55e366ede0a0 .scope module, "f1" "fulladder" 5 12, 6 1 0, S_0x55e366edc830; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f0ee30 .functor OR 1, L_0x55e366f0eb40, L_0x55e366f0ec20, C4<0>, C4<0>; +v0x55e366edef80_0 .net "A", 0 0, L_0x55e366f0eea0; 1 drivers +v0x55e366edf040_0 .net "B", 0 0, L_0x55e366f0f060; 1 drivers +v0x55e366edf110_0 .net "Carry", 0 0, L_0x55e366f0f220; 1 drivers +v0x55e366edf210_0 .net "CarryO", 0 0, L_0x55e366f0ee30; 1 drivers +v0x55e366edf2b0_0 .net "Sum", 0 0, L_0x55e366f0ed70; 1 drivers +v0x55e366edf3a0_0 .net "and1", 0 0, L_0x55e366f0eb40; 1 drivers +v0x55e366edf470_0 .net "and2", 0 0, L_0x55e366f0ec20; 1 drivers +v0x55e366edf540_0 .net "xor1", 0 0, L_0x55e366f0ebb0; 1 drivers +S_0x55e366ede300 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ede0a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0eb40 .functor AND 1, L_0x55e366f0eea0, L_0x55e366f0f060, C4<1>, C4<1>; +L_0x55e366f0ebb0 .functor XOR 1, L_0x55e366f0eea0, L_0x55e366f0f060, C4<0>, C4<0>; +v0x55e366ede580_0 .net "A", 0 0, L_0x55e366f0eea0; alias, 1 drivers +v0x55e366ede660_0 .net "B", 0 0, L_0x55e366f0f060; alias, 1 drivers +v0x55e366ede720_0 .net "Carry", 0 0, L_0x55e366f0eb40; alias, 1 drivers +v0x55e366ede7f0_0 .net "Sum", 0 0, L_0x55e366f0ebb0; alias, 1 drivers +S_0x55e366ede960 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ede0a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0ec20 .functor AND 1, L_0x55e366f0ebb0, L_0x55e366f0f220, C4<1>, C4<1>; +L_0x55e366f0ed70 .functor XOR 1, L_0x55e366f0ebb0, L_0x55e366f0f220, C4<0>, C4<0>; +v0x55e366edebd0_0 .net "A", 0 0, L_0x55e366f0ebb0; alias, 1 drivers +v0x55e366edeca0_0 .net "B", 0 0, L_0x55e366f0f220; alias, 1 drivers +v0x55e366eded40_0 .net "Carry", 0 0, L_0x55e366f0ec20; alias, 1 drivers +v0x55e366edee10_0 .net "Sum", 0 0, L_0x55e366f0ed70; alias, 1 drivers +S_0x55e366edf630 .scope module, "f2" "fulladder" 5 13, 6 1 0, S_0x55e366edc830; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f0f5a0 .functor OR 1, L_0x55e366f0f350, L_0x55e366f0f430, C4<0>, C4<0>; +v0x55e366ee0520_0 .net "A", 0 0, L_0x55e366f0f610; 1 drivers +v0x55e366ee05e0_0 .net "B", 0 0, L_0x55e366f0f740; 1 drivers +v0x55e366ee06b0_0 .net "Carry", 0 0, L_0x55e366f0f870; 1 drivers +v0x55e366ee07b0_0 .net "CarryO", 0 0, L_0x55e366f0f5a0; 1 drivers +v0x55e366ee0850_0 .net "Sum", 0 0, L_0x55e366f0f530; 1 drivers +v0x55e366ee0940_0 .net "and1", 0 0, L_0x55e366f0f350; 1 drivers +v0x55e366ee0a10_0 .net "and2", 0 0, L_0x55e366f0f430; 1 drivers +v0x55e366ee0ae0_0 .net "xor1", 0 0, L_0x55e366f0f3c0; 1 drivers +S_0x55e366edf8c0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366edf630; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0f350 .functor AND 1, L_0x55e366f0f610, L_0x55e366f0f740, C4<1>, C4<1>; +L_0x55e366f0f3c0 .functor XOR 1, L_0x55e366f0f610, L_0x55e366f0f740, C4<0>, C4<0>; +v0x55e366edfb40_0 .net "A", 0 0, L_0x55e366f0f610; alias, 1 drivers +v0x55e366edfc00_0 .net "B", 0 0, L_0x55e366f0f740; alias, 1 drivers +v0x55e366edfcc0_0 .net "Carry", 0 0, L_0x55e366f0f350; alias, 1 drivers +v0x55e366edfd90_0 .net "Sum", 0 0, L_0x55e366f0f3c0; alias, 1 drivers +S_0x55e366edff00 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366edf630; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0f430 .functor AND 1, L_0x55e366f0f3c0, L_0x55e366f0f870, C4<1>, C4<1>; +L_0x55e366f0f530 .functor XOR 1, L_0x55e366f0f3c0, L_0x55e366f0f870, C4<0>, C4<0>; +v0x55e366ee0170_0 .net "A", 0 0, L_0x55e366f0f3c0; alias, 1 drivers +v0x55e366ee0240_0 .net "B", 0 0, L_0x55e366f0f870; alias, 1 drivers +v0x55e366ee02e0_0 .net "Carry", 0 0, L_0x55e366f0f430; alias, 1 drivers +v0x55e366ee03b0_0 .net "Sum", 0 0, L_0x55e366f0f530; alias, 1 drivers +S_0x55e366ee0bd0 .scope module, "f3" "fulladder" 5 14, 6 1 0, S_0x55e366edc830; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f0fec0 .functor OR 1, L_0x55e366f0fae0, L_0x55e366f0fcb0, C4<0>, C4<0>; +v0x55e366ee1ab0_0 .net "A", 0 0, L_0x55e366f0ff80; 1 drivers +v0x55e366ee1b70_0 .net "B", 0 0, L_0x55e366f10110; 1 drivers +v0x55e366ee1c40_0 .net "Carry", 0 0, L_0x55e366f10240; 1 drivers +v0x55e366ee1d40_0 .net "CarryO", 0 0, L_0x55e366f0fec0; alias, 1 drivers +v0x55e366ee1de0_0 .net "Sum", 0 0, L_0x55e366f0fe00; 1 drivers +v0x55e366ee1ed0_0 .net "and1", 0 0, L_0x55e366f0fae0; 1 drivers +v0x55e366ee1fa0_0 .net "and2", 0 0, L_0x55e366f0fcb0; 1 drivers +v0x55e366ee2070_0 .net "xor1", 0 0, L_0x55e366f0fc40; 1 drivers +S_0x55e366ee0e30 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee0bd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0fae0 .functor AND 1, L_0x55e366f0ff80, L_0x55e366f10110, C4<1>, C4<1>; +L_0x55e366f0fc40 .functor XOR 1, L_0x55e366f0ff80, L_0x55e366f10110, C4<0>, C4<0>; +v0x55e366ee10b0_0 .net "A", 0 0, L_0x55e366f0ff80; alias, 1 drivers +v0x55e366ee1190_0 .net "B", 0 0, L_0x55e366f10110; alias, 1 drivers +v0x55e366ee1250_0 .net "Carry", 0 0, L_0x55e366f0fae0; alias, 1 drivers +v0x55e366ee1320_0 .net "Sum", 0 0, L_0x55e366f0fc40; alias, 1 drivers +S_0x55e366ee1490 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee0bd0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f0fcb0 .functor AND 1, L_0x55e366f0fc40, L_0x55e366f10240, C4<1>, C4<1>; +L_0x55e366f0fe00 .functor XOR 1, L_0x55e366f0fc40, L_0x55e366f10240, C4<0>, C4<0>; +v0x55e366ee1700_0 .net "A", 0 0, L_0x55e366f0fc40; alias, 1 drivers +v0x55e366ee17d0_0 .net "B", 0 0, L_0x55e366f10240; alias, 1 drivers +v0x55e366ee1870_0 .net "Carry", 0 0, L_0x55e366f0fcb0; alias, 1 drivers +v0x55e366ee1940_0 .net "Sum", 0 0, L_0x55e366f0fe00; alias, 1 drivers +S_0x55e366ee28e0 .scope module, "add1" "addition" 14 42, 5 1 0, S_0x55e366edc630; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x55e366f13580 .functor XOR 1, L_0x55e366f135f0, L_0x55e366f12f00, C4<0>, C4<0>; +v0x55e366ee81f0_0 .net "A", 3 0, L_0x55e366f10f70; alias, 1 drivers +v0x55e366ee82d0_0 .net "B", 3 0, L_0x55e366f13710; 1 drivers +v0x55e366ee83b0_0 .net "Carry4", 2 0, L_0x55e366f12a30; 1 drivers +L_0x7f547236c0a8 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x55e366ee8470_0 .net "CarryIN", 0 0, L_0x7f547236c0a8; 1 drivers +v0x55e366ee8560_0 .net "CarryOUT", 0 0, L_0x55e366f12f00; 1 drivers +v0x55e366ee8650_0 .net "Y", 3 0, L_0x55e366f134e0; 1 drivers +v0x55e366ee8710_0 .net *"_ivl_39", 0 0, L_0x55e366f135f0; 1 drivers +v0x55e366ee87f0_0 .net "overflow", 0 0, L_0x55e366f13580; alias, 1 drivers +L_0x55e366f118c0 .part L_0x55e366f10f70, 0, 1; +L_0x55e366f119f0 .part L_0x55e366f13710, 0, 1; +L_0x55e366f11e80 .part L_0x55e366f10f70, 1, 1; +L_0x55e366f12040 .part L_0x55e366f13710, 1, 1; +L_0x55e366f12170 .part L_0x55e366f12a30, 0, 1; +L_0x55e366f12650 .part L_0x55e366f10f70, 2, 1; +L_0x55e366f12780 .part L_0x55e366f13710, 2, 1; +L_0x55e366f128b0 .part L_0x55e366f12a30, 1, 1; +L_0x55e366f12a30 .concat8 [ 1 1 1 0], L_0x55e366f11850, L_0x55e366f11e10, L_0x55e366f125e0; +L_0x55e366f12fc0 .part L_0x55e366f10f70, 3, 1; +L_0x55e366f130f0 .part L_0x55e366f13710, 3, 1; +L_0x55e366f132b0 .part L_0x55e366f12a30, 2, 1; +L_0x55e366f134e0 .concat8 [ 1 1 1 1], L_0x55e366f11750, L_0x55e366f11d50, L_0x55e366f12520, L_0x55e366f12e40; +L_0x55e366f135f0 .part L_0x55e366f12a30, 2, 1; +S_0x55e366ee2b80 .scope module, "f0" "fulladder" 5 11, 6 1 0, S_0x55e366ee28e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f11850 .functor OR 1, L_0x55e366f11430, L_0x55e366f11600, C4<0>, C4<0>; +v0x55e366ee3a80_0 .net "A", 0 0, L_0x55e366f118c0; 1 drivers +v0x55e366ee3b40_0 .net "B", 0 0, L_0x55e366f119f0; 1 drivers +v0x55e366ee3c10_0 .net "Carry", 0 0, L_0x7f547236c0a8; alias, 1 drivers +v0x55e366ee3d10_0 .net "CarryO", 0 0, L_0x55e366f11850; 1 drivers +v0x55e366ee3db0_0 .net "Sum", 0 0, L_0x55e366f11750; 1 drivers +v0x55e366ee3ea0_0 .net "and1", 0 0, L_0x55e366f11430; 1 drivers +v0x55e366ee3f70_0 .net "and2", 0 0, L_0x55e366f11600; 1 drivers +v0x55e366ee4040_0 .net "xor1", 0 0, L_0x55e366f11590; 1 drivers +S_0x55e366ee2de0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee2b80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f11430 .functor AND 1, L_0x55e366f118c0, L_0x55e366f119f0, C4<1>, C4<1>; +L_0x55e366f11590 .functor XOR 1, L_0x55e366f118c0, L_0x55e366f119f0, C4<0>, C4<0>; +v0x55e366ee3080_0 .net "A", 0 0, L_0x55e366f118c0; alias, 1 drivers +v0x55e366ee3160_0 .net "B", 0 0, L_0x55e366f119f0; alias, 1 drivers +v0x55e366ee3220_0 .net "Carry", 0 0, L_0x55e366f11430; alias, 1 drivers +v0x55e366ee32f0_0 .net "Sum", 0 0, L_0x55e366f11590; alias, 1 drivers +S_0x55e366ee3460 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee2b80; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f11600 .functor AND 1, L_0x55e366f11590, L_0x7f547236c0a8, C4<1>, C4<1>; +L_0x55e366f11750 .functor XOR 1, L_0x55e366f11590, L_0x7f547236c0a8, C4<0>, C4<0>; +v0x55e366ee36d0_0 .net "A", 0 0, L_0x55e366f11590; alias, 1 drivers +v0x55e366ee37a0_0 .net "B", 0 0, L_0x7f547236c0a8; alias, 1 drivers +v0x55e366ee3840_0 .net "Carry", 0 0, L_0x55e366f11600; alias, 1 drivers +v0x55e366ee3910_0 .net "Sum", 0 0, L_0x55e366f11750; alias, 1 drivers +S_0x55e366ee4130 .scope module, "f1" "fulladder" 5 12, 6 1 0, S_0x55e366ee28e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f11e10 .functor OR 1, L_0x55e366f11b20, L_0x55e366f11c00, C4<0>, C4<0>; +v0x55e366ee5010_0 .net "A", 0 0, L_0x55e366f11e80; 1 drivers +v0x55e366ee50d0_0 .net "B", 0 0, L_0x55e366f12040; 1 drivers +v0x55e366ee51a0_0 .net "Carry", 0 0, L_0x55e366f12170; 1 drivers +v0x55e366ee52a0_0 .net "CarryO", 0 0, L_0x55e366f11e10; 1 drivers +v0x55e366ee5340_0 .net "Sum", 0 0, L_0x55e366f11d50; 1 drivers +v0x55e366ee5430_0 .net "and1", 0 0, L_0x55e366f11b20; 1 drivers +v0x55e366ee5500_0 .net "and2", 0 0, L_0x55e366f11c00; 1 drivers +v0x55e366ee55d0_0 .net "xor1", 0 0, L_0x55e366f11b90; 1 drivers +S_0x55e366ee4390 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee4130; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f11b20 .functor AND 1, L_0x55e366f11e80, L_0x55e366f12040, C4<1>, C4<1>; +L_0x55e366f11b90 .functor XOR 1, L_0x55e366f11e80, L_0x55e366f12040, C4<0>, C4<0>; +v0x55e366ee4610_0 .net "A", 0 0, L_0x55e366f11e80; alias, 1 drivers +v0x55e366ee46f0_0 .net "B", 0 0, L_0x55e366f12040; alias, 1 drivers +v0x55e366ee47b0_0 .net "Carry", 0 0, L_0x55e366f11b20; alias, 1 drivers +v0x55e366ee4880_0 .net "Sum", 0 0, L_0x55e366f11b90; alias, 1 drivers +S_0x55e366ee49f0 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee4130; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f11c00 .functor AND 1, L_0x55e366f11b90, L_0x55e366f12170, C4<1>, C4<1>; +L_0x55e366f11d50 .functor XOR 1, L_0x55e366f11b90, L_0x55e366f12170, C4<0>, C4<0>; +v0x55e366ee4c60_0 .net "A", 0 0, L_0x55e366f11b90; alias, 1 drivers +v0x55e366ee4d30_0 .net "B", 0 0, L_0x55e366f12170; alias, 1 drivers +v0x55e366ee4dd0_0 .net "Carry", 0 0, L_0x55e366f11c00; alias, 1 drivers +v0x55e366ee4ea0_0 .net "Sum", 0 0, L_0x55e366f11d50; alias, 1 drivers +S_0x55e366ee56c0 .scope module, "f2" "fulladder" 5 13, 6 1 0, S_0x55e366ee28e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f125e0 .functor OR 1, L_0x55e366f122a0, L_0x55e366f123d0, C4<0>, C4<0>; +v0x55e366ee65b0_0 .net "A", 0 0, L_0x55e366f12650; 1 drivers +v0x55e366ee6670_0 .net "B", 0 0, L_0x55e366f12780; 1 drivers +v0x55e366ee6740_0 .net "Carry", 0 0, L_0x55e366f128b0; 1 drivers +v0x55e366ee6840_0 .net "CarryO", 0 0, L_0x55e366f125e0; 1 drivers +v0x55e366ee68e0_0 .net "Sum", 0 0, L_0x55e366f12520; 1 drivers +v0x55e366ee69d0_0 .net "and1", 0 0, L_0x55e366f122a0; 1 drivers +v0x55e366ee6aa0_0 .net "and2", 0 0, L_0x55e366f123d0; 1 drivers +v0x55e366ee6b70_0 .net "xor1", 0 0, L_0x55e366f12360; 1 drivers +S_0x55e366ee5950 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee56c0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f122a0 .functor AND 1, L_0x55e366f12650, L_0x55e366f12780, C4<1>, C4<1>; +L_0x55e366f12360 .functor XOR 1, L_0x55e366f12650, L_0x55e366f12780, C4<0>, C4<0>; +v0x55e366ee5bd0_0 .net "A", 0 0, L_0x55e366f12650; alias, 1 drivers +v0x55e366ee5c90_0 .net "B", 0 0, L_0x55e366f12780; alias, 1 drivers +v0x55e366ee5d50_0 .net "Carry", 0 0, L_0x55e366f122a0; alias, 1 drivers +v0x55e366ee5e20_0 .net "Sum", 0 0, L_0x55e366f12360; alias, 1 drivers +S_0x55e366ee5f90 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee56c0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f123d0 .functor AND 1, L_0x55e366f12360, L_0x55e366f128b0, C4<1>, C4<1>; +L_0x55e366f12520 .functor XOR 1, L_0x55e366f12360, L_0x55e366f128b0, C4<0>, C4<0>; +v0x55e366ee6200_0 .net "A", 0 0, L_0x55e366f12360; alias, 1 drivers +v0x55e366ee62d0_0 .net "B", 0 0, L_0x55e366f128b0; alias, 1 drivers +v0x55e366ee6370_0 .net "Carry", 0 0, L_0x55e366f123d0; alias, 1 drivers +v0x55e366ee6440_0 .net "Sum", 0 0, L_0x55e366f12520; alias, 1 drivers +S_0x55e366ee6c60 .scope module, "f3" "fulladder" 5 14, 6 1 0, S_0x55e366ee28e0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f12f00 .functor OR 1, L_0x55e366f12b20, L_0x55e366f12cf0, C4<0>, C4<0>; +v0x55e366ee7b40_0 .net "A", 0 0, L_0x55e366f12fc0; 1 drivers +v0x55e366ee7c00_0 .net "B", 0 0, L_0x55e366f130f0; 1 drivers +v0x55e366ee7cd0_0 .net "Carry", 0 0, L_0x55e366f132b0; 1 drivers +v0x55e366ee7dd0_0 .net "CarryO", 0 0, L_0x55e366f12f00; alias, 1 drivers +v0x55e366ee7e70_0 .net "Sum", 0 0, L_0x55e366f12e40; 1 drivers +v0x55e366ee7f60_0 .net "and1", 0 0, L_0x55e366f12b20; 1 drivers +v0x55e366ee8030_0 .net "and2", 0 0, L_0x55e366f12cf0; 1 drivers +v0x55e366ee8100_0 .net "xor1", 0 0, L_0x55e366f12c80; 1 drivers +S_0x55e366ee6ec0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee6c60; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f12b20 .functor AND 1, L_0x55e366f12fc0, L_0x55e366f130f0, C4<1>, C4<1>; +L_0x55e366f12c80 .functor XOR 1, L_0x55e366f12fc0, L_0x55e366f130f0, C4<0>, C4<0>; +v0x55e366ee7140_0 .net "A", 0 0, L_0x55e366f12fc0; alias, 1 drivers +v0x55e366ee7220_0 .net "B", 0 0, L_0x55e366f130f0; alias, 1 drivers +v0x55e366ee72e0_0 .net "Carry", 0 0, L_0x55e366f12b20; alias, 1 drivers +v0x55e366ee73b0_0 .net "Sum", 0 0, L_0x55e366f12c80; alias, 1 drivers +S_0x55e366ee7520 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee6c60; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f12cf0 .functor AND 1, L_0x55e366f12c80, L_0x55e366f132b0, C4<1>, C4<1>; +L_0x55e366f12e40 .functor XOR 1, L_0x55e366f12c80, L_0x55e366f132b0, C4<0>, C4<0>; +v0x55e366ee7790_0 .net "A", 0 0, L_0x55e366f12c80; alias, 1 drivers +v0x55e366ee7860_0 .net "B", 0 0, L_0x55e366f132b0; alias, 1 drivers +v0x55e366ee7900_0 .net "Carry", 0 0, L_0x55e366f12cf0; alias, 1 drivers +v0x55e366ee79d0_0 .net "Sum", 0 0, L_0x55e366f12e40; alias, 1 drivers +S_0x55e366ee89b0 .scope module, "add2" "addition" 14 58, 5 1 0, S_0x55e366edc630; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 1 "CarryIN"; + .port_info 3 /OUTPUT 4 "Y"; + .port_info 4 /OUTPUT 1 "CarryOUT"; + .port_info 5 /OUTPUT 1 "overflow"; +L_0x55e366f16940 .functor XOR 1, L_0x55e366f169b0, L_0x55e366f162c0, C4<0>, C4<0>; +v0x55e366eee2d0_0 .net "A", 3 0, L_0x55e366f13e40; alias, 1 drivers +v0x55e366eee3b0_0 .net "B", 3 0, L_0x55e366f16ad0; 1 drivers +v0x55e366eee490_0 .net "Carry4", 2 0, L_0x55e366f15df0; 1 drivers +L_0x7f547236c0f0 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +v0x55e366eee550_0 .net "CarryIN", 0 0, L_0x7f547236c0f0; 1 drivers +v0x55e366eee640_0 .net "CarryOUT", 0 0, L_0x55e366f162c0; 1 drivers +v0x55e366eee730_0 .net "Y", 3 0, L_0x55e366f168a0; 1 drivers +v0x55e366eee7f0_0 .net *"_ivl_39", 0 0, L_0x55e366f169b0; 1 drivers +v0x55e366eee8d0_0 .net "overflow", 0 0, L_0x55e366f16940; alias, 1 drivers +L_0x55e366f14cd0 .part L_0x55e366f13e40, 0, 1; +L_0x55e366f14e00 .part L_0x55e366f16ad0, 0, 1; +L_0x55e366f15290 .part L_0x55e366f13e40, 1, 1; +L_0x55e366f15450 .part L_0x55e366f16ad0, 1, 1; +L_0x55e366f15580 .part L_0x55e366f15df0, 0, 1; +L_0x55e366f15a10 .part L_0x55e366f13e40, 2, 1; +L_0x55e366f15b40 .part L_0x55e366f16ad0, 2, 1; +L_0x55e366f15c70 .part L_0x55e366f15df0, 1, 1; +L_0x55e366f15df0 .concat8 [ 1 1 1 0], L_0x55e366f14c60, L_0x55e366f15220, L_0x55e366f159a0; +L_0x55e366f16380 .part L_0x55e366f13e40, 3, 1; +L_0x55e366f164b0 .part L_0x55e366f16ad0, 3, 1; +L_0x55e366f16670 .part L_0x55e366f15df0, 2, 1; +L_0x55e366f168a0 .concat8 [ 1 1 1 1], L_0x55e366f14b60, L_0x55e366f15160, L_0x55e366f158e0, L_0x55e366f16200; +L_0x55e366f169b0 .part L_0x55e366f15df0, 2, 1; +S_0x55e366ee8c30 .scope module, "f0" "fulladder" 5 11, 6 1 0, S_0x55e366ee89b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f14c60 .functor OR 1, L_0x55e366f14840, L_0x55e366f14a10, C4<0>, C4<0>; +v0x55e366ee9b60_0 .net "A", 0 0, L_0x55e366f14cd0; 1 drivers +v0x55e366ee9c20_0 .net "B", 0 0, L_0x55e366f14e00; 1 drivers +v0x55e366ee9cf0_0 .net "Carry", 0 0, L_0x7f547236c0f0; alias, 1 drivers +v0x55e366ee9df0_0 .net "CarryO", 0 0, L_0x55e366f14c60; 1 drivers +v0x55e366ee9e90_0 .net "Sum", 0 0, L_0x55e366f14b60; 1 drivers +v0x55e366ee9f80_0 .net "and1", 0 0, L_0x55e366f14840; 1 drivers +v0x55e366eea050_0 .net "and2", 0 0, L_0x55e366f14a10; 1 drivers +v0x55e366eea120_0 .net "xor1", 0 0, L_0x55e366f149a0; 1 drivers +S_0x55e366ee8ec0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366ee8c30; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f14840 .functor AND 1, L_0x55e366f14cd0, L_0x55e366f14e00, C4<1>, C4<1>; +L_0x55e366f149a0 .functor XOR 1, L_0x55e366f14cd0, L_0x55e366f14e00, C4<0>, C4<0>; +v0x55e366ee9160_0 .net "A", 0 0, L_0x55e366f14cd0; alias, 1 drivers +v0x55e366ee9240_0 .net "B", 0 0, L_0x55e366f14e00; alias, 1 drivers +v0x55e366ee9300_0 .net "Carry", 0 0, L_0x55e366f14840; alias, 1 drivers +v0x55e366ee93d0_0 .net "Sum", 0 0, L_0x55e366f149a0; alias, 1 drivers +S_0x55e366ee9540 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366ee8c30; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f14a10 .functor AND 1, L_0x55e366f149a0, L_0x7f547236c0f0, C4<1>, C4<1>; +L_0x55e366f14b60 .functor XOR 1, L_0x55e366f149a0, L_0x7f547236c0f0, C4<0>, C4<0>; +v0x55e366ee97b0_0 .net "A", 0 0, L_0x55e366f149a0; alias, 1 drivers +v0x55e366ee9880_0 .net "B", 0 0, L_0x7f547236c0f0; alias, 1 drivers +v0x55e366ee9920_0 .net "Carry", 0 0, L_0x55e366f14a10; alias, 1 drivers +v0x55e366ee99f0_0 .net "Sum", 0 0, L_0x55e366f14b60; alias, 1 drivers +S_0x55e366eea210 .scope module, "f1" "fulladder" 5 12, 6 1 0, S_0x55e366ee89b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f15220 .functor OR 1, L_0x55e366f14f30, L_0x55e366f15010, C4<0>, C4<0>; +v0x55e366eeb0f0_0 .net "A", 0 0, L_0x55e366f15290; 1 drivers +v0x55e366eeb1b0_0 .net "B", 0 0, L_0x55e366f15450; 1 drivers +v0x55e366eeb280_0 .net "Carry", 0 0, L_0x55e366f15580; 1 drivers +v0x55e366eeb380_0 .net "CarryO", 0 0, L_0x55e366f15220; 1 drivers +v0x55e366eeb420_0 .net "Sum", 0 0, L_0x55e366f15160; 1 drivers +v0x55e366eeb510_0 .net "and1", 0 0, L_0x55e366f14f30; 1 drivers +v0x55e366eeb5e0_0 .net "and2", 0 0, L_0x55e366f15010; 1 drivers +v0x55e366eeb6b0_0 .net "xor1", 0 0, L_0x55e366f14fa0; 1 drivers +S_0x55e366eea470 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366eea210; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f14f30 .functor AND 1, L_0x55e366f15290, L_0x55e366f15450, C4<1>, C4<1>; +L_0x55e366f14fa0 .functor XOR 1, L_0x55e366f15290, L_0x55e366f15450, C4<0>, C4<0>; +v0x55e366eea6f0_0 .net "A", 0 0, L_0x55e366f15290; alias, 1 drivers +v0x55e366eea7d0_0 .net "B", 0 0, L_0x55e366f15450; alias, 1 drivers +v0x55e366eea890_0 .net "Carry", 0 0, L_0x55e366f14f30; alias, 1 drivers +v0x55e366eea960_0 .net "Sum", 0 0, L_0x55e366f14fa0; alias, 1 drivers +S_0x55e366eeaad0 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366eea210; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f15010 .functor AND 1, L_0x55e366f14fa0, L_0x55e366f15580, C4<1>, C4<1>; +L_0x55e366f15160 .functor XOR 1, L_0x55e366f14fa0, L_0x55e366f15580, C4<0>, C4<0>; +v0x55e366eead40_0 .net "A", 0 0, L_0x55e366f14fa0; alias, 1 drivers +v0x55e366eeae10_0 .net "B", 0 0, L_0x55e366f15580; alias, 1 drivers +v0x55e366eeaeb0_0 .net "Carry", 0 0, L_0x55e366f15010; alias, 1 drivers +v0x55e366eeaf80_0 .net "Sum", 0 0, L_0x55e366f15160; alias, 1 drivers +S_0x55e366eeb7a0 .scope module, "f2" "fulladder" 5 13, 6 1 0, S_0x55e366ee89b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f159a0 .functor OR 1, L_0x55e366f156b0, L_0x55e366f15790, C4<0>, C4<0>; +v0x55e366eec690_0 .net "A", 0 0, L_0x55e366f15a10; 1 drivers +v0x55e366eec750_0 .net "B", 0 0, L_0x55e366f15b40; 1 drivers +v0x55e366eec820_0 .net "Carry", 0 0, L_0x55e366f15c70; 1 drivers +v0x55e366eec920_0 .net "CarryO", 0 0, L_0x55e366f159a0; 1 drivers +v0x55e366eec9c0_0 .net "Sum", 0 0, L_0x55e366f158e0; 1 drivers +v0x55e366eecab0_0 .net "and1", 0 0, L_0x55e366f156b0; 1 drivers +v0x55e366eecb80_0 .net "and2", 0 0, L_0x55e366f15790; 1 drivers +v0x55e366eecc50_0 .net "xor1", 0 0, L_0x55e366f15720; 1 drivers +S_0x55e366eeba30 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366eeb7a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f156b0 .functor AND 1, L_0x55e366f15a10, L_0x55e366f15b40, C4<1>, C4<1>; +L_0x55e366f15720 .functor XOR 1, L_0x55e366f15a10, L_0x55e366f15b40, C4<0>, C4<0>; +v0x55e366eebcb0_0 .net "A", 0 0, L_0x55e366f15a10; alias, 1 drivers +v0x55e366eebd70_0 .net "B", 0 0, L_0x55e366f15b40; alias, 1 drivers +v0x55e366eebe30_0 .net "Carry", 0 0, L_0x55e366f156b0; alias, 1 drivers +v0x55e366eebf00_0 .net "Sum", 0 0, L_0x55e366f15720; alias, 1 drivers +S_0x55e366eec070 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366eeb7a0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f15790 .functor AND 1, L_0x55e366f15720, L_0x55e366f15c70, C4<1>, C4<1>; +L_0x55e366f158e0 .functor XOR 1, L_0x55e366f15720, L_0x55e366f15c70, C4<0>, C4<0>; +v0x55e366eec2e0_0 .net "A", 0 0, L_0x55e366f15720; alias, 1 drivers +v0x55e366eec3b0_0 .net "B", 0 0, L_0x55e366f15c70; alias, 1 drivers +v0x55e366eec450_0 .net "Carry", 0 0, L_0x55e366f15790; alias, 1 drivers +v0x55e366eec520_0 .net "Sum", 0 0, L_0x55e366f158e0; alias, 1 drivers +S_0x55e366eecd40 .scope module, "f3" "fulladder" 5 14, 6 1 0, S_0x55e366ee89b0; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /INPUT 1 "Carry"; + .port_info 3 /OUTPUT 1 "Sum"; + .port_info 4 /OUTPUT 1 "CarryO"; +L_0x55e366f162c0 .functor OR 1, L_0x55e366f15ee0, L_0x55e366f160b0, C4<0>, C4<0>; +v0x55e366eedc20_0 .net "A", 0 0, L_0x55e366f16380; 1 drivers +v0x55e366eedce0_0 .net "B", 0 0, L_0x55e366f164b0; 1 drivers +v0x55e366eeddb0_0 .net "Carry", 0 0, L_0x55e366f16670; 1 drivers +v0x55e366eedeb0_0 .net "CarryO", 0 0, L_0x55e366f162c0; alias, 1 drivers +v0x55e366eedf50_0 .net "Sum", 0 0, L_0x55e366f16200; 1 drivers +v0x55e366eee040_0 .net "and1", 0 0, L_0x55e366f15ee0; 1 drivers +v0x55e366eee110_0 .net "and2", 0 0, L_0x55e366f160b0; 1 drivers +v0x55e366eee1e0_0 .net "xor1", 0 0, L_0x55e366f16040; 1 drivers +S_0x55e366eecfa0 .scope module, "h1" "halfadder" 6 8, 7 1 0, S_0x55e366eecd40; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f15ee0 .functor AND 1, L_0x55e366f16380, L_0x55e366f164b0, C4<1>, C4<1>; +L_0x55e366f16040 .functor XOR 1, L_0x55e366f16380, L_0x55e366f164b0, C4<0>, C4<0>; +v0x55e366eed220_0 .net "A", 0 0, L_0x55e366f16380; alias, 1 drivers +v0x55e366eed300_0 .net "B", 0 0, L_0x55e366f164b0; alias, 1 drivers +v0x55e366eed3c0_0 .net "Carry", 0 0, L_0x55e366f15ee0; alias, 1 drivers +v0x55e366eed490_0 .net "Sum", 0 0, L_0x55e366f16040; alias, 1 drivers +S_0x55e366eed600 .scope module, "h2" "halfadder" 6 9, 7 1 0, S_0x55e366eecd40; + .timescale 0 0; + .port_info 0 /INPUT 1 "A"; + .port_info 1 /INPUT 1 "B"; + .port_info 2 /OUTPUT 1 "Sum"; + .port_info 3 /OUTPUT 1 "Carry"; +L_0x55e366f160b0 .functor AND 1, L_0x55e366f16040, L_0x55e366f16670, C4<1>, C4<1>; +L_0x55e366f16200 .functor XOR 1, L_0x55e366f16040, L_0x55e366f16670, C4<0>, C4<0>; +v0x55e366eed870_0 .net "A", 0 0, L_0x55e366f16040; alias, 1 drivers +v0x55e366eed940_0 .net "B", 0 0, L_0x55e366f16670; alias, 1 drivers +v0x55e366eed9e0_0 .net "Carry", 0 0, L_0x55e366f160b0; alias, 1 drivers +v0x55e366eedab0_0 .net "Sum", 0 0, L_0x55e366f16200; alias, 1 drivers +S_0x55e366ef3880 .scope module, "opCd" "opCode" 3 18, 15 1 0, S_0x55e366eb6430; + .timescale 0 0; + .port_info 0 /INPUT 3 "A"; + .port_info 1 /OUTPUT 8 "opCode"; +L_0x55e366efe170 .functor NOT 1, L_0x55e366efe200, C4<0>, C4<0>, C4<0>; +L_0x55e366efe2f0 .functor NOT 1, L_0x55e366efe380, C4<0>, C4<0>, C4<0>; +L_0x55e366efe470 .functor NOT 1, L_0x55e366efe4e0, C4<0>, C4<0>, C4<0>; +L_0x55e366efe580 .functor AND 1, L_0x55e366efe650, L_0x55e366efe770, C4<1>, C4<1>; +L_0x55e366efe860 .functor AND 1, L_0x55e366efe170, L_0x55e366efe920, C4<1>, C4<1>; +L_0x55e366efeb60 .functor AND 1, L_0x55e366efec60, L_0x55e366efe2f0, C4<1>, C4<1>; +L_0x55e366efed50 .functor AND 1, L_0x55e366efe170, L_0x55e366efe2f0, C4<1>, C4<1>; +L_0x55e366efedc0 .functor AND 1, L_0x55e366efed50, L_0x55e366efe470, C4<1>, C4<1>; +L_0x55e366efef20 .functor AND 1, L_0x55e366efed50, L_0x55e366efef90, C4<1>, C4<1>; +L_0x55e366eff0d0 .functor AND 1, L_0x55e366efe860, L_0x55e366efe470, C4<1>, C4<1>; +L_0x55e366eff1f0 .functor AND 1, L_0x55e366efe860, L_0x55e366eff260, C4<1>, C4<1>; +L_0x55e366eff300 .functor AND 1, L_0x55e366efeb60, L_0x55e366efe470, C4<1>, C4<1>; +L_0x55e366eff430 .functor AND 1, L_0x55e366efeb60, L_0x55e366eff4a0, C4<1>, C4<1>; +L_0x55e366eff5a0 .functor AND 1, L_0x55e366efe580, L_0x55e366efe470, C4<1>, C4<1>; +L_0x55e366eff3c0 .functor AND 1, L_0x55e366efe580, L_0x55e366effa50, C4<1>, C4<1>; +v0x55e366ef3a10_0 .net "A", 2 0, v0x55e366efdf70_0; alias, 1 drivers +v0x55e366ef3b10_0 .net *"_ivl_1", 0 0, L_0x55e366efe200; 1 drivers +v0x55e366ef3bf0_0 .net *"_ivl_11", 0 0, L_0x55e366efe920; 1 drivers +v0x55e366ef3cb0_0 .net *"_ivl_13", 0 0, L_0x55e366efec60; 1 drivers +v0x55e366ef3d90_0 .net *"_ivl_14", 0 0, L_0x55e366efedc0; 1 drivers +v0x55e366ef3ec0_0 .net *"_ivl_16", 0 0, L_0x55e366efef20; 1 drivers +v0x55e366ef3fa0_0 .net *"_ivl_19", 0 0, L_0x55e366efef90; 1 drivers +v0x55e366ef4080_0 .net *"_ivl_20", 0 0, L_0x55e366eff0d0; 1 drivers +v0x55e366ef4160_0 .net *"_ivl_22", 0 0, L_0x55e366eff1f0; 1 drivers +v0x55e366ef4240_0 .net *"_ivl_25", 0 0, L_0x55e366eff260; 1 drivers +v0x55e366ef4320_0 .net *"_ivl_26", 0 0, L_0x55e366eff300; 1 drivers +v0x55e366ef4400_0 .net *"_ivl_28", 0 0, L_0x55e366eff430; 1 drivers +v0x55e366ef44e0_0 .net *"_ivl_3", 0 0, L_0x55e366efe380; 1 drivers +v0x55e366ef45c0_0 .net *"_ivl_31", 0 0, L_0x55e366eff4a0; 1 drivers +v0x55e366ef46a0_0 .net *"_ivl_32", 0 0, L_0x55e366eff5a0; 1 drivers +v0x55e366ef4780_0 .net *"_ivl_34", 0 0, L_0x55e366eff3c0; 1 drivers +v0x55e366ef4860_0 .net *"_ivl_38", 0 0, L_0x55e366effa50; 1 drivers +v0x55e366ef4940_0 .net *"_ivl_5", 0 0, L_0x55e366efe4e0; 1 drivers +v0x55e366ef4a20_0 .net *"_ivl_7", 0 0, L_0x55e366efe650; 1 drivers +v0x55e366ef4b00_0 .net *"_ivl_9", 0 0, L_0x55e366efe770; 1 drivers +v0x55e366ef4be0_0 .net "and1", 0 0, L_0x55e366efe580; 1 drivers +v0x55e366ef4ca0_0 .net "and2", 0 0, L_0x55e366efe860; 1 drivers +v0x55e366ef4d60_0 .net "and3", 0 0, L_0x55e366efeb60; 1 drivers +v0x55e366ef4e20_0 .net "and4", 0 0, L_0x55e366efed50; 1 drivers +v0x55e366ef4ee0_0 .net "notA", 0 0, L_0x55e366efe170; 1 drivers +v0x55e366ef4fa0_0 .net "notB", 0 0, L_0x55e366efe2f0; 1 drivers +v0x55e366ef5060_0 .net "notC", 0 0, L_0x55e366efe470; 1 drivers +v0x55e366ef5120_0 .net "opCode", 7 0, L_0x55e366eff690; alias, 1 drivers +L_0x55e366efe200 .part v0x55e366efdf70_0, 2, 1; +L_0x55e366efe380 .part v0x55e366efdf70_0, 1, 1; +L_0x55e366efe4e0 .part v0x55e366efdf70_0, 0, 1; +L_0x55e366efe650 .part v0x55e366efdf70_0, 2, 1; +L_0x55e366efe770 .part v0x55e366efdf70_0, 1, 1; +L_0x55e366efe920 .part v0x55e366efdf70_0, 1, 1; +L_0x55e366efec60 .part v0x55e366efdf70_0, 2, 1; +L_0x55e366efef90 .part v0x55e366efdf70_0, 0, 1; +L_0x55e366eff260 .part v0x55e366efdf70_0, 0, 1; +L_0x55e366eff4a0 .part v0x55e366efdf70_0, 0, 1; +LS_0x55e366eff690_0_0 .concat8 [ 1 1 1 1], L_0x55e366efedc0, L_0x55e366efef20, L_0x55e366eff0d0, L_0x55e366eff1f0; +LS_0x55e366eff690_0_4 .concat8 [ 1 1 1 1], L_0x55e366eff300, L_0x55e366eff430, L_0x55e366eff5a0, L_0x55e366eff3c0; +L_0x55e366eff690 .concat8 [ 4 4 0 0], LS_0x55e366eff690_0_0, LS_0x55e366eff690_0_4; +L_0x55e366effa50 .part v0x55e366efdf70_0, 0, 1; + .scope S_0x55e366e13060; +T_0 ; + %vpi_call 2 20 "$dumpfile", "ALU.vcd" {0 0 0}; + %vpi_call 2 21 "$dumpvars" {0 0 0}; + %pushi/vec4 12, 0, 4; + %store/vec4 v0x55e366efdb20_0, 0, 4; + %pushi/vec4 12, 0, 4; + %store/vec4 v0x55e366efdc00_0, 0, 4; + %pushi/vec4 0, 0, 1; + %store/vec4 v0x55e366efdcc0_0, 0, 1; + %pushi/vec4 2, 0, 3; + %store/vec4 v0x55e366efdf70_0, 0, 3; + %delay 5, 0; + %vpi_call 2 23 "$finish" {0 0 0}; + %end; + .thread T_0; +# The file index is used to find the file name in the following table. +:file_names 16; + "N/A"; + ""; + "ALUtb.v"; + "ALU.v"; + "arithmeticUnit.v"; + "addition.v"; + "fulladder.v"; + "halfadder.v"; + "subtraction.v"; + "fullsubtraction.v"; + "halfsubtraction.v"; + "BinaryToBCD.v"; + "dabble.v"; + "logicUnit.v"; + "multiplier.v"; + "opCode.v"; diff --git a/spartanTest/ALU.vcd b/spartanTest/ALU.vcd new file mode 100644 index 0000000..bbab0d9 --- /dev/null +++ b/spartanTest/ALU.vcd @@ -0,0 +1,1074 @@ +$date + Sat Jan 18 18:12:41 2025 +$end +$version + Icarus Verilog +$end +$timescale + 1s +$end +$scope module ALUtb $end +$var wire 1 ! overflow $end +$var wire 12 " bcd [11:0] $end +$var wire 1 # CarryOUT $end +$var reg 4 $ A [3:0] $end +$var reg 4 % B [3:0] $end +$var reg 1 & CarryIN $end +$var reg 3 ' opCodeA [2:0] $end +$scope module uut $end +$var wire 4 ( A [3:0] $end +$var wire 4 ) B [3:0] $end +$var wire 1 & CarryIN $end +$var wire 3 * opCodeA [2:0] $end +$var wire 4 + wireY [3:0] $end +$var wire 8 , wireM [7:0] $end +$var wire 4 - wireLA [3:0] $end +$var wire 4 . sub_Y [3:0] $end +$var wire 4 / resultX [3:0] $end +$var wire 4 0 resultO [3:0] $end +$var wire 4 1 resultA [3:0] $end +$var wire 1 ! overflow $end +$var wire 8 2 opwireM [7:0] $end +$var wire 8 3 opCode8 [7:0] $end +$var wire 4 4 lUOutput2 [3:0] $end +$var wire 4 5 lUOutput1 [3:0] $end +$var wire 12 6 bcd [11:0] $end +$var wire 4 7 add_Y [3:0] $end +$var wire 4 8 aUtemp2 [3:0] $end +$var wire 4 9 aUtemp1 [3:0] $end +$var wire 8 : Y [7:0] $end +$var wire 1 # CarryOUT $end +$scope module aU $end +$var wire 4 ; A [3:0] $end +$var wire 4 < B [3:0] $end +$var wire 1 & CarryIN $end +$var wire 1 # CarryOUT $end +$var wire 2 = opCode [1:0] $end +$var wire 1 ! overflow $end +$var wire 1 > tempCAdd $end +$var wire 1 ? tempCSub $end +$var wire 1 @ tempoverflow $end +$var wire 4 A sub_Y [3:0] $end +$var wire 4 B subY [3:0] $end +$var wire 4 C add_Y [3:0] $end +$var wire 4 D addY [3:0] $end +$var wire 1 E CarryOUTSUB $end +$var wire 1 F CarryOUTADD $end +$scope module a1 $end +$var wire 4 G A [3:0] $end +$var wire 4 H B [3:0] $end +$var wire 1 & CarryIN $end +$var wire 1 @ overflow $end +$var wire 4 I Y [3:0] $end +$var wire 1 F CarryOUT $end +$var wire 3 J Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 K A $end +$var wire 1 L B $end +$var wire 1 & Carry $end +$var wire 1 M CarryO $end +$var wire 1 N xor1 $end +$var wire 1 O and2 $end +$var wire 1 P and1 $end +$var wire 1 Q Sum $end +$scope module h1 $end +$var wire 1 K A $end +$var wire 1 L B $end +$var wire 1 P Carry $end +$var wire 1 N Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 N A $end +$var wire 1 & B $end +$var wire 1 O Carry $end +$var wire 1 Q Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 R A $end +$var wire 1 S B $end +$var wire 1 T Carry $end +$var wire 1 U CarryO $end +$var wire 1 V xor1 $end +$var wire 1 W and2 $end +$var wire 1 X and1 $end +$var wire 1 Y Sum $end +$scope module h1 $end +$var wire 1 R A $end +$var wire 1 S B $end +$var wire 1 X Carry $end +$var wire 1 V Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 V A $end +$var wire 1 T B $end +$var wire 1 W Carry $end +$var wire 1 Y Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 Z A $end +$var wire 1 [ B $end +$var wire 1 \ Carry $end +$var wire 1 ] CarryO $end +$var wire 1 ^ xor1 $end +$var wire 1 _ and2 $end +$var wire 1 ` and1 $end +$var wire 1 a Sum $end +$scope module h1 $end +$var wire 1 Z A $end +$var wire 1 [ B $end +$var wire 1 ` Carry $end +$var wire 1 ^ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 ^ A $end +$var wire 1 \ B $end +$var wire 1 _ Carry $end +$var wire 1 a Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 b A $end +$var wire 1 c B $end +$var wire 1 d Carry $end +$var wire 1 F CarryO $end +$var wire 1 e xor1 $end +$var wire 1 f and2 $end +$var wire 1 g and1 $end +$var wire 1 h Sum $end +$scope module h1 $end +$var wire 1 b A $end +$var wire 1 c B $end +$var wire 1 g Carry $end +$var wire 1 e Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 e A $end +$var wire 1 d B $end +$var wire 1 f Carry $end +$var wire 1 h Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module s1 $end +$var wire 4 i A [3:0] $end +$var wire 4 j B [3:0] $end +$var wire 1 & BorrowIN $end +$var wire 4 k tempB [3:0] $end +$var wire 4 l Y [3:0] $end +$var wire 1 E BorrowOUT $end +$scope module f0 $end +$var wire 1 m A $end +$var wire 1 n B $end +$var wire 1 & BorrowIN $end +$var wire 1 o BorrowOut $end +$var wire 1 p tempD $end +$var wire 1 q tempB2 $end +$var wire 1 r tempB1 $end +$var wire 1 s Difference $end +$scope module hf1 $end +$var wire 1 m A $end +$var wire 1 n B $end +$var wire 1 r Borrow $end +$var wire 1 p Difference $end +$var wire 1 t notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 p A $end +$var wire 1 & B $end +$var wire 1 q Borrow $end +$var wire 1 s Difference $end +$var wire 1 u notA $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 v A $end +$var wire 1 w B $end +$var wire 1 x BorrowIN $end +$var wire 1 y BorrowOut $end +$var wire 1 z tempD $end +$var wire 1 { tempB2 $end +$var wire 1 | tempB1 $end +$var wire 1 } Difference $end +$scope module hf1 $end +$var wire 1 v A $end +$var wire 1 w B $end +$var wire 1 | Borrow $end +$var wire 1 z Difference $end +$var wire 1 ~ notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 z A $end +$var wire 1 x B $end +$var wire 1 { Borrow $end +$var wire 1 } Difference $end +$var wire 1 !" notA $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 "" A $end +$var wire 1 #" B $end +$var wire 1 $" BorrowIN $end +$var wire 1 %" BorrowOut $end +$var wire 1 &" tempD $end +$var wire 1 '" tempB2 $end +$var wire 1 (" tempB1 $end +$var wire 1 )" Difference $end +$scope module hf1 $end +$var wire 1 "" A $end +$var wire 1 #" B $end +$var wire 1 (" Borrow $end +$var wire 1 &" Difference $end +$var wire 1 *" notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 &" A $end +$var wire 1 $" B $end +$var wire 1 '" Borrow $end +$var wire 1 )" Difference $end +$var wire 1 +" notA $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 ," A $end +$var wire 1 -" B $end +$var wire 1 ." BorrowIN $end +$var wire 1 E BorrowOut $end +$var wire 1 /" tempD $end +$var wire 1 0" tempB2 $end +$var wire 1 1" tempB1 $end +$var wire 1 2" Difference $end +$scope module hf1 $end +$var wire 1 ," A $end +$var wire 1 -" B $end +$var wire 1 1" Borrow $end +$var wire 1 /" Difference $end +$var wire 1 3" notA $end +$upscope $end +$scope module hf2 $end +$var wire 1 /" A $end +$var wire 1 ." B $end +$var wire 1 0" Borrow $end +$var wire 1 2" Difference $end +$var wire 1 4" notA $end +$upscope $end +$upscope $end +$upscope $end +$upscope $end +$scope module btod1 $end +$var wire 8 5" binary [7:0] $end +$var wire 1 6" empty1 $end +$var wire 1 7" empty2 $end +$var wire 4 8" dab5 [3:0] $end +$var wire 4 9" dab4 [3:0] $end +$var wire 4 :" dab3 [3:0] $end +$var wire 4 ;" dab2 [3:0] $end +$var wire 4 <" dab1 [3:0] $end +$var wire 12 =" bcd [11:0] $end +$scope module d1t $end +$var wire 1 6" A $end +$var wire 1 >" B $end +$var wire 1 ?" C $end +$var wire 1 @" D $end +$var wire 1 A" E $end +$var wire 1 B" X $end +$var wire 1 C" Y $end +$var wire 1 D" Z $end +$var wire 1 E" nor1 $end +$var wire 1 F" nor2 $end +$var wire 1 G" nor3 $end +$var wire 1 H" or1 $end +$var wire 1 I" xor1 $end +$var wire 1 J" xor2 $end +$upscope $end +$scope module d2u $end +$var wire 1 K" A $end +$var wire 1 L" B $end +$var wire 1 M" C $end +$var wire 1 N" D $end +$var wire 1 O" E $end +$var wire 1 P" X $end +$var wire 1 Q" Y $end +$var wire 1 R" Z $end +$var wire 1 S" nor1 $end +$var wire 1 T" nor2 $end +$var wire 1 U" nor3 $end +$var wire 1 V" or1 $end +$var wire 1 W" xor1 $end +$var wire 1 X" xor2 $end +$upscope $end +$scope module d3v $end +$var wire 1 Y" A $end +$var wire 1 Z" B $end +$var wire 1 [" C $end +$var wire 1 \" D $end +$var wire 1 ]" E $end +$var wire 1 ^" X $end +$var wire 1 _" Y $end +$var wire 1 `" Z $end +$var wire 1 a" nor1 $end +$var wire 1 b" nor2 $end +$var wire 1 c" nor3 $end +$var wire 1 d" or1 $end +$var wire 1 e" xor1 $end +$var wire 1 f" xor2 $end +$upscope $end +$scope module d4w $end +$var wire 1 7" A $end +$var wire 1 g" B $end +$var wire 1 h" C $end +$var wire 1 i" D $end +$var wire 1 j" E $end +$var wire 1 k" X $end +$var wire 1 l" Y $end +$var wire 1 m" Z $end +$var wire 1 n" nor1 $end +$var wire 1 o" nor2 $end +$var wire 1 p" nor3 $end +$var wire 1 q" or1 $end +$var wire 1 r" xor1 $end +$var wire 1 s" xor2 $end +$upscope $end +$scope module d5x $end +$var wire 1 t" A $end +$var wire 1 u" B $end +$var wire 1 v" C $end +$var wire 1 w" D $end +$var wire 1 x" E $end +$var wire 1 y" X $end +$var wire 1 z" Y $end +$var wire 1 {" Z $end +$var wire 1 |" nor1 $end +$var wire 1 }" nor2 $end +$var wire 1 ~" nor3 $end +$var wire 1 !# or1 $end +$var wire 1 "# xor1 $end +$var wire 1 ## xor2 $end +$upscope $end +$scope module d6y $end +$var wire 1 $# A $end +$var wire 1 %# B $end +$var wire 1 &# C $end +$var wire 1 '# D $end +$var wire 1 (# E $end +$var wire 1 )# X $end +$var wire 1 *# Y $end +$var wire 1 +# Z $end +$var wire 1 ,# nor1 $end +$var wire 1 -# nor2 $end +$var wire 1 .# nor3 $end +$var wire 1 /# or1 $end +$var wire 1 0# xor1 $end +$var wire 1 1# xor2 $end +$upscope $end +$scope module d7z $end +$var wire 1 2# A $end +$var wire 1 3# B $end +$var wire 1 4# C $end +$var wire 1 5# D $end +$var wire 1 6# E $end +$var wire 1 7# X $end +$var wire 1 8# Y $end +$var wire 1 9# Z $end +$var wire 1 :# nor1 $end +$var wire 1 ;# nor2 $end +$var wire 1 <# nor3 $end +$var wire 1 =# or1 $end +$var wire 1 ># xor1 $end +$var wire 1 ?# xor2 $end +$upscope $end +$upscope $end +$scope module lU $end +$var wire 4 @# A [3:0] $end +$var wire 4 A# B [3:0] $end +$var wire 3 B# opCode [2:0] $end +$var wire 4 C# xor1 [3:0] $end +$var wire 4 D# resultX [3:0] $end +$var wire 4 E# resultO [3:0] $end +$var wire 4 F# resultA [3:0] $end +$var wire 4 G# or1 [3:0] $end +$var wire 4 H# and1 [3:0] $end +$upscope $end +$scope module mU $end +$var wire 4 I# A [3:0] $end +$var wire 4 J# B [3:0] $end +$var wire 1 K# overflow2 $end +$var wire 1 L# overflow1 $end +$var wire 1 M# overflow0 $end +$var wire 4 N# b0 [3:0] $end +$var wire 4 O# a2 [3:0] $end +$var wire 4 P# a1 [3:0] $end +$var wire 4 Q# a0 [3:0] $end +$var wire 8 R# Y [7:0] $end +$var wire 5 S# S2 [4:0] $end +$var wire 5 T# S1 [4:0] $end +$var wire 5 U# S0 [4:0] $end +$scope module add0 $end +$var wire 4 V# A [3:0] $end +$var wire 4 W# B [3:0] $end +$var wire 1 X# CarryIN $end +$var wire 1 M# overflow $end +$var wire 4 Y# Y [3:0] $end +$var wire 1 Z# CarryOUT $end +$var wire 3 [# Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 \# A $end +$var wire 1 ]# B $end +$var wire 1 X# Carry $end +$var wire 1 ^# CarryO $end +$var wire 1 _# xor1 $end +$var wire 1 `# and2 $end +$var wire 1 a# and1 $end +$var wire 1 b# Sum $end +$scope module h1 $end +$var wire 1 \# A $end +$var wire 1 ]# B $end +$var wire 1 a# Carry $end +$var wire 1 _# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 _# A $end +$var wire 1 X# B $end +$var wire 1 `# Carry $end +$var wire 1 b# Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 c# A $end +$var wire 1 d# B $end +$var wire 1 e# Carry $end +$var wire 1 f# CarryO $end +$var wire 1 g# xor1 $end +$var wire 1 h# and2 $end +$var wire 1 i# and1 $end +$var wire 1 j# Sum $end +$scope module h1 $end +$var wire 1 c# A $end +$var wire 1 d# B $end +$var wire 1 i# Carry $end +$var wire 1 g# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 g# A $end +$var wire 1 e# B $end +$var wire 1 h# Carry $end +$var wire 1 j# Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 k# A $end +$var wire 1 l# B $end +$var wire 1 m# Carry $end +$var wire 1 n# CarryO $end +$var wire 1 o# xor1 $end +$var wire 1 p# and2 $end +$var wire 1 q# and1 $end +$var wire 1 r# Sum $end +$scope module h1 $end +$var wire 1 k# A $end +$var wire 1 l# B $end +$var wire 1 q# Carry $end +$var wire 1 o# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 o# A $end +$var wire 1 m# B $end +$var wire 1 p# Carry $end +$var wire 1 r# Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 s# A $end +$var wire 1 t# B $end +$var wire 1 u# Carry $end +$var wire 1 Z# CarryO $end +$var wire 1 v# xor1 $end +$var wire 1 w# and2 $end +$var wire 1 x# and1 $end +$var wire 1 y# Sum $end +$scope module h1 $end +$var wire 1 s# A $end +$var wire 1 t# B $end +$var wire 1 x# Carry $end +$var wire 1 v# Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 v# A $end +$var wire 1 u# B $end +$var wire 1 w# Carry $end +$var wire 1 y# Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module add1 $end +$var wire 4 z# A [3:0] $end +$var wire 4 {# B [3:0] $end +$var wire 1 |# CarryIN $end +$var wire 1 L# overflow $end +$var wire 4 }# Y [3:0] $end +$var wire 1 ~# CarryOUT $end +$var wire 3 !$ Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 "$ A $end +$var wire 1 #$ B $end +$var wire 1 |# Carry $end +$var wire 1 $$ CarryO $end +$var wire 1 %$ xor1 $end +$var wire 1 &$ and2 $end +$var wire 1 '$ and1 $end +$var wire 1 ($ Sum $end +$scope module h1 $end +$var wire 1 "$ A $end +$var wire 1 #$ B $end +$var wire 1 '$ Carry $end +$var wire 1 %$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 %$ A $end +$var wire 1 |# B $end +$var wire 1 &$ Carry $end +$var wire 1 ($ Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 )$ A $end +$var wire 1 *$ B $end +$var wire 1 +$ Carry $end +$var wire 1 ,$ CarryO $end +$var wire 1 -$ xor1 $end +$var wire 1 .$ and2 $end +$var wire 1 /$ and1 $end +$var wire 1 0$ Sum $end +$scope module h1 $end +$var wire 1 )$ A $end +$var wire 1 *$ B $end +$var wire 1 /$ Carry $end +$var wire 1 -$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 -$ A $end +$var wire 1 +$ B $end +$var wire 1 .$ Carry $end +$var wire 1 0$ Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 1$ A $end +$var wire 1 2$ B $end +$var wire 1 3$ Carry $end +$var wire 1 4$ CarryO $end +$var wire 1 5$ xor1 $end +$var wire 1 6$ and2 $end +$var wire 1 7$ and1 $end +$var wire 1 8$ Sum $end +$scope module h1 $end +$var wire 1 1$ A $end +$var wire 1 2$ B $end +$var wire 1 7$ Carry $end +$var wire 1 5$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 5$ A $end +$var wire 1 3$ B $end +$var wire 1 6$ Carry $end +$var wire 1 8$ Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 9$ A $end +$var wire 1 :$ B $end +$var wire 1 ;$ Carry $end +$var wire 1 ~# CarryO $end +$var wire 1 <$ xor1 $end +$var wire 1 =$ and2 $end +$var wire 1 >$ and1 $end +$var wire 1 ?$ Sum $end +$scope module h1 $end +$var wire 1 9$ A $end +$var wire 1 :$ B $end +$var wire 1 >$ Carry $end +$var wire 1 <$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 <$ A $end +$var wire 1 ;$ B $end +$var wire 1 =$ Carry $end +$var wire 1 ?$ Sum $end +$upscope $end +$upscope $end +$upscope $end +$scope module add2 $end +$var wire 4 @$ A [3:0] $end +$var wire 4 A$ B [3:0] $end +$var wire 1 B$ CarryIN $end +$var wire 1 K# overflow $end +$var wire 4 C$ Y [3:0] $end +$var wire 1 D$ CarryOUT $end +$var wire 3 E$ Carry4 [2:0] $end +$scope module f0 $end +$var wire 1 F$ A $end +$var wire 1 G$ B $end +$var wire 1 B$ Carry $end +$var wire 1 H$ CarryO $end +$var wire 1 I$ xor1 $end +$var wire 1 J$ and2 $end +$var wire 1 K$ and1 $end +$var wire 1 L$ Sum $end +$scope module h1 $end +$var wire 1 F$ A $end +$var wire 1 G$ B $end +$var wire 1 K$ Carry $end +$var wire 1 I$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 I$ A $end +$var wire 1 B$ B $end +$var wire 1 J$ Carry $end +$var wire 1 L$ Sum $end +$upscope $end +$upscope $end +$scope module f1 $end +$var wire 1 M$ A $end +$var wire 1 N$ B $end +$var wire 1 O$ Carry $end +$var wire 1 P$ CarryO $end +$var wire 1 Q$ xor1 $end +$var wire 1 R$ and2 $end +$var wire 1 S$ and1 $end +$var wire 1 T$ Sum $end +$scope module h1 $end +$var wire 1 M$ A $end +$var wire 1 N$ B $end +$var wire 1 S$ Carry $end +$var wire 1 Q$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 Q$ A $end +$var wire 1 O$ B $end +$var wire 1 R$ Carry $end +$var wire 1 T$ Sum $end +$upscope $end +$upscope $end +$scope module f2 $end +$var wire 1 U$ A $end +$var wire 1 V$ B $end +$var wire 1 W$ Carry $end +$var wire 1 X$ CarryO $end +$var wire 1 Y$ xor1 $end +$var wire 1 Z$ and2 $end +$var wire 1 [$ and1 $end +$var wire 1 \$ Sum $end +$scope module h1 $end +$var wire 1 U$ A $end +$var wire 1 V$ B $end +$var wire 1 [$ Carry $end +$var wire 1 Y$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 Y$ A $end +$var wire 1 W$ B $end +$var wire 1 Z$ Carry $end +$var wire 1 \$ Sum $end +$upscope $end +$upscope $end +$scope module f3 $end +$var wire 1 ]$ A $end +$var wire 1 ^$ B $end +$var wire 1 _$ Carry $end +$var wire 1 D$ CarryO $end +$var wire 1 `$ xor1 $end +$var wire 1 a$ and2 $end +$var wire 1 b$ and1 $end +$var wire 1 c$ Sum $end +$scope module h1 $end +$var wire 1 ]$ A $end +$var wire 1 ^$ B $end +$var wire 1 b$ Carry $end +$var wire 1 `$ Sum $end +$upscope $end +$scope module h2 $end +$var wire 1 `$ A $end +$var wire 1 _$ B $end +$var wire 1 a$ Carry $end +$var wire 1 c$ Sum $end +$upscope $end +$upscope $end +$upscope $end +$upscope $end +$scope module opCd $end +$var wire 3 d$ A [2:0] $end +$var wire 1 e$ and1 $end +$var wire 1 f$ and2 $end +$var wire 1 g$ and3 $end +$var wire 1 h$ and4 $end +$var wire 1 i$ notA $end +$var wire 1 j$ notB $end +$var wire 1 k$ notC $end +$var wire 8 l$ opCode [7:0] $end +$upscope $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b100 l$ +1k$ +0j$ +1i$ +0h$ +0g$ +1f$ +0e$ +b10 d$ +0c$ +0b$ +1a$ +1`$ +1_$ +0^$ +1]$ +0\$ +1[$ +0Z$ +0Y$ +1X$ +0W$ +1V$ +1U$ +1T$ +0S$ +0R$ +1Q$ +0P$ +0O$ +1N$ +0M$ +0L$ +0K$ +0J$ +0I$ +0H$ +0G$ +0F$ +b100 E$ +1D$ +b10 C$ +0B$ +b110 A$ +b1100 @$ +1?$ +0>$ +0=$ +1<$ +0;$ +0:$ +19$ +18$ +07$ +06$ +15$ +04$ +03$ +02$ +11$ +00$ +0/$ +0.$ +0-$ +0,$ +0+$ +0*$ +0)$ +0($ +0'$ +0&$ +0%$ +0$$ +0#$ +0"$ +b0 !$ +0~# +b1100 }# +0|# +b0 {# +b1100 z# +0y# +0x# +0w# +0v# +0u# +0t# +0s# +0r# +0q# +0p# +0o# +0n# +0m# +0l# +0k# +0j# +0i# +0h# +0g# +0f# +0e# +0d# +0c# +0b# +0a# +0`# +0_# +0^# +0]# +0\# +b0 [# +0Z# +b0 Y# +0X# +b0 W# +b0 V# +b0 U# +b1100 T# +b10010 S# +b10010000 R# +b0 Q# +b1100 P# +b1100 O# +b0 N# +0M# +0L# +0K# +b1100 J# +b1100 I# +b1100 H# +b1100 G# +b0 F# +b0 E# +b0 D# +b0 C# +b0 B# +b1100 A# +b1100 @# +1?# +0># +1=# +0<# +0;# +1:# +19# +08# +07# +06# +05# +14# +03# +02# +11# +10# +1/# +1.# +0-# +0,# +1+# +0*# +1)# +0(# +1'# +1&# +1%# +0$# +1## +0"# +0!# +1~" +0}" +0|" +0{" +0z" +1y" +1x" +0w" +1v" +1u" +0t" +1s" +1r" +1q" +0p" +0o" +1n" +1m" +0l" +0k" +1j" +1i" +1h" +0g" +1f" +1e" +1d" +1c" +0b" +0a" +1`" +0_" +1^" +1]" +0\" +0[" +0Z" +1Y" +1X" +0W" +0V" +1U" +0T" +0S" +0R" +1Q" +1P" +0O" +1N" +0M" +0L" +1K" +0J" +0I" +0H" +0G" +1F" +0E" +0D" +1C" +0B" +0A" +0@" +0?" +1>" +b101000100 =" +b10 <" +b11 ;" +b1101 :" +b110z 9" +b1001 8" +07" +06" +b10010000 5" +14" +03" +02" +01" +00" +0/" +0." +1-" +1," +1+" +0*" +0)" +0(" +0'" +0&" +0%" +0$" +1#" +1"" +1!" +1~ +0} +0| +0{ +0z +0y +0x +0w +0v +1u +1t +0s +0r +0q +0p +0o +0n +0m +b0 l +bz000 k +b1100 j +b1100 i +1h +1g +0f +0e +1d +1c +1b +0a +1` +0_ +0^ +1] +0\ +1[ +1Z +0Y +0X +0W +0V +0U +0T +0S +0R +0Q +0P +0O +0N +0M +0L +0K +b100 J +b1000 I +b1100 H +b1100 G +1F +0E +b1000 D +b0 C +b0 B +b0 A +0@ +0? +0> +b0 = +b1100 < +b1100 ; +b10010000 : +b0 9 +b0 8 +b0 7 +b101000100 6 +b0 5 +b0 4 +b100 3 +b10010000 2 +b0 1 +b0 0 +b0 / +b0 . +b0 - +b10010000 , +b0 + +b10 * +b1100 ) +b1100 ( +b10 ' +0& +b1100 % +b1100 $ +0# +b101000100 " +0! +$end +#5 diff --git a/spartanTest/ALUtb.v b/spartanTest/ALUtb.v new file mode 100644 index 0000000..4319a58 --- /dev/null +++ b/spartanTest/ALUtb.v @@ -0,0 +1,26 @@ +module ALUtb (); + + reg [3:0] A, B; + reg CarryIN; + reg [2:0] opCodeA; + wire [11:0] bcd; + wire CarryOUT, overflow; + +ALU uut ( + .A(A), + .B(B), + .CarryIN(CarryIN), + .opCodeA(opCodeA), + .bcd(bcd), + .CarryOUT(CarryOUT), + .overflow(overflow) +); + +initial begin + $dumpfile("ALU.vcd"); + $dumpvars; + A = 4'b1100; B = 4'b1100; CarryIN = 1'b0; opCodeA = 3'b010; #5; + $finish; +end + +endmodule diff --git a/spartanTest/selector b/spartanTest/selector new file mode 100644 index 0000000..e4adfe9 --- /dev/null +++ b/spartanTest/selector @@ -0,0 +1,140 @@ +#! /usr/bin/vvp +:ivl_version "11.0 (stable)"; +:ivl_delay_selection "TYPICAL"; +:vpi_time_precision + 0; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/system.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_sys.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; +:vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; +S_0x558eb92edb80 .scope module, "selectorTB" "selectorTB" 2 1; + .timescale 0 0; +v0x558eb9317af0_0 .var "A", 3 0; +v0x558eb9317bd0_0 .var "ALUY", 7 0; +v0x558eb9317ca0_0 .var "B", 3 0; +v0x558eb9317da0_0 .net "Y", 7 0, v0x558eb9317740_0; 1 drivers +v0x558eb9317e70_0 .var "opCodeA", 2 0; +v0x558eb9317f60_0 .var "select", 1 0; +S_0x558eb9302140 .scope module, "uut" "selector" 2 9, 3 1 0, S_0x558eb92edb80; + .timescale 0 0; + .port_info 0 /INPUT 4 "A"; + .port_info 1 /INPUT 4 "B"; + .port_info 2 /INPUT 3 "opCodeA"; + .port_info 3 /INPUT 2 "select"; + .port_info 4 /INPUT 8 "ALUY"; + .port_info 5 /OUTPUT 8 "Y"; +v0x558eb9302350_0 .net "A", 3 0, v0x558eb9317af0_0; 1 drivers +v0x558eb93175a0_0 .net "ALUY", 7 0, v0x558eb9317bd0_0; 1 drivers +v0x558eb9317680_0 .net "B", 3 0, v0x558eb9317ca0_0; 1 drivers +v0x558eb9317740_0 .var "Y", 7 0; +v0x558eb9317820_0 .net "opCodeA", 2 0, v0x558eb9317e70_0; 1 drivers +v0x558eb9317950_0 .net "select", 1 0, v0x558eb9317f60_0; 1 drivers +E_0x558eb93001f0/0 .event edge, v0x558eb9317950_0, v0x558eb9302350_0, v0x558eb9317680_0, v0x558eb9317820_0; +E_0x558eb93001f0/1 .event edge, v0x558eb93175a0_0; +E_0x558eb93001f0 .event/or E_0x558eb93001f0/0, E_0x558eb93001f0/1; + .scope S_0x558eb9302140; +T_0 ; + %wait E_0x558eb93001f0; + %load/vec4 v0x558eb9317950_0; + %dup/vec4; + %pushi/vec4 0, 0, 2; + %cmp/u; + %jmp/1 T_0.0, 6; + %dup/vec4; + %pushi/vec4 1, 0, 2; + %cmp/u; + %jmp/1 T_0.1, 6; + %dup/vec4; + %pushi/vec4 2, 0, 2; + %cmp/u; + %jmp/1 T_0.2, 6; + %dup/vec4; + %pushi/vec4 3, 0, 2; + %cmp/u; + %jmp/1 T_0.3, 6; + %pushi/vec4 0, 0, 8; + %store/vec4 v0x558eb9317740_0, 0, 8; + %jmp T_0.5; +T_0.0 ; + %pushi/vec4 0, 0, 4; + %load/vec4 v0x558eb9302350_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x558eb9317740_0, 0, 8; + %jmp T_0.5; +T_0.1 ; + %pushi/vec4 0, 0, 4; + %load/vec4 v0x558eb9317680_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x558eb9317740_0, 0, 8; + %jmp T_0.5; +T_0.2 ; + %pushi/vec4 0, 0, 5; + %load/vec4 v0x558eb9317820_0; + %concat/vec4; draw_concat_vec4 + %store/vec4 v0x558eb9317740_0, 0, 8; + %jmp T_0.5; +T_0.3 ; + %load/vec4 v0x558eb93175a0_0; + %store/vec4 v0x558eb9317740_0, 0, 8; + %jmp T_0.5; +T_0.5 ; + %pop/vec4 1; + %jmp T_0; + .thread T_0, $push; + .scope S_0x558eb92edb80; +T_1 ; + %vpi_call 2 19 "$dumpfile", "selector.vcd" {0 0 0}; + %vpi_call 2 20 "$dumpvars" {0 0 0}; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x558eb9317af0_0, 0, 4; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x558eb9317ca0_0, 0, 4; + %pushi/vec4 7, 0, 3; + %store/vec4 v0x558eb9317e70_0, 0, 3; + %pushi/vec4 240, 0, 8; + %store/vec4 v0x558eb9317bd0_0, 0, 8; + %pushi/vec4 0, 0, 2; + %store/vec4 v0x558eb9317f60_0, 0, 2; + %delay 5, 0; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x558eb9317af0_0, 0, 4; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x558eb9317ca0_0, 0, 4; + %pushi/vec4 7, 0, 3; + %store/vec4 v0x558eb9317e70_0, 0, 3; + %pushi/vec4 240, 0, 8; + %store/vec4 v0x558eb9317bd0_0, 0, 8; + %pushi/vec4 1, 0, 2; + %store/vec4 v0x558eb9317f60_0, 0, 2; + %delay 5, 0; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x558eb9317af0_0, 0, 4; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x558eb9317ca0_0, 0, 4; + %pushi/vec4 7, 0, 3; + %store/vec4 v0x558eb9317e70_0, 0, 3; + %pushi/vec4 112, 0, 8; + %store/vec4 v0x558eb9317bd0_0, 0, 8; + %pushi/vec4 2, 0, 2; + %store/vec4 v0x558eb9317f60_0, 0, 2; + %delay 5, 0; + %pushi/vec4 1, 0, 4; + %store/vec4 v0x558eb9317af0_0, 0, 4; + %pushi/vec4 2, 0, 4; + %store/vec4 v0x558eb9317ca0_0, 0, 4; + %pushi/vec4 7, 0, 3; + %store/vec4 v0x558eb9317e70_0, 0, 3; + %pushi/vec4 112, 0, 8; + %store/vec4 v0x558eb9317bd0_0, 0, 8; + %pushi/vec4 3, 0, 2; + %store/vec4 v0x558eb9317f60_0, 0, 2; + %delay 5, 0; + %vpi_call 2 25 "$finish" {0 0 0}; + %end; + .thread T_1; +# The file index is used to find the file name in the following table. +:file_names 4; + "N/A"; + ""; + "selectorTB.v"; + "selector.v"; diff --git a/spartanTest/selector.v b/spartanTest/selector.v index a54b5f3..57052c5 100644 --- a/spartanTest/selector.v +++ b/spartanTest/selector.v @@ -1,68 +1,20 @@ module selector ( - input [3:0] select, - input [7:0] Y, - input [3:0] A, B, + input [3:0] A, + input [3:0] B, input [2:0] opCodeA, - output [7:0] s0 + input [1:0] select, + input [7:0] ALUY, + output reg [7:0] Y ); -wire [3:0] a0, b0, tempAB, tempYO; -wire [7:0] y0; -wire [2:0] op0; -wire tempsO, temps; - -// Select signals for A -and a00 (a0[0], select[0], A[0]); -and a01 (a0[1], select[0], A[1]); -and a02 (a0[2], select[0], A[2]); -and a03 (a0[3], select[0], A[3]); - -// Select signals for B -and b00 (b0[0], select[1], B[0]); -and b01 (b0[1], select[1], B[1]); -and b02 (b0[2], select[1], B[2]); -and b03 (b0[3], select[1], B[3]); - -// Select signals for Y -and y00 (y0[0], select[2], Y[0]); -and y01 (y0[1], select[2], Y[1]); -and y02 (y0[2], select[2], Y[2]); -and y03 (y0[3], select[2], Y[3]); -and y04 (y0[4], select[2], Y[4]); -and y05 (y0[5], select[2], Y[5]); -and y06 (y0[6], select[2], Y[6]); -and y07 (y0[7], select[2], Y[7]); - -// Select signals for opCodeA -and op00 (op0[0], select[3], opCodeA[0]); -and op01 (op0[1], select[3], opCodeA[1]); -and op02 (op0[2], select[3], opCodeA[2]); - -// Combine A and B -or or1 (tempAB[0], a0[0], b0[0]); -or or2 (tempAB[1], a0[1], b0[1]); -or or3 (tempAB[2], a0[2], b0[2]); -or or4 (tempAB[3], a0[3], b0[3]); - -// Combine Y and opCodeA -or or5 (tempYO[0], y0[0], op0[0]); -or or6 (tempYO[1], y0[1], op0[1]); -or or7 (tempYO[2], y0[2], op0[2]); -or or8 (tempYO[3], y0[3], 1'b0); - -// NOR for select logic -nor s01 (tempsO, select[0], select[1]); -nor s02 (temps, tempsO, select[3]); - -// Final s0 connections -or or9 (s0[0], tempAB[0], tempYO[0]); -or or10 (s0[1], tempAB[1], tempYO[1]); -or or11 (s0[2], tempAB[2], tempYO[2]); -or or12 (s0[3], tempAB[3], tempYO[3]); - -and and13 (s0[4], y0[4], temps); -and and14 (s0[5], y0[5], temps); -and and15 (s0[6], y0[6], temps); -and and16 (s0[7], y0[7], temps); +always @(*) begin + case (select) + 2'b00: Y = {4'b0000, A}; // Zero-extend A to 8 bits + 2'b01: Y = {4'b0000, B}; // Zero-extend B to 8 bits + 2'b10: Y = {5'b00000, opCodeA}; // Zero-extend opCodeA to 8 bits + 2'b11: Y = ALUY; // Directly assign ALUY + default: Y = 8'b00000000; // Default case for safety + endcase +end endmodule diff --git a/spartanTest/selector.vcd b/spartanTest/selector.vcd new file mode 100644 index 0000000..6bcb8a1 --- /dev/null +++ b/spartanTest/selector.vcd @@ -0,0 +1,59 @@ +$date + Sat Jan 18 17:21:23 2025 +$end +$version + Icarus Verilog +$end +$timescale + 1s +$end +$scope module selectorTB $end +$var wire 8 ! Y [7:0] $end +$var reg 4 " A [3:0] $end +$var reg 8 # ALUY [7:0] $end +$var reg 4 $ B [3:0] $end +$var reg 3 % opCodeA [2:0] $end +$var reg 2 & select [1:0] $end +$scope module uut $end +$var wire 4 ' A [3:0] $end +$var wire 8 ( ALUY [7:0] $end +$var wire 4 ) B [3:0] $end +$var wire 3 * opCodeA [2:0] $end +$var wire 2 + select [1:0] $end +$var reg 8 , Y [7:0] $end +$upscope $end +$upscope $end +$enddefinitions $end +#0 +$dumpvars +b1 , +b0 + +b111 * +b10 ) +b11110000 ( +b1 ' +b0 & +b111 % +b10 $ +b11110000 # +b1 " +b1 ! +$end +#5 +b10 ! +b10 , +b1 & +b1 + +#10 +b111 ! +b111 , +b10 & +b10 + +b1110000 # +b1110000 ( +#15 +b1110000 ! +b1110000 , +b11 & +b11 + +#20 diff --git a/spartanTest/selectorTB.v b/spartanTest/selectorTB.v index 2148f69..ba11c01 100644 --- a/spartanTest/selectorTB.v +++ b/spartanTest/selectorTB.v @@ -1,25 +1,27 @@ module selectorTB(); -reg [3:0] select, A, B; -reg [7:0] Y; +reg [1:0] select; +reg [3:0] A, B; +reg [7:0] ALUY; reg [2:0] opCodeA; -wire [7:0] s0; +wire [7:0] Y; selector uut ( .select(select), .A(A), .B(B), .opCodeA(opCodeA), - .s0(s0) + .ALUY(ALUY), + .Y(Y) ); initial begin $dumpfile("selector.vcd"); $dumpvars; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0010; #5; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0001; #5; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b0100; #5; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b1000; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; ALUY = 8'b1111_0000; select = 2'b00; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; ALUY = 8'b1111_0000; select = 2'b01; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; ALUY = 8'b0111_0000; select = 2'b10; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; ALUY = 8'b0111_0000; select = 2'b11; #5; $finish; end