diff --git a/project0.2/selector b/project0.2/selector index 98a0d8c..494bb54 100644 --- a/project0.2/selector +++ b/project0.2/selector @@ -7,15 +7,15 @@ :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; -S_0x564261ee80a0 .scope module, "selectorTB" "selectorTB" 2 1; +S_0x55b89815f210 .scope module, "selectorTB" "selectorTB" 2 1; .timescale 0 0; -v0x564261f0f000_0 .var "A", 3 0; -v0x564261f0f0e0_0 .var "B", 3 0; -v0x564261f0f1b0_0 .var "Y", 7 0; -v0x564261f0f280_0 .var "opCodeA", 2 0; -v0x564261f0f370_0 .net "s0", 7 0, L_0x564261f18a20; 1 drivers -v0x564261f0f410_0 .var "select", 3 0; -S_0x564261eda760 .scope module, "uut" "selector" 2 8, 3 1 0, S_0x564261ee80a0; +v0x55b898185a70_0 .var "A", 3 0; +v0x55b898185b50_0 .var "B", 3 0; +v0x55b898185c20_0 .var "Y", 7 0; +v0x55b898185cf0_0 .var "opCodeA", 2 0; +v0x55b898185de0_0 .net "s0", 7 0, L_0x55b89818e810; 1 drivers +v0x55b898185e80_0 .var "select", 3 0; +S_0x55b898152b60 .scope module, "uut" "selector" 2 8, 3 1 0, S_0x55b89815f210; .timescale 0 0; .port_info 0 /INPUT 4 "select"; .port_info 1 /INPUT 8 "Y"; @@ -23,289 +23,271 @@ S_0x564261eda760 .scope module, "uut" "selector" 2 8, 3 1 0, S_0x564261ee80a0; .port_info 3 /INPUT 4 "B"; .port_info 4 /INPUT 3 "opCodeA"; .port_info 5 /OUTPUT 8 "s0"; -L_0x564261f0f4e0 .functor AND 1, L_0x564261f0f5e0, L_0x564261f0f720, C4<1>, C4<1>; -L_0x564261f0f860 .functor AND 1, L_0x564261f0f8d0, L_0x564261f0f9c0, C4<1>, C4<1>; -L_0x564261f0fae0 .functor AND 1, L_0x564261f0fb50, L_0x564261f0fc40, C4<1>, C4<1>; -L_0x564261f0fe60 .functor AND 1, L_0x564261f0ff50, L_0x564261f10090, C4<1>, C4<1>; -L_0x564261f10180 .functor AND 1, L_0x564261f101f0, L_0x564261f10340, C4<1>, C4<1>; -L_0x564261f10430 .functor AND 1, L_0x564261f104e0, L_0x564261f10640, C4<1>, C4<1>; -L_0x564261f10730 .functor AND 1, L_0x564261f107a0, L_0x564261f10910, C4<1>, C4<1>; -L_0x564261f105d0 .functor AND 1, L_0x564261f10c70, L_0x564261f10d60, C4<1>, C4<1>; -L_0x564261f10ef0 .functor AND 1, L_0x564261f10f60, L_0x564261f11050, C4<1>, C4<1>; -L_0x564261f111f0 .functor AND 1, L_0x564261f10e50, L_0x564261f112f0, C4<1>, C4<1>; -L_0x564261f114f0 .functor AND 1, L_0x564261f11560, L_0x564261f11650, C4<1>, C4<1>; -L_0x564261f11810 .functor AND 1, L_0x564261f11920, L_0x564261f11a10, C4<1>, C4<1>; -L_0x564261f11be0 .functor AND 1, L_0x564261f11c80, L_0x564261f11d20, C4<1>, C4<1>; -L_0x564261f11f00 .functor AND 1, L_0x564261f12020, L_0x564261f12110, C4<1>, C4<1>; -L_0x564261f118b0 .functor AND 1, L_0x564261f12330, L_0x564261f12420, C4<1>, C4<1>; -L_0x564261f12940 .functor AND 1, L_0x564261f12a90, L_0x564261f12ca0, C4<1>, C4<1>; -L_0x564261f12d90 .functor AND 1, L_0x564261f12e00, L_0x564261f13020, C4<1>, C4<1>; -L_0x564261f13160 .functor AND 1, L_0x564261f13270, L_0x564261f134a0, C4<1>, C4<1>; -L_0x564261f13820 .functor AND 1, L_0x564261f138e0, L_0x564261f139d0, C4<1>, C4<1>; -L_0x564261f13c20 .functor OR 1, L_0x564261f131d0, L_0x564261f13d90, C4<0>, C4<0>; -L_0x564261f14040 .functor OR 1, L_0x564261f140b0, L_0x564261f141a0, C4<0>, C4<0>; -L_0x564261f14410 .functor OR 1, L_0x564261f14540, L_0x564261f14630, C4<0>, C4<0>; -L_0x564261f14a30 .functor OR 1, L_0x564261f14af0, L_0x564261f14d80, C4<0>, C4<0>; -L_0x564261f14e70 .functor OR 1, L_0x564261f14fb0, L_0x564261f152a0, C4<0>, C4<0>; -L_0x564261f153e0 .functor OR 1, L_0x564261f15450, L_0x564261f15700, C4<0>, C4<0>; -L_0x564261f157f0 .functor OR 1, L_0x564261f15940, L_0x564261f15c90, C4<0>, C4<0>; -L_0x7f87ae4bf018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; -L_0x564261f160e0 .functor OR 1, L_0x564261f161a0, L_0x7f87ae4bf018, C4<0>, C4<0>; -L_0x564261f162e0 .functor NOR 1, L_0x564261f16440, L_0x564261f16720, C4<0>, C4<0>; -L_0x564261f16810 .functor NOR 1, L_0x564261f162e0, L_0x564261f168d0, C4<0>, C4<0>; -L_0x564261f16bc0 .functor OR 1, L_0x564261f16d30, L_0x564261f16e70, C4<0>, C4<0>; -L_0x564261f171c0 .functor OR 1, L_0x564261f17230, L_0x564261f17320, C4<0>, C4<0>; -L_0x564261f17630 .functor OR 1, L_0x564261f177b0, L_0x564261f17930, C4<0>, C4<0>; -L_0x564261f17c90 .functor OR 1, L_0x564261f17d00, L_0x564261f17da0, C4<0>, C4<0>; -L_0x564261f180d0 .functor AND 1, L_0x564261f182b0, L_0x564261f16810, C4<1>, C4<1>; -L_0x564261f183a0 .functor AND 1, L_0x564261f18410, L_0x564261f16810, C4<1>, C4<1>; -L_0x564261f18750 .functor AND 1, L_0x564261f18980, L_0x564261f16810, C4<1>, C4<1>; -L_0x564261f18ff0 .functor AND 1, L_0x564261f190b0, L_0x564261f16810, C4<1>, C4<1>; -v0x564261ee4830_0 .net "A", 3 0, v0x564261f0f000_0; 1 drivers -v0x564261ee3bc0_0 .net "B", 3 0, v0x564261f0f0e0_0; 1 drivers -o0x7f87ae508078 .functor BUFZ 8, C4; HiZ drive -v0x564261ee2f20_0 .net "Y", 7 0, o0x7f87ae508078; 0 drivers -v0x564261f08470_0 .net *"_ivl_0", 0 0, L_0x564261f0f4e0; 1 drivers -v0x564261f08550_0 .net *"_ivl_102", 0 0, L_0x564261f12e00; 1 drivers -v0x564261f08680_0 .net *"_ivl_104", 0 0, L_0x564261f13020; 1 drivers -v0x564261f08760_0 .net *"_ivl_105", 0 0, L_0x564261f13160; 1 drivers -v0x564261f08840_0 .net *"_ivl_108", 0 0, L_0x564261f13270; 1 drivers -v0x564261f08920_0 .net *"_ivl_11", 0 0, L_0x564261f0f9c0; 1 drivers -v0x564261f08a00_0 .net *"_ivl_110", 0 0, L_0x564261f134a0; 1 drivers -v0x564261f08ae0_0 .net *"_ivl_111", 0 0, L_0x564261f13820; 1 drivers -v0x564261f08bc0_0 .net *"_ivl_115", 0 0, L_0x564261f138e0; 1 drivers -v0x564261f08ca0_0 .net *"_ivl_117", 0 0, L_0x564261f139d0; 1 drivers -v0x564261f08d80_0 .net *"_ivl_118", 0 0, L_0x564261f13c20; 1 drivers -v0x564261f08e60_0 .net *"_ivl_12", 0 0, L_0x564261f0fae0; 1 drivers -v0x564261f08f40_0 .net *"_ivl_121", 0 0, L_0x564261f131d0; 1 drivers -v0x564261f09020_0 .net *"_ivl_123", 0 0, L_0x564261f13d90; 1 drivers -v0x564261f09100_0 .net *"_ivl_124", 0 0, L_0x564261f14040; 1 drivers -v0x564261f091e0_0 .net *"_ivl_127", 0 0, L_0x564261f140b0; 1 drivers -v0x564261f092c0_0 .net *"_ivl_129", 0 0, L_0x564261f141a0; 1 drivers -v0x564261f093a0_0 .net *"_ivl_130", 0 0, L_0x564261f14410; 1 drivers -v0x564261f09480_0 .net *"_ivl_133", 0 0, L_0x564261f14540; 1 drivers -v0x564261f09560_0 .net *"_ivl_135", 0 0, L_0x564261f14630; 1 drivers -v0x564261f09640_0 .net *"_ivl_136", 0 0, L_0x564261f14a30; 1 drivers -v0x564261f09720_0 .net *"_ivl_140", 0 0, L_0x564261f14af0; 1 drivers -v0x564261f09800_0 .net *"_ivl_142", 0 0, L_0x564261f14d80; 1 drivers -v0x564261f098e0_0 .net *"_ivl_143", 0 0, L_0x564261f14e70; 1 drivers -v0x564261f099c0_0 .net *"_ivl_146", 0 0, L_0x564261f14fb0; 1 drivers -v0x564261f09aa0_0 .net *"_ivl_148", 0 0, L_0x564261f152a0; 1 drivers -v0x564261f09b80_0 .net *"_ivl_149", 0 0, L_0x564261f153e0; 1 drivers -v0x564261f09c60_0 .net *"_ivl_15", 0 0, L_0x564261f0fb50; 1 drivers -v0x564261f09d40_0 .net *"_ivl_152", 0 0, L_0x564261f15450; 1 drivers -v0x564261f09e20_0 .net *"_ivl_154", 0 0, L_0x564261f15700; 1 drivers -v0x564261f0a110_0 .net *"_ivl_155", 0 0, L_0x564261f157f0; 1 drivers -v0x564261f0a1f0_0 .net *"_ivl_158", 0 0, L_0x564261f15940; 1 drivers -v0x564261f0a2d0_0 .net *"_ivl_160", 0 0, L_0x564261f15c90; 1 drivers -v0x564261f0a3b0_0 .net *"_ivl_161", 0 0, L_0x564261f160e0; 1 drivers -v0x564261f0a490_0 .net *"_ivl_165", 0 0, L_0x564261f161a0; 1 drivers -v0x564261f0a570_0 .net/2u *"_ivl_166", 0 0, L_0x7f87ae4bf018; 1 drivers -v0x564261f0a650_0 .net *"_ivl_169", 0 0, L_0x564261f16440; 1 drivers -v0x564261f0a730_0 .net *"_ivl_17", 0 0, L_0x564261f0fc40; 1 drivers -v0x564261f0a810_0 .net *"_ivl_171", 0 0, L_0x564261f16720; 1 drivers -v0x564261f0a8f0_0 .net *"_ivl_173", 0 0, L_0x564261f168d0; 1 drivers -v0x564261f0a9d0_0 .net *"_ivl_174", 0 0, L_0x564261f16bc0; 1 drivers -v0x564261f0aab0_0 .net *"_ivl_177", 0 0, L_0x564261f16d30; 1 drivers -v0x564261f0ab90_0 .net *"_ivl_179", 0 0, L_0x564261f16e70; 1 drivers -v0x564261f0ac70_0 .net *"_ivl_18", 0 0, L_0x564261f0fe60; 1 drivers -v0x564261f0ad50_0 .net *"_ivl_180", 0 0, L_0x564261f171c0; 1 drivers -v0x564261f0ae30_0 .net *"_ivl_183", 0 0, L_0x564261f17230; 1 drivers -v0x564261f0af10_0 .net *"_ivl_185", 0 0, L_0x564261f17320; 1 drivers -v0x564261f0aff0_0 .net *"_ivl_186", 0 0, L_0x564261f17630; 1 drivers -v0x564261f0b0d0_0 .net *"_ivl_189", 0 0, L_0x564261f177b0; 1 drivers -v0x564261f0b1b0_0 .net *"_ivl_191", 0 0, L_0x564261f17930; 1 drivers -v0x564261f0b290_0 .net *"_ivl_192", 0 0, L_0x564261f17c90; 1 drivers -v0x564261f0b370_0 .net *"_ivl_195", 0 0, L_0x564261f17d00; 1 drivers -v0x564261f0b450_0 .net *"_ivl_197", 0 0, L_0x564261f17da0; 1 drivers -v0x564261f0b530_0 .net *"_ivl_198", 0 0, L_0x564261f180d0; 1 drivers -v0x564261f0b610_0 .net *"_ivl_201", 0 0, L_0x564261f182b0; 1 drivers -v0x564261f0b6f0_0 .net *"_ivl_202", 0 0, L_0x564261f183a0; 1 drivers -v0x564261f0b7d0_0 .net *"_ivl_205", 0 0, L_0x564261f18410; 1 drivers -v0x564261f0b8b0_0 .net *"_ivl_206", 0 0, L_0x564261f18750; 1 drivers -v0x564261f0b990_0 .net *"_ivl_209", 0 0, L_0x564261f18980; 1 drivers -v0x564261f0ba70_0 .net *"_ivl_210", 0 0, L_0x564261f18ff0; 1 drivers -v0x564261f0bb50_0 .net *"_ivl_214", 0 0, L_0x564261f190b0; 1 drivers -v0x564261f0bc30_0 .net *"_ivl_22", 0 0, L_0x564261f0ff50; 1 drivers -v0x564261f0c120_0 .net *"_ivl_24", 0 0, L_0x564261f10090; 1 drivers -v0x564261f0c200_0 .net *"_ivl_25", 0 0, L_0x564261f10180; 1 drivers -v0x564261f0c2e0_0 .net *"_ivl_28", 0 0, L_0x564261f101f0; 1 drivers -v0x564261f0c3c0_0 .net *"_ivl_3", 0 0, L_0x564261f0f5e0; 1 drivers -v0x564261f0c4a0_0 .net *"_ivl_30", 0 0, L_0x564261f10340; 1 drivers -v0x564261f0c580_0 .net *"_ivl_31", 0 0, L_0x564261f10430; 1 drivers -v0x564261f0c660_0 .net *"_ivl_34", 0 0, L_0x564261f104e0; 1 drivers -v0x564261f0c740_0 .net *"_ivl_36", 0 0, L_0x564261f10640; 1 drivers -v0x564261f0c820_0 .net *"_ivl_37", 0 0, L_0x564261f10730; 1 drivers -v0x564261f0c900_0 .net *"_ivl_40", 0 0, L_0x564261f107a0; 1 drivers -v0x564261f0c9e0_0 .net *"_ivl_42", 0 0, L_0x564261f10910; 1 drivers -v0x564261f0cac0_0 .net *"_ivl_43", 0 0, L_0x564261f105d0; 1 drivers -v0x564261f0cba0_0 .net *"_ivl_47", 0 0, L_0x564261f10c70; 1 drivers -v0x564261f0cc80_0 .net *"_ivl_49", 0 0, L_0x564261f10d60; 1 drivers -v0x564261f0cd60_0 .net *"_ivl_5", 0 0, L_0x564261f0f720; 1 drivers -v0x564261f0ce40_0 .net *"_ivl_50", 0 0, L_0x564261f10ef0; 1 drivers -v0x564261f0cf20_0 .net *"_ivl_53", 0 0, L_0x564261f10f60; 1 drivers -v0x564261f0d000_0 .net *"_ivl_55", 0 0, L_0x564261f11050; 1 drivers -v0x564261f0d0e0_0 .net *"_ivl_56", 0 0, L_0x564261f111f0; 1 drivers -v0x564261f0d1c0_0 .net *"_ivl_59", 0 0, L_0x564261f10e50; 1 drivers -v0x564261f0d2a0_0 .net *"_ivl_6", 0 0, L_0x564261f0f860; 1 drivers -v0x564261f0d380_0 .net *"_ivl_61", 0 0, L_0x564261f112f0; 1 drivers -v0x564261f0d460_0 .net *"_ivl_62", 0 0, L_0x564261f114f0; 1 drivers -v0x564261f0d540_0 .net *"_ivl_65", 0 0, L_0x564261f11560; 1 drivers -v0x564261f0d620_0 .net *"_ivl_67", 0 0, L_0x564261f11650; 1 drivers -v0x564261f0d700_0 .net *"_ivl_68", 0 0, L_0x564261f11810; 1 drivers -v0x564261f0d7e0_0 .net *"_ivl_71", 0 0, L_0x564261f11920; 1 drivers -v0x564261f0d8c0_0 .net *"_ivl_73", 0 0, L_0x564261f11a10; 1 drivers -v0x564261f0d9a0_0 .net *"_ivl_74", 0 0, L_0x564261f11be0; 1 drivers -v0x564261f0da80_0 .net *"_ivl_77", 0 0, L_0x564261f11c80; 1 drivers -v0x564261f0db60_0 .net *"_ivl_79", 0 0, L_0x564261f11d20; 1 drivers -v0x564261f0dc40_0 .net *"_ivl_80", 0 0, L_0x564261f11f00; 1 drivers -v0x564261f0dd20_0 .net *"_ivl_83", 0 0, L_0x564261f12020; 1 drivers -v0x564261f0de00_0 .net *"_ivl_85", 0 0, L_0x564261f12110; 1 drivers -v0x564261f0dee0_0 .net *"_ivl_86", 0 0, L_0x564261f118b0; 1 drivers -v0x564261f0dfc0_0 .net *"_ivl_89", 0 0, L_0x564261f12330; 1 drivers -v0x564261f0e0a0_0 .net *"_ivl_9", 0 0, L_0x564261f0f8d0; 1 drivers -v0x564261f0e180_0 .net *"_ivl_91", 0 0, L_0x564261f12420; 1 drivers -v0x564261f0e260_0 .net *"_ivl_92", 0 0, L_0x564261f12940; 1 drivers -v0x564261f0e340_0 .net *"_ivl_96", 0 0, L_0x564261f12a90; 1 drivers -v0x564261f0e420_0 .net *"_ivl_98", 0 0, L_0x564261f12ca0; 1 drivers -v0x564261f0e500_0 .net *"_ivl_99", 0 0, L_0x564261f12d90; 1 drivers -v0x564261f0e5e0_0 .net "a0", 3 0, L_0x564261f0fd20; 1 drivers -v0x564261f0e6c0_0 .net "b0", 3 0, L_0x564261f10a00; 1 drivers -v0x564261f0e7a0_0 .net "op0", 2 0, L_0x564261f13590; 1 drivers -v0x564261f0e880_0 .net "opCodeA", 2 0, v0x564261f0f280_0; 1 drivers -v0x564261f0e960_0 .net "s0", 7 0, L_0x564261f18a20; alias, 1 drivers -v0x564261f0ea40_0 .net "select", 3 0, v0x564261f0f410_0; 1 drivers -v0x564261f0eb20_0 .net "tempAB", 3 0, L_0x564261f148f0; 1 drivers -v0x564261f0ec00_0 .net "tempYO", 3 0, L_0x564261f15dc0; 1 drivers -v0x564261f0ece0_0 .net "temps", 0 0, L_0x564261f16810; 1 drivers -v0x564261f0eda0_0 .net "tempsO", 0 0, L_0x564261f162e0; 1 drivers -v0x564261f0ee60_0 .net "y0", 7 0, L_0x564261f12620; 1 drivers -L_0x564261f0f5e0 .part v0x564261f0f410_0, 0, 1; -L_0x564261f0f720 .part v0x564261f0f000_0, 0, 1; -L_0x564261f0f8d0 .part v0x564261f0f410_0, 0, 1; -L_0x564261f0f9c0 .part v0x564261f0f000_0, 1, 1; -L_0x564261f0fb50 .part v0x564261f0f410_0, 0, 1; -L_0x564261f0fc40 .part v0x564261f0f000_0, 2, 1; -L_0x564261f0fd20 .concat8 [ 1 1 1 1], L_0x564261f0f4e0, L_0x564261f0f860, L_0x564261f0fae0, L_0x564261f0fe60; -L_0x564261f0ff50 .part v0x564261f0f410_0, 0, 1; -L_0x564261f10090 .part v0x564261f0f000_0, 3, 1; -L_0x564261f101f0 .part v0x564261f0f410_0, 1, 1; -L_0x564261f10340 .part v0x564261f0f0e0_0, 0, 1; -L_0x564261f104e0 .part v0x564261f0f410_0, 1, 1; -L_0x564261f10640 .part v0x564261f0f0e0_0, 1, 1; -L_0x564261f107a0 .part v0x564261f0f410_0, 1, 1; -L_0x564261f10910 .part v0x564261f0f0e0_0, 2, 1; -L_0x564261f10a00 .concat8 [ 1 1 1 1], L_0x564261f10180, L_0x564261f10430, L_0x564261f10730, L_0x564261f105d0; -L_0x564261f10c70 .part v0x564261f0f410_0, 1, 1; -L_0x564261f10d60 .part v0x564261f0f0e0_0, 3, 1; -L_0x564261f10f60 .part v0x564261f0f410_0, 2, 1; -L_0x564261f11050 .part o0x7f87ae508078, 0, 1; -L_0x564261f10e50 .part v0x564261f0f410_0, 2, 1; -L_0x564261f112f0 .part o0x7f87ae508078, 1, 1; -L_0x564261f11560 .part v0x564261f0f410_0, 2, 1; -L_0x564261f11650 .part o0x7f87ae508078, 2, 1; -L_0x564261f11920 .part v0x564261f0f410_0, 2, 1; -L_0x564261f11a10 .part o0x7f87ae508078, 3, 1; -L_0x564261f11c80 .part v0x564261f0f410_0, 2, 1; -L_0x564261f11d20 .part o0x7f87ae508078, 4, 1; -L_0x564261f12020 .part v0x564261f0f410_0, 2, 1; -L_0x564261f12110 .part o0x7f87ae508078, 5, 1; -L_0x564261f12330 .part v0x564261f0f410_0, 2, 1; -L_0x564261f12420 .part o0x7f87ae508078, 6, 1; -LS_0x564261f12620_0_0 .concat8 [ 1 1 1 1], L_0x564261f10ef0, L_0x564261f111f0, L_0x564261f114f0, L_0x564261f11810; -LS_0x564261f12620_0_4 .concat8 [ 1 1 1 1], L_0x564261f11be0, L_0x564261f11f00, L_0x564261f118b0, L_0x564261f12940; -L_0x564261f12620 .concat8 [ 4 4 0 0], LS_0x564261f12620_0_0, LS_0x564261f12620_0_4; -L_0x564261f12a90 .part v0x564261f0f410_0, 2, 1; -L_0x564261f12ca0 .part o0x7f87ae508078, 7, 1; -L_0x564261f12e00 .part v0x564261f0f410_0, 3, 1; -L_0x564261f13020 .part v0x564261f0f280_0, 0, 1; -L_0x564261f13270 .part v0x564261f0f410_0, 3, 1; -L_0x564261f134a0 .part v0x564261f0f280_0, 1, 1; -L_0x564261f13590 .concat8 [ 1 1 1 0], L_0x564261f12d90, L_0x564261f13160, L_0x564261f13820; -L_0x564261f138e0 .part v0x564261f0f410_0, 3, 1; -L_0x564261f139d0 .part v0x564261f0f280_0, 2, 1; -L_0x564261f131d0 .part L_0x564261f0fd20, 0, 1; -L_0x564261f13d90 .part L_0x564261f10a00, 0, 1; -L_0x564261f140b0 .part L_0x564261f0fd20, 1, 1; -L_0x564261f141a0 .part L_0x564261f10a00, 1, 1; -L_0x564261f14540 .part L_0x564261f0fd20, 2, 1; -L_0x564261f14630 .part L_0x564261f10a00, 2, 1; -L_0x564261f148f0 .concat8 [ 1 1 1 1], L_0x564261f13c20, L_0x564261f14040, L_0x564261f14410, L_0x564261f14a30; -L_0x564261f14af0 .part L_0x564261f0fd20, 3, 1; -L_0x564261f14d80 .part L_0x564261f10a00, 3, 1; -L_0x564261f14fb0 .part L_0x564261f12620, 0, 1; -L_0x564261f152a0 .part L_0x564261f13590, 0, 1; -L_0x564261f15450 .part L_0x564261f12620, 1, 1; -L_0x564261f15700 .part L_0x564261f13590, 1, 1; -L_0x564261f15940 .part L_0x564261f12620, 2, 1; -L_0x564261f15c90 .part L_0x564261f13590, 2, 1; -L_0x564261f15dc0 .concat8 [ 1 1 1 1], L_0x564261f14e70, L_0x564261f153e0, L_0x564261f157f0, L_0x564261f160e0; -L_0x564261f161a0 .part L_0x564261f12620, 3, 1; -L_0x564261f16440 .part v0x564261f0f410_0, 0, 1; -L_0x564261f16720 .part v0x564261f0f410_0, 1, 1; -L_0x564261f168d0 .part v0x564261f0f410_0, 3, 1; -L_0x564261f16d30 .part L_0x564261f148f0, 0, 1; -L_0x564261f16e70 .part L_0x564261f15dc0, 0, 1; -L_0x564261f17230 .part L_0x564261f148f0, 1, 1; -L_0x564261f17320 .part L_0x564261f15dc0, 1, 1; -L_0x564261f177b0 .part L_0x564261f148f0, 2, 1; -L_0x564261f17930 .part L_0x564261f15dc0, 2, 1; -L_0x564261f17d00 .part L_0x564261f148f0, 3, 1; -L_0x564261f17da0 .part L_0x564261f15dc0, 3, 1; -L_0x564261f182b0 .part L_0x564261f12620, 4, 1; -L_0x564261f18410 .part L_0x564261f12620, 5, 1; -L_0x564261f18980 .part L_0x564261f12620, 6, 1; -LS_0x564261f18a20_0_0 .concat8 [ 1 1 1 1], L_0x564261f16bc0, L_0x564261f171c0, L_0x564261f17630, L_0x564261f17c90; -LS_0x564261f18a20_0_4 .concat8 [ 1 1 1 1], L_0x564261f180d0, L_0x564261f183a0, L_0x564261f18750, L_0x564261f18ff0; -L_0x564261f18a20 .concat8 [ 4 4 0 0], LS_0x564261f18a20_0_0, LS_0x564261f18a20_0_4; -L_0x564261f190b0 .part L_0x564261f12620, 7, 1; - .scope S_0x564261ee80a0; +L_0x55b898185f50 .functor AND 1, L_0x55b898186050, L_0x55b898186190, C4<1>, C4<1>; +L_0x55b8981862d0 .functor AND 1, L_0x55b898186340, L_0x55b898186430, C4<1>, C4<1>; +L_0x55b898186550 .functor AND 1, L_0x55b8981865c0, L_0x55b8981866b0, C4<1>, C4<1>; +L_0x55b8981868d0 .functor AND 1, L_0x55b8981869c0, L_0x55b898186b00, C4<1>, C4<1>; +L_0x55b898186bf0 .functor AND 1, L_0x55b898186c60, L_0x55b898186db0, C4<1>, C4<1>; +L_0x55b898186ea0 .functor AND 1, L_0x55b898186f50, L_0x55b8981870b0, C4<1>, C4<1>; +L_0x55b8981871a0 .functor AND 1, L_0x55b898187210, L_0x55b898187380, C4<1>, C4<1>; +L_0x55b898187040 .functor AND 1, L_0x55b8981876e0, L_0x55b8981877d0, C4<1>, C4<1>; +L_0x55b898187960 .functor AND 1, L_0x55b8981879d0, L_0x55b898187ac0, C4<1>, C4<1>; +L_0x55b898187c60 .functor AND 1, L_0x55b8981878c0, L_0x55b898187d60, C4<1>, C4<1>; +L_0x55b898187f60 .functor AND 1, L_0x55b898187fd0, L_0x55b8981880c0, C4<1>, C4<1>; +L_0x55b898188280 .functor AND 1, L_0x55b898188390, L_0x55b898188480, C4<1>, C4<1>; +L_0x55b898188650 .functor AND 1, L_0x55b8981886f0, L_0x55b898188790, C4<1>, C4<1>; +L_0x55b898188970 .functor AND 1, L_0x55b898188a90, L_0x55b898188b80, C4<1>, C4<1>; +L_0x55b898188320 .functor AND 1, L_0x55b898188da0, L_0x55b898188e90, C4<1>, C4<1>; +L_0x55b8981893b0 .functor AND 1, L_0x55b898189500, L_0x55b898189710, C4<1>, C4<1>; +L_0x55b898189800 .functor AND 1, L_0x55b898189870, L_0x55b898189a90, C4<1>, C4<1>; +L_0x55b898189bd0 .functor AND 1, L_0x55b898189ce0, L_0x55b898189f10, C4<1>, C4<1>; +L_0x55b89818a290 .functor AND 1, L_0x55b89818a350, L_0x55b89818a440, C4<1>, C4<1>; +L_0x55b89818a690 .functor OR 1, L_0x55b898189c40, L_0x55b89818a800, C4<0>, C4<0>; +L_0x55b89818aab0 .functor OR 1, L_0x55b89818ab20, L_0x55b89818ac10, C4<0>, C4<0>; +L_0x55b89818ae80 .functor OR 1, L_0x55b89818afb0, L_0x55b89818b0a0, C4<0>, C4<0>; +L_0x55b89818b4a0 .functor OR 1, L_0x55b89818b560, L_0x55b89818b7f0, C4<0>, C4<0>; +L_0x55b89818b8e0 .functor OR 1, L_0x55b89818ba20, L_0x55b89818bd10, C4<0>, C4<0>; +L_0x55b89818be50 .functor OR 1, L_0x55b89818bec0, L_0x55b89818c170, C4<0>, C4<0>; +L_0x55b89818c260 .functor OR 1, L_0x55b89818c3b0, L_0x55b89818c700, C4<0>, C4<0>; +L_0x7f2e051b7018 .functor BUFT 1, C4<0>, C4<0>, C4<0>, C4<0>; +L_0x55b89818cb50 .functor OR 1, L_0x55b89818cc10, L_0x7f2e051b7018, C4<0>, C4<0>; +L_0x55b89818cd50 .functor OR 1, L_0x55b89818ceb0, L_0x55b89818d1e0, C4<0>, C4<0>; +L_0x55b89818d320 .functor OR 1, L_0x55b89818d390, L_0x55b89818d680, C4<0>, C4<0>; +L_0x55b89818d770 .functor OR 1, L_0x55b89818d8e0, L_0x55b89818dc70, C4<0>, C4<0>; +L_0x55b89818dda0 .functor OR 1, L_0x55b89818de10, L_0x55b89818e0d0, C4<0>, C4<0>; +v0x55b89815cd40_0 .net "A", 3 0, v0x55b898185a70_0; 1 drivers +v0x55b89815c0d0_0 .net "B", 3 0, v0x55b898185b50_0; 1 drivers +o0x7f2e0544e078 .functor BUFZ 8, C4; HiZ drive +v0x55b89815b460_0 .net "Y", 7 0, o0x7f2e0544e078; 0 drivers +v0x55b898142380_0 .net *"_ivl_0", 0 0, L_0x55b898185f50; 1 drivers +v0x55b89817f760_0 .net *"_ivl_102", 0 0, L_0x55b898189870; 1 drivers +v0x55b89817f890_0 .net *"_ivl_104", 0 0, L_0x55b898189a90; 1 drivers +v0x55b89817f970_0 .net *"_ivl_105", 0 0, L_0x55b898189bd0; 1 drivers +v0x55b89817fa50_0 .net *"_ivl_108", 0 0, L_0x55b898189ce0; 1 drivers +v0x55b89817fb30_0 .net *"_ivl_11", 0 0, L_0x55b898186430; 1 drivers +v0x55b89817fc10_0 .net *"_ivl_110", 0 0, L_0x55b898189f10; 1 drivers +v0x55b89817fcf0_0 .net *"_ivl_111", 0 0, L_0x55b89818a290; 1 drivers +v0x55b89817fdd0_0 .net *"_ivl_115", 0 0, L_0x55b89818a350; 1 drivers +v0x55b89817feb0_0 .net *"_ivl_117", 0 0, L_0x55b89818a440; 1 drivers +v0x55b89817ff90_0 .net *"_ivl_118", 0 0, L_0x55b89818a690; 1 drivers +v0x55b898180070_0 .net *"_ivl_12", 0 0, L_0x55b898186550; 1 drivers +v0x55b898180150_0 .net *"_ivl_121", 0 0, L_0x55b898189c40; 1 drivers +v0x55b898180230_0 .net *"_ivl_123", 0 0, L_0x55b89818a800; 1 drivers +v0x55b898180310_0 .net *"_ivl_124", 0 0, L_0x55b89818aab0; 1 drivers +v0x55b8981803f0_0 .net *"_ivl_127", 0 0, L_0x55b89818ab20; 1 drivers +v0x55b8981804d0_0 .net *"_ivl_129", 0 0, L_0x55b89818ac10; 1 drivers +v0x55b8981805b0_0 .net *"_ivl_130", 0 0, L_0x55b89818ae80; 1 drivers +v0x55b898180690_0 .net *"_ivl_133", 0 0, L_0x55b89818afb0; 1 drivers +v0x55b898180770_0 .net *"_ivl_135", 0 0, L_0x55b89818b0a0; 1 drivers +v0x55b898180850_0 .net *"_ivl_136", 0 0, L_0x55b89818b4a0; 1 drivers +v0x55b898180930_0 .net *"_ivl_140", 0 0, L_0x55b89818b560; 1 drivers +v0x55b898180a10_0 .net *"_ivl_142", 0 0, L_0x55b89818b7f0; 1 drivers +v0x55b898180af0_0 .net *"_ivl_143", 0 0, L_0x55b89818b8e0; 1 drivers +v0x55b898180bd0_0 .net *"_ivl_146", 0 0, L_0x55b89818ba20; 1 drivers +v0x55b898180cb0_0 .net *"_ivl_148", 0 0, L_0x55b89818bd10; 1 drivers +v0x55b898180d90_0 .net *"_ivl_149", 0 0, L_0x55b89818be50; 1 drivers +v0x55b898180e70_0 .net *"_ivl_15", 0 0, L_0x55b8981865c0; 1 drivers +v0x55b898180f50_0 .net *"_ivl_152", 0 0, L_0x55b89818bec0; 1 drivers +v0x55b898181030_0 .net *"_ivl_154", 0 0, L_0x55b89818c170; 1 drivers +v0x55b898181320_0 .net *"_ivl_155", 0 0, L_0x55b89818c260; 1 drivers +v0x55b898181400_0 .net *"_ivl_158", 0 0, L_0x55b89818c3b0; 1 drivers +v0x55b8981814e0_0 .net *"_ivl_160", 0 0, L_0x55b89818c700; 1 drivers +v0x55b8981815c0_0 .net *"_ivl_161", 0 0, L_0x55b89818cb50; 1 drivers +v0x55b8981816a0_0 .net *"_ivl_165", 0 0, L_0x55b89818cc10; 1 drivers +v0x55b898181780_0 .net/2u *"_ivl_166", 0 0, L_0x7f2e051b7018; 1 drivers +v0x55b898181860_0 .net *"_ivl_168", 0 0, L_0x55b89818cd50; 1 drivers +v0x55b898181940_0 .net *"_ivl_17", 0 0, L_0x55b8981866b0; 1 drivers +v0x55b898181a20_0 .net *"_ivl_171", 0 0, L_0x55b89818ceb0; 1 drivers +v0x55b898181b00_0 .net *"_ivl_173", 0 0, L_0x55b89818d1e0; 1 drivers +v0x55b898181be0_0 .net *"_ivl_174", 0 0, L_0x55b89818d320; 1 drivers +v0x55b898181cc0_0 .net *"_ivl_177", 0 0, L_0x55b89818d390; 1 drivers +v0x55b898181da0_0 .net *"_ivl_179", 0 0, L_0x55b89818d680; 1 drivers +v0x55b898181e80_0 .net *"_ivl_18", 0 0, L_0x55b8981868d0; 1 drivers +v0x55b898181f60_0 .net *"_ivl_180", 0 0, L_0x55b89818d770; 1 drivers +v0x55b898182040_0 .net *"_ivl_183", 0 0, L_0x55b89818d8e0; 1 drivers +v0x55b898182120_0 .net *"_ivl_185", 0 0, L_0x55b89818dc70; 1 drivers +v0x55b898182200_0 .net *"_ivl_186", 0 0, L_0x55b89818dda0; 1 drivers +v0x55b8981822e0_0 .net *"_ivl_189", 0 0, L_0x55b89818de10; 1 drivers +v0x55b8981823c0_0 .net *"_ivl_191", 0 0, L_0x55b89818e0d0; 1 drivers +v0x55b8981824a0_0 .net *"_ivl_195", 0 0, L_0x55b89818e1c0; 1 drivers +v0x55b898182580_0 .net *"_ivl_199", 0 0, L_0x55b89818e490; 1 drivers +v0x55b898182660_0 .net *"_ivl_203", 0 0, L_0x55b89818e530; 1 drivers +v0x55b898182740_0 .net *"_ivl_208", 0 0, L_0x55b89818eb80; 1 drivers +v0x55b898182820_0 .net *"_ivl_22", 0 0, L_0x55b8981869c0; 1 drivers +v0x55b898182900_0 .net *"_ivl_24", 0 0, L_0x55b898186b00; 1 drivers +v0x55b8981829e0_0 .net *"_ivl_25", 0 0, L_0x55b898186bf0; 1 drivers +v0x55b898182ac0_0 .net *"_ivl_28", 0 0, L_0x55b898186c60; 1 drivers +v0x55b898182ba0_0 .net *"_ivl_3", 0 0, L_0x55b898186050; 1 drivers +v0x55b898182c80_0 .net *"_ivl_30", 0 0, L_0x55b898186db0; 1 drivers +v0x55b898182d60_0 .net *"_ivl_31", 0 0, L_0x55b898186ea0; 1 drivers +v0x55b898182e40_0 .net *"_ivl_34", 0 0, L_0x55b898186f50; 1 drivers +v0x55b898183330_0 .net *"_ivl_36", 0 0, L_0x55b8981870b0; 1 drivers +v0x55b898183410_0 .net *"_ivl_37", 0 0, L_0x55b8981871a0; 1 drivers +v0x55b8981834f0_0 .net *"_ivl_40", 0 0, L_0x55b898187210; 1 drivers +v0x55b8981835d0_0 .net *"_ivl_42", 0 0, L_0x55b898187380; 1 drivers +v0x55b8981836b0_0 .net *"_ivl_43", 0 0, L_0x55b898187040; 1 drivers +v0x55b898183790_0 .net *"_ivl_47", 0 0, L_0x55b8981876e0; 1 drivers +v0x55b898183870_0 .net *"_ivl_49", 0 0, L_0x55b8981877d0; 1 drivers +v0x55b898183950_0 .net *"_ivl_5", 0 0, L_0x55b898186190; 1 drivers +v0x55b898183a30_0 .net *"_ivl_50", 0 0, L_0x55b898187960; 1 drivers +v0x55b898183b10_0 .net *"_ivl_53", 0 0, L_0x55b8981879d0; 1 drivers +v0x55b898183bf0_0 .net *"_ivl_55", 0 0, L_0x55b898187ac0; 1 drivers +v0x55b898183cd0_0 .net *"_ivl_56", 0 0, L_0x55b898187c60; 1 drivers +v0x55b898183db0_0 .net *"_ivl_59", 0 0, L_0x55b8981878c0; 1 drivers +v0x55b898183e90_0 .net *"_ivl_6", 0 0, L_0x55b8981862d0; 1 drivers +v0x55b898183f70_0 .net *"_ivl_61", 0 0, L_0x55b898187d60; 1 drivers +v0x55b898184050_0 .net *"_ivl_62", 0 0, L_0x55b898187f60; 1 drivers +v0x55b898184130_0 .net *"_ivl_65", 0 0, L_0x55b898187fd0; 1 drivers +v0x55b898184210_0 .net *"_ivl_67", 0 0, L_0x55b8981880c0; 1 drivers +v0x55b8981842f0_0 .net *"_ivl_68", 0 0, L_0x55b898188280; 1 drivers +v0x55b8981843d0_0 .net *"_ivl_71", 0 0, L_0x55b898188390; 1 drivers +v0x55b8981844b0_0 .net *"_ivl_73", 0 0, L_0x55b898188480; 1 drivers +v0x55b898184590_0 .net *"_ivl_74", 0 0, L_0x55b898188650; 1 drivers +v0x55b898184670_0 .net *"_ivl_77", 0 0, L_0x55b8981886f0; 1 drivers +v0x55b898184750_0 .net *"_ivl_79", 0 0, L_0x55b898188790; 1 drivers +v0x55b898184830_0 .net *"_ivl_80", 0 0, L_0x55b898188970; 1 drivers +v0x55b898184910_0 .net *"_ivl_83", 0 0, L_0x55b898188a90; 1 drivers +v0x55b8981849f0_0 .net *"_ivl_85", 0 0, L_0x55b898188b80; 1 drivers +v0x55b898184ad0_0 .net *"_ivl_86", 0 0, L_0x55b898188320; 1 drivers +v0x55b898184bb0_0 .net *"_ivl_89", 0 0, L_0x55b898188da0; 1 drivers +v0x55b898184c90_0 .net *"_ivl_9", 0 0, L_0x55b898186340; 1 drivers +v0x55b898184d70_0 .net *"_ivl_91", 0 0, L_0x55b898188e90; 1 drivers +v0x55b898184e50_0 .net *"_ivl_92", 0 0, L_0x55b8981893b0; 1 drivers +v0x55b898184f30_0 .net *"_ivl_96", 0 0, L_0x55b898189500; 1 drivers +v0x55b898185010_0 .net *"_ivl_98", 0 0, L_0x55b898189710; 1 drivers +v0x55b8981850f0_0 .net *"_ivl_99", 0 0, L_0x55b898189800; 1 drivers +v0x55b8981851d0_0 .net "a0", 3 0, L_0x55b898186790; 1 drivers +v0x55b8981852b0_0 .net "b0", 3 0, L_0x55b898187470; 1 drivers +v0x55b898185390_0 .net "op0", 2 0, L_0x55b89818a000; 1 drivers +v0x55b898185470_0 .net "opCodeA", 2 0, v0x55b898185cf0_0; 1 drivers +v0x55b898185550_0 .net "s0", 7 0, L_0x55b89818e810; alias, 1 drivers +v0x55b898185630_0 .net "select", 3 0, v0x55b898185e80_0; 1 drivers +v0x55b898185710_0 .net "tempAB", 3 0, L_0x55b89818b360; 1 drivers +v0x55b8981857f0_0 .net "tempYO", 3 0, L_0x55b89818c830; 1 drivers +v0x55b8981858d0_0 .net "y0", 7 0, L_0x55b898189090; 1 drivers +L_0x55b898186050 .part v0x55b898185e80_0, 0, 1; +L_0x55b898186190 .part v0x55b898185a70_0, 0, 1; +L_0x55b898186340 .part v0x55b898185e80_0, 0, 1; +L_0x55b898186430 .part v0x55b898185a70_0, 1, 1; +L_0x55b8981865c0 .part v0x55b898185e80_0, 0, 1; +L_0x55b8981866b0 .part v0x55b898185a70_0, 2, 1; +L_0x55b898186790 .concat8 [ 1 1 1 1], L_0x55b898185f50, L_0x55b8981862d0, L_0x55b898186550, L_0x55b8981868d0; +L_0x55b8981869c0 .part v0x55b898185e80_0, 0, 1; +L_0x55b898186b00 .part v0x55b898185a70_0, 3, 1; +L_0x55b898186c60 .part v0x55b898185e80_0, 1, 1; +L_0x55b898186db0 .part v0x55b898185b50_0, 0, 1; +L_0x55b898186f50 .part v0x55b898185e80_0, 1, 1; +L_0x55b8981870b0 .part v0x55b898185b50_0, 1, 1; +L_0x55b898187210 .part v0x55b898185e80_0, 1, 1; +L_0x55b898187380 .part v0x55b898185b50_0, 2, 1; +L_0x55b898187470 .concat8 [ 1 1 1 1], L_0x55b898186bf0, L_0x55b898186ea0, L_0x55b8981871a0, L_0x55b898187040; +L_0x55b8981876e0 .part v0x55b898185e80_0, 1, 1; +L_0x55b8981877d0 .part v0x55b898185b50_0, 3, 1; +L_0x55b8981879d0 .part v0x55b898185e80_0, 2, 1; +L_0x55b898187ac0 .part o0x7f2e0544e078, 0, 1; +L_0x55b8981878c0 .part v0x55b898185e80_0, 2, 1; +L_0x55b898187d60 .part o0x7f2e0544e078, 1, 1; +L_0x55b898187fd0 .part v0x55b898185e80_0, 2, 1; +L_0x55b8981880c0 .part o0x7f2e0544e078, 2, 1; +L_0x55b898188390 .part v0x55b898185e80_0, 2, 1; +L_0x55b898188480 .part o0x7f2e0544e078, 3, 1; +L_0x55b8981886f0 .part v0x55b898185e80_0, 2, 1; +L_0x55b898188790 .part o0x7f2e0544e078, 4, 1; +L_0x55b898188a90 .part v0x55b898185e80_0, 2, 1; +L_0x55b898188b80 .part o0x7f2e0544e078, 5, 1; +L_0x55b898188da0 .part v0x55b898185e80_0, 2, 1; +L_0x55b898188e90 .part o0x7f2e0544e078, 6, 1; +LS_0x55b898189090_0_0 .concat8 [ 1 1 1 1], L_0x55b898187960, L_0x55b898187c60, L_0x55b898187f60, L_0x55b898188280; +LS_0x55b898189090_0_4 .concat8 [ 1 1 1 1], L_0x55b898188650, L_0x55b898188970, L_0x55b898188320, L_0x55b8981893b0; +L_0x55b898189090 .concat8 [ 4 4 0 0], LS_0x55b898189090_0_0, LS_0x55b898189090_0_4; +L_0x55b898189500 .part v0x55b898185e80_0, 2, 1; +L_0x55b898189710 .part o0x7f2e0544e078, 7, 1; +L_0x55b898189870 .part v0x55b898185e80_0, 3, 1; +L_0x55b898189a90 .part v0x55b898185cf0_0, 0, 1; +L_0x55b898189ce0 .part v0x55b898185e80_0, 3, 1; +L_0x55b898189f10 .part v0x55b898185cf0_0, 1, 1; +L_0x55b89818a000 .concat8 [ 1 1 1 0], L_0x55b898189800, L_0x55b898189bd0, L_0x55b89818a290; +L_0x55b89818a350 .part v0x55b898185e80_0, 3, 1; +L_0x55b89818a440 .part v0x55b898185cf0_0, 2, 1; +L_0x55b898189c40 .part L_0x55b898186790, 0, 1; +L_0x55b89818a800 .part L_0x55b898187470, 0, 1; +L_0x55b89818ab20 .part L_0x55b898186790, 1, 1; +L_0x55b89818ac10 .part L_0x55b898187470, 1, 1; +L_0x55b89818afb0 .part L_0x55b898186790, 2, 1; +L_0x55b89818b0a0 .part L_0x55b898187470, 2, 1; +L_0x55b89818b360 .concat8 [ 1 1 1 1], L_0x55b89818a690, L_0x55b89818aab0, L_0x55b89818ae80, L_0x55b89818b4a0; +L_0x55b89818b560 .part L_0x55b898186790, 3, 1; +L_0x55b89818b7f0 .part L_0x55b898187470, 3, 1; +L_0x55b89818ba20 .part L_0x55b898189090, 0, 1; +L_0x55b89818bd10 .part L_0x55b89818a000, 0, 1; +L_0x55b89818bec0 .part L_0x55b898189090, 1, 1; +L_0x55b89818c170 .part L_0x55b89818a000, 1, 1; +L_0x55b89818c3b0 .part L_0x55b898189090, 2, 1; +L_0x55b89818c700 .part L_0x55b89818a000, 2, 1; +L_0x55b89818c830 .concat8 [ 1 1 1 1], L_0x55b89818b8e0, L_0x55b89818be50, L_0x55b89818c260, L_0x55b89818cb50; +L_0x55b89818cc10 .part L_0x55b898189090, 3, 1; +L_0x55b89818ceb0 .part L_0x55b89818b360, 0, 1; +L_0x55b89818d1e0 .part L_0x55b89818c830, 0, 1; +L_0x55b89818d390 .part L_0x55b89818b360, 1, 1; +L_0x55b89818d680 .part L_0x55b89818c830, 1, 1; +L_0x55b89818d8e0 .part L_0x55b89818b360, 2, 1; +L_0x55b89818dc70 .part L_0x55b89818c830, 2, 1; +L_0x55b89818de10 .part L_0x55b89818b360, 3, 1; +L_0x55b89818e0d0 .part L_0x55b89818c830, 3, 1; +L_0x55b89818e1c0 .part L_0x55b898189090, 4, 1; +L_0x55b89818e490 .part L_0x55b898189090, 5, 1; +L_0x55b89818e530 .part L_0x55b898189090, 6, 1; +LS_0x55b89818e810_0_0 .concat8 [ 1 1 1 1], L_0x55b89818cd50, L_0x55b89818d320, L_0x55b89818d770, L_0x55b89818dda0; +LS_0x55b89818e810_0_4 .concat8 [ 1 1 1 1], L_0x55b89818e1c0, L_0x55b89818e490, L_0x55b89818e530, L_0x55b89818eb80; +L_0x55b89818e810 .concat8 [ 4 4 0 0], LS_0x55b89818e810_0_0, LS_0x55b89818e810_0_4; +L_0x55b89818eb80 .part L_0x55b898189090, 7, 1; + .scope S_0x55b89815f210; T_0 ; %vpi_call 2 17 "$dumpfile", "selector.vcd" {0 0 0}; %vpi_call 2 18 "$dumpvars" {0 0 0}; %pushi/vec4 1, 0, 4; - %store/vec4 v0x564261f0f000_0, 0, 4; + %store/vec4 v0x55b898185a70_0, 0, 4; %pushi/vec4 2, 0, 4; - %store/vec4 v0x564261f0f0e0_0, 0, 4; + %store/vec4 v0x55b898185b50_0, 0, 4; %pushi/vec4 7, 0, 3; - %store/vec4 v0x564261f0f280_0, 0, 3; + %store/vec4 v0x55b898185cf0_0, 0, 3; %pushi/vec4 240, 0, 8; - %store/vec4 v0x564261f0f1b0_0, 0, 8; + %store/vec4 v0x55b898185c20_0, 0, 8; %pushi/vec4 2, 0, 4; - %store/vec4 v0x564261f0f410_0, 0, 4; + %store/vec4 v0x55b898185e80_0, 0, 4; %delay 5, 0; %pushi/vec4 1, 0, 4; - %store/vec4 v0x564261f0f000_0, 0, 4; + %store/vec4 v0x55b898185a70_0, 0, 4; %pushi/vec4 2, 0, 4; - %store/vec4 v0x564261f0f0e0_0, 0, 4; + %store/vec4 v0x55b898185b50_0, 0, 4; %pushi/vec4 7, 0, 3; - %store/vec4 v0x564261f0f280_0, 0, 3; + %store/vec4 v0x55b898185cf0_0, 0, 3; %pushi/vec4 240, 0, 8; - %store/vec4 v0x564261f0f1b0_0, 0, 8; + %store/vec4 v0x55b898185c20_0, 0, 8; %pushi/vec4 1, 0, 4; - %store/vec4 v0x564261f0f410_0, 0, 4; + %store/vec4 v0x55b898185e80_0, 0, 4; %delay 5, 0; %pushi/vec4 1, 0, 4; - %store/vec4 v0x564261f0f000_0, 0, 4; + %store/vec4 v0x55b898185a70_0, 0, 4; %pushi/vec4 2, 0, 4; - %store/vec4 v0x564261f0f0e0_0, 0, 4; + %store/vec4 v0x55b898185b50_0, 0, 4; %pushi/vec4 7, 0, 3; - %store/vec4 v0x564261f0f280_0, 0, 3; - %pushi/vec4 240, 0, 8; - %store/vec4 v0x564261f0f1b0_0, 0, 8; + %store/vec4 v0x55b898185cf0_0, 0, 3; + %pushi/vec4 112, 0, 8; + %store/vec4 v0x55b898185c20_0, 0, 8; %pushi/vec4 4, 0, 4; - %store/vec4 v0x564261f0f410_0, 0, 4; + %store/vec4 v0x55b898185e80_0, 0, 4; %delay 5, 0; %pushi/vec4 1, 0, 4; - %store/vec4 v0x564261f0f000_0, 0, 4; + %store/vec4 v0x55b898185a70_0, 0, 4; %pushi/vec4 2, 0, 4; - %store/vec4 v0x564261f0f0e0_0, 0, 4; + %store/vec4 v0x55b898185b50_0, 0, 4; %pushi/vec4 7, 0, 3; - %store/vec4 v0x564261f0f280_0, 0, 3; - %pushi/vec4 240, 0, 8; - %store/vec4 v0x564261f0f1b0_0, 0, 8; + %store/vec4 v0x55b898185cf0_0, 0, 3; + %pushi/vec4 112, 0, 8; + %store/vec4 v0x55b898185c20_0, 0, 8; %pushi/vec4 8, 0, 4; - %store/vec4 v0x564261f0f410_0, 0, 4; + %store/vec4 v0x55b898185e80_0, 0, 4; %delay 5, 0; %vpi_call 2 23 "$finish" {0 0 0}; %end; diff --git a/project0.2/selector.v b/project0.2/selector.v deleted file mode 100644 index a54b5f3..0000000 --- a/project0.2/selector.v +++ /dev/null @@ -1,68 +0,0 @@ -module selector ( - input [3:0] select, - input [7:0] Y, - input [3:0] A, B, - input [2:0] opCodeA, - output [7:0] s0 -); - -wire [3:0] a0, b0, tempAB, tempYO; -wire [7:0] y0; -wire [2:0] op0; -wire tempsO, temps; - -// Select signals for A -and a00 (a0[0], select[0], A[0]); -and a01 (a0[1], select[0], A[1]); -and a02 (a0[2], select[0], A[2]); -and a03 (a0[3], select[0], A[3]); - -// Select signals for B -and b00 (b0[0], select[1], B[0]); -and b01 (b0[1], select[1], B[1]); -and b02 (b0[2], select[1], B[2]); -and b03 (b0[3], select[1], B[3]); - -// Select signals for Y -and y00 (y0[0], select[2], Y[0]); -and y01 (y0[1], select[2], Y[1]); -and y02 (y0[2], select[2], Y[2]); -and y03 (y0[3], select[2], Y[3]); -and y04 (y0[4], select[2], Y[4]); -and y05 (y0[5], select[2], Y[5]); -and y06 (y0[6], select[2], Y[6]); -and y07 (y0[7], select[2], Y[7]); - -// Select signals for opCodeA -and op00 (op0[0], select[3], opCodeA[0]); -and op01 (op0[1], select[3], opCodeA[1]); -and op02 (op0[2], select[3], opCodeA[2]); - -// Combine A and B -or or1 (tempAB[0], a0[0], b0[0]); -or or2 (tempAB[1], a0[1], b0[1]); -or or3 (tempAB[2], a0[2], b0[2]); -or or4 (tempAB[3], a0[3], b0[3]); - -// Combine Y and opCodeA -or or5 (tempYO[0], y0[0], op0[0]); -or or6 (tempYO[1], y0[1], op0[1]); -or or7 (tempYO[2], y0[2], op0[2]); -or or8 (tempYO[3], y0[3], 1'b0); - -// NOR for select logic -nor s01 (tempsO, select[0], select[1]); -nor s02 (temps, tempsO, select[3]); - -// Final s0 connections -or or9 (s0[0], tempAB[0], tempYO[0]); -or or10 (s0[1], tempAB[1], tempYO[1]); -or or11 (s0[2], tempAB[2], tempYO[2]); -or or12 (s0[3], tempAB[3], tempYO[3]); - -and and13 (s0[4], y0[4], temps); -and and14 (s0[5], y0[5], temps); -and and15 (s0[6], y0[6], temps); -and and16 (s0[7], y0[7], temps); - -endmodule diff --git a/project0.2/selector.vcd b/project0.2/selector.vcd index ee054fc..4746649 100644 --- a/project0.2/selector.vcd +++ b/project0.2/selector.vcd @@ -1,5 +1,5 @@ $date - Wed Jan 8 01:04:48 2025 + Wed Jan 8 01:16:47 2025 $end $version Icarus Verilog @@ -20,29 +20,25 @@ $var wire 4 ( B [3:0] $end $var wire 8 ) Y [7:0] $end $var wire 3 * opCodeA [2:0] $end $var wire 4 + select [3:0] $end -$var wire 1 , temps $end -$var wire 1 - tempsO $end -$var wire 8 . y0 [7:0] $end -$var wire 4 / tempYO [3:0] $end -$var wire 4 0 tempAB [3:0] $end -$var wire 8 1 s0 [7:0] $end -$var wire 3 2 op0 [2:0] $end -$var wire 4 3 b0 [3:0] $end -$var wire 4 4 a0 [3:0] $end +$var wire 8 , y0 [7:0] $end +$var wire 4 - tempYO [3:0] $end +$var wire 4 . tempAB [3:0] $end +$var wire 8 / s0 [7:0] $end +$var wire 3 0 op0 [2:0] $end +$var wire 4 1 b0 [3:0] $end +$var wire 4 2 a0 [3:0] $end $upscope $end $upscope $end $enddefinitions $end #0 $dumpvars -b0 4 -b10 3 b0 2 b10 1 -b10 0 -b0 / -b0 . -0- -1, +b0 0 +b10 / +b10 . +b0 - +b0 , b10 + b111 * bz ) @@ -57,29 +53,28 @@ b10 ! $end #5 b1 ! -b1 1 -b1 0 -b1 4 -b0 3 +b1 / +b1 . +b1 2 +b0 1 b1 & b1 + #10 -b0xxxx ! -b0xxxx 1 -b0 0 +b0 . +bx - +bx ! bx / -0, -b0 4 -bx . -1- +b0 2 +bx , b100 & b100 + +b1110000 $ #15 +b111 - b111 ! -b111 1 b111 / -b0 . -b111 2 +b0 , +b111 0 b1000 & b1000 + #20 diff --git a/project0.2/selectorTB.v b/project0.2/selectorTB.v index 5a87bf9..2148f69 100644 --- a/project0.2/selectorTB.v +++ b/project0.2/selectorTB.v @@ -18,8 +18,8 @@ initial begin $dumpvars; A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0010; #5; A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0001; #5; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0100; #5; - A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b1000; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b0100; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b1000; #5; $finish; end diff --git a/spartanTest/ALU.v b/spartanTest/ALU.v new file mode 100644 index 0000000..9ede511 --- /dev/null +++ b/spartanTest/ALU.v @@ -0,0 +1,79 @@ +module ALU ( + input [3:0] A, B, + input CarryIN, + input [2:0] opCodeA, + output [7:0] Y, + output CarryOUT, overflow +); + +// Supports: ADD[0], SUB[1], MULT[2], AND[4], OR[5], XOR[6] + +wire [7:0] opCode8; +wire [3:0] add_Y, sub_Y; +wire [3:0] resultA, resultO, resultX, lUOutput1; +wire [3:0] aUtemp1, aUtemp2, lUOutput2; +wire [3:0] wireY, wireLA; +wire [7:0] opwireM, wireM, Y; + +opCode opCd (.A(opCodeA), .opCode(opCode8)); + +arithmeticUnit aU(.opCode(opCode8[1:0]), .A(A), .B(B), .CarryIN(CarryIN), .add_Y(add_Y), .sub_Y(sub_Y), .CarryOUT(CarryOUT), .overflow(overflow)); +logicUnit lU (.opCode(opCode8[6:4]), .A(A), .B(B), .resultA(resultA), .resultO(resultO), .resultX(resultX)); +multiplier mU (.A(A), .B(B), .Y(opwireM)); + +or o01 (lUOutput1[0], resultA[0], resultO[0]); +or o02 (lUOutput1[1], resultA[1], resultO[1]); +or o03 (lUOutput1[2], resultA[2], resultO[2]); +or o04 (lUOutput1[3], resultA[3], resultO[3]); + +or o11 (lUOutput2[0], lUOutput1[0], resultX[0]); +or o12 (lUOutput2[1], lUOutput1[1], resultX[1]); +or o13 (lUOutput2[2], lUOutput1[2], resultX[2]); +or o14 (lUOutput2[3], lUOutput1[3], resultX[3]); + + +and a01 (aUtemp1[0], opCode8[0], add_Y[0]); +and a02 (aUtemp1[1], opCode8[0], add_Y[1]); +and a03 (aUtemp1[2], opCode8[0], add_Y[2]); +and a04 (aUtemp1[3], opCode8[0], add_Y[3]); + + +and a11 (aUtemp2[0], opCode8[1], sub_Y[0]); +and a12 (aUtemp2[1], opCode8[1], sub_Y[1]); +and a13 (aUtemp2[2], opCode8[1], sub_Y[2]); +and a14 (aUtemp2[3], opCode8[1], sub_Y[3]); + +and a21 (wireM[0], opCode8[2], opwireM[0]); +and a22 (wireM[1], opCode8[2], opwireM[1]); +and a23 (wireM[2], opCode8[2], opwireM[2]); +and a24 (wireM[3], opCode8[2], opwireM[3]); +and a25 (wireM[4], opCode8[2], opwireM[4]); +and a26 (wireM[5], opCode8[2], opwireM[5]); +and a27 (wireM[6], opCode8[2], opwireM[6]); +and a28 (wireM[7], opCode8[2], opwireM[7]); + + +or o21 (wireY[0], aUtemp1[0], aUtemp2[0]); +or o22 (wireY[1], aUtemp1[1], aUtemp2[1]); +or o23 (wireY[2], aUtemp1[2], aUtemp2[2]); +or o24 (wireY[3], aUtemp1[3], aUtemp2[3]); + + +or o1 (wireLA[0], lUOutput2[0], wireY[0]); +or o2 (wireLA[1], lUOutput2[1], wireY[1]); +or o3 (wireLA[2], lUOutput2[2], wireY[2]); +or o4 (wireLA[3], lUOutput2[3], wireY[3]); + +or o31 (Y[0], wireLA[0], wireM[0]); +or o32 (Y[1], wireLA[1], wireM[1]); +or o33 (Y[2], wireLA[2], wireM[2]); +or o34 (Y[3], wireLA[3], wireM[3]); +or o35 (Y[4], 1'b0, wireM[4]); +or o36 (Y[5], 1'b0, wireM[5]); +or o37 (Y[6], 1'b0, wireM[6]); +or o38 (Y[7], 1'b0, wireM[7]); + +//BinaryToBCD btod1(.binary(Y), .bcd(bcd)); // WIRE Y BINARY!!!! + + +endmodule diff --git a/spartanTest/ALUTB.v b/spartanTest/ALUTB.v new file mode 100644 index 0000000..5342de2 --- /dev/null +++ b/spartanTest/ALUTB.v @@ -0,0 +1,42 @@ +module ALUTB (); + +reg [3:0] A, B; +reg CarryIN; +reg [2:0] opCodeA; +wire CarryOUT, overflow; +wire [11:0] bcd; + +ALU uut( + .A(A), + .B(B), + .CarryIN(CarryIN), + .opCodeA(opCodeA), + .CarryOUT(CarryOUT), + .bcd(bcd), + .overflow(overflow) +); + +initial begin + $dumpfile("ALU.vcd"); // GTKWAVE SIMULTAIN DATA WAVEFORM + $dumpvars; // ICARUS VERILOG ADD ALL VARIABLES + A = 4'b0000; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b011; #5; + A = 4'b0000; B = 4'b1111; CarryIN = 1'b0; opCodeA = 3'b011; #5; + A = 4'b1111; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b011; #5; + A = 4'b1111; B = 4'b1111; CarryIN = 1'b1; opCodeA = 3'b011; #5; + A = 4'b0111; B = 4'b0111; CarryIN = 1'b1; opCodeA = 3'b011; #5; + + A = 4'b0000; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b111; #5; + A = 4'b0000; B = 4'b1111; CarryIN = 1'b0; opCodeA = 3'b111; #5; + A = 4'b1111; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b111; #5; + A = 4'b1111; B = 4'b1111; CarryIN = 1'b1; opCodeA = 3'b111; #5; + A = 4'b0111; B = 4'b1111; CarryIN = 1'b1; opCodeA = 3'b111; #5; + + A = 4'b0000; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b010; #5; + A = 4'b0000; B = 4'b1111; CarryIN = 1'b0; opCodeA = 3'b010; #5; + A = 4'b1111; B = 4'b0000; CarryIN = 1'b0; opCodeA = 3'b010; #5; + A = 4'b1111; B = 4'b1111; CarryIN = 1'b1; opCodeA = 3'b010; #5; + A = 4'b0111; B = 4'b1111; CarryIN = 1'b1; opCodeA = 3'b010; #5; + $finish; //NOT CONTAIN CLK, BUT STILL STOPS CODE +end + +endmodule diff --git a/spartanTest/BinaryToBCD.v b/spartanTest/BinaryToBCD.v new file mode 100644 index 0000000..591e987 --- /dev/null +++ b/spartanTest/BinaryToBCD.v @@ -0,0 +1,79 @@ +module BinaryToBCD ( + input [7:0] binary, + output [11:0] bcd +); + +wire empty1, empty2; +wire [3:0] dab1, dab2, dab3, dab4, dab5; + +and a111 (empty1, 1'b0, 1'b0); +and a000 (empty2, 1'b0, 1'b0); +and a222 (bcd[11], 1'b0, 1'b0); +and a223 (bcd[10], 1'b0, 1'b0); + +dabble d1t (.A((empty1)), +.B(binary[7]), +.C(binary[6]), +.D(binary[5]), +.X(dab1[0]), +.Y(dab1[1]), +.Z(dab1[2]), +.E(dab1[3])); + +dabble d2u (.A((dab1[1])), +.B(dab1[2]), +.C(dab1[3]), +.D(binary[4]), +.X(dab2[0]), +.Y(dab2[1]), +.Z(dab2[2]), +.E(dab2[3])); + +dabble d3v (.A((dab2[1])), +.B(dab2[2]), +.C(dab2[3]), +.D(binary[3]), +.X(dab3[0]), +.Y(dab3[1]), +.Z(dab3[2]), +.E(dab3[3])); + +dabble d4w (.A((empty2)), +.B(dab1[0]), +.C(dab2[0]), +.D(dab3[0]), +.X(bcd[9]), +.Y(dab4[1]), +.Z(dab4[2]), +.E(dab4[3])); + +dabble d5x (.A((dab3[1])), +.B(dab3[2]), +.C(dab3[3]), +.D(binary[2]), +.X(dab5[0]), +.Y(dab5[1]), +.Z(dab5[2]), +.E(dab5[3])); + +dabble d6y (.A((dab4[1])), +.B(dab4[2]), +.C(dab4[3]), +.D(dab5[0]), +.X(bcd[8]), +.Y(bcd[7]), +.Z(bcd[6]), +.E(bcd[5])); + +dabble d7z (.A((dab5[1])), +.B(dab5[2]), +.C(dab5[3]), +.D(binary[1]), +.X(bcd[4]), +.Y(bcd[3]), +.Z(bcd[2]), +.E(bcd[1])); + +or o1 (bcd[0], binary[0], 1'b0); + +endmodule diff --git a/spartanTest/BinaryToBCDTB.v b/spartanTest/BinaryToBCDTB.v new file mode 100644 index 0000000..52742bc --- /dev/null +++ b/spartanTest/BinaryToBCDTB.v @@ -0,0 +1,40 @@ +module BinaryToBCDTB; + // Testbench signals + reg [7:0] binary; + wire [11:0] bcd; // Output BCD + + // Instantiate the BinaryToBCD module + BinaryToBCD uut ( + .binary(binary), + .bcd(bcd) + ); + + // Testbench procedure + initial begin + $monitor("Time: %0t | Binary: %b | BCD: %b (Hundreds: %d, Tens: %d, Ones: %d)", + $time, binary, bcd, bcd[11:8], bcd[7:4], bcd[3:0]); + $dumpfile("BinaryToBCD.vcd"); + $dumpvars; + // Test cases + binary = 8'b00000000; // Decimal: 0 + #10; + + binary = 8'b00001010; // Decimal: 10 + #10; + + binary = 8'b00101010; // Decimal: 42 + #10; + + binary = 8'b01100011; // Decimal: 99 + #10; + + binary = 8'b10011001; // Decimal: 153 + #10; + + binary = 8'b11111111; // Decimal: 255 + #10; + + // End simulation + $finish; + end +endmodule diff --git a/spartanTest/addition.v b/spartanTest/addition.v new file mode 100644 index 0000000..38a4733 --- /dev/null +++ b/spartanTest/addition.v @@ -0,0 +1,20 @@ +module addition ( + input [3:0] A, B, + input CarryIN, + output [3:0] Y, + output CarryOUT, + output overflow +); + +wire [2:0] Carry4; + +fulladder f0(.A(A[0]), .B(B[0]), .Carry(CarryIN), .Sum(Y[0]), .CarryO(Carry4[0])); +fulladder f1(.A(A[1]), .B(B[1]), .Carry(Carry4[0]), .Sum(Y[1]), .CarryO(Carry4[1])); +fulladder f2(.A(A[2]), .B(B[2]), .Carry(Carry4[1]), .Sum(Y[2]), .CarryO(Carry4[2])); +fulladder f3(.A(A[3]), .B(B[3]), .Carry(Carry4[2]), .Sum(Y[3]), .CarryO(CarryOUT)); + + +//overflowDetect od1 (.opCode(2'b01), .A(A), .B(B), .Y(Y), .CarryOUT(CarryOUT), .overflowDetect(overflow)); (KULLANILMAYACAK!!!!) +xor ov1 (overflow, Carry4[2], CarryOUT); + +endmodule diff --git a/spartanTest/aluboard.v b/spartanTest/aluboard.v new file mode 100644 index 0000000..b364d12 --- /dev/null +++ b/spartanTest/aluboard.v @@ -0,0 +1,9 @@ +module aluboard ( + input [3:0] select, + input [7:0] Y, + input [3:0] A, B, + input [2:0] opCodeA, + output [7:0] sO +); + +ALU alu0 () \ No newline at end of file diff --git a/spartanTest/arithmeticUnit.v b/spartanTest/arithmeticUnit.v new file mode 100644 index 0000000..543dabc --- /dev/null +++ b/spartanTest/arithmeticUnit.v @@ -0,0 +1,33 @@ +module arithmeticUnit ( + input [1:0] opCode, + input [3:0] A, B, + input CarryIN, + output [3:0] add_Y, sub_Y, + output CarryOUT, + output overflow +); + +wire [3:0] addY, subY; +wire CarryOUTADD, CarryOUTSUB, tempCAdd, tempCSub, tempoverflow; + +addition a1(.A(A), .B(B), .CarryIN(CarryIN), .Y(addY), .CarryOUT(CarryOUTADD), .overflow(tempoverflow)); +subtraction s1(.A(A), .B(B), .BorrowIN(CarryIN), .Y(subY), .BorrowOUT(CarryOUTSUB)); + +and add1 (add_Y[0], opCode[0], addY[0]); +and add2 (add_Y[1], opCode[0], addY[1]); +and add3 (add_Y[2], opCode[0], addY[2]); +and add4 (add_Y[3], opCode[0], addY[3]); + +and sub1 (sub_Y[0], opCode[1], subY[0]); +and sub2 (sub_Y[1], opCode[1], subY[1]); +and sub3 (sub_Y[2], opCode[1], subY[2]); +and sub4 (sub_Y[3], opCode[1], subY[3]); + +// or or1 (CarryOUT, CarryOUTADD, CarryOUTSUB); (OLD!!!) +and and10 (tempCSub, CarryOUTSUB, opCode[1]); +and and11 (tempCAdd, CarryOUTADD, opCode[0]); +or or4 (CarryOUT, tempCAdd, tempCSub); + +and add12 (overflow, opCode[0], tempoverflow); + +endmodule diff --git a/spartanTest/char_mem.v b/spartanTest/char_mem.v new file mode 100644 index 0000000..a7e9f9c --- /dev/null +++ b/spartanTest/char_mem.v @@ -0,0 +1,41 @@ +module char_mem ( + input [4:0] addr, + output [7:0] bus, + input [3:0] A, + input [3:0] B, + input [2:0] opCode, + input [7:0] Y +); + parameter LINES = 2; + parameter CHARS_PER_LINE = 16; + parameter BITS_PER_CHAR = 8; + parameter STR_SIZE = LINES * CHARS_PER_LINE * BITS_PER_CHAR; + + // Map the data into strings for display + wire [127:0] line1 = { "A:", nibble_to_ascii(A), " B:", nibble_to_ascii(B), " " }; + wire [127:0] line2 = { "op:", nibble_to_ascii({1'b0, opCode}), " Y:", byte_to_ascii(Y) }; + + // Combine the two lines + wire [0:STR_SIZE-1] display_data = { line1, line2 }; + + // Address selection for the LCD + assign bus = display_data[{addr[4:0], 3'b000}+:8]; + + // Converts a 4-bit nibble to two ASCII characters + function [15:0] nibble_to_ascii; + input [3:0] nibble; + begin + nibble_to_ascii[15:8] = (nibble[3:0] >= 4'd10) ? (nibble[3:0] - 4'd10 + "A") : (nibble[3:0] + "0"); + nibble_to_ascii[7:0] = " "; + end + endfunction + + // Converts an 8-bit byte to two ASCII characters + function [15:0] byte_to_ascii; + input [7:0] byte; + begin + byte_to_ascii[15:8] = ((byte >> 4) >= 4'd10) ? ((byte >> 4) - 4'd10 + "A") : ((byte >> 4) + "0"); + byte_to_ascii[7:0] = ((byte & 4'hF) >= 4'd10) ? ((byte & 4'hF) - 4'd10 + "A") : ((byte & 4'hF) + "0"); + end + endfunction +endmodule diff --git a/spartanTest/dabble.v b/spartanTest/dabble.v new file mode 100644 index 0000000..f93d023 --- /dev/null +++ b/spartanTest/dabble.v @@ -0,0 +1,22 @@ +module dabble ( + input A, B, C, D, + output X, Y, Z, E +); + +wire xor1, nor1, xor2, nor2, nor3, or1; + +xor xo1 (xor1, A, D); +nor no1 (nor1, A, B); +xor xo2 (xor2, A, C); + +nor no2 (nor2, xor1, xor2); + +nor no3 (nor3, nor2, nor1); +buf bu1 (X, nor3); +or o1 (or1, xor1, nor1); + +nor no4 (Y, or1, C); +and an1 (Z, or1, xor2); +xor xo3 (E, nor3, D); + +endmodule diff --git a/spartanTest/data.jed b/spartanTest/data.jed new file mode 100644 index 0000000..e09aea6 --- /dev/null +++ b/spartanTest/data.jed @@ -0,0 +1,105 @@ +JEDEC Programming File for /home/ise/ise/data.jed +Date: Sat Oct 26 08:09:00 2024 + +QF25812* +QP0* +F0* +X0* +N DEVICE xc2c64a-XXXXX* +L000000 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1110011111100000001111001111110011111100000001111000011100011111100000001111001111110011111100000001111001111110011111100000001111001111110011111100000001111001111110011111100000001111001111110011111100000001111001111110011111100000001111001111110011111100000001111001111110* +L025756 01111110000000111100111111001111110000000111111110111111* +C2A9A* +0296 diff --git a/spartanTest/fulladder.v b/spartanTest/fulladder.v new file mode 100644 index 0000000..d89caff --- /dev/null +++ b/spartanTest/fulladder.v @@ -0,0 +1,12 @@ +module fulladder ( + input A, B, Carry, + output Sum, CarryO +); + +wire xor1, and1, and2; + +halfadder h1(.A(A), .B(B), .Sum(xor1), .Carry(and1)); +halfadder h2 (.A(xor1), .B(Carry), .Sum(Sum), .Carry(and2)); +or o1 (CarryO, and1, and2); + +endmodule diff --git a/spartanTest/fullsubtraction.v b/spartanTest/fullsubtraction.v new file mode 100644 index 0000000..092c565 --- /dev/null +++ b/spartanTest/fullsubtraction.v @@ -0,0 +1,12 @@ +module fullsubtraction ( + input A, B, BorrowIN, + output Difference, BorrowOut +); + +wire tempD, tempB1, tempB2; + +halfsubtraction hf1(.A(A), .B(B), .Difference(tempD), .Borrow(tempB1)); +halfsubtraction hf2(.A(tempD), .B(BorrowIN), .Difference(Difference), .Borrow(tempB2)); +or o1 (BorrowOut, tempB1, tempB2); + +endmodule diff --git a/spartanTest/halfadder.v b/spartanTest/halfadder.v new file mode 100644 index 0000000..273c02f --- /dev/null +++ b/spartanTest/halfadder.v @@ -0,0 +1,9 @@ +module halfadder ( + input A, B, + output Sum, Carry +); + +and a1 (Carry, A, B); +xor xo1 (Sum, A, B); + +endmodule diff --git a/spartanTest/halfsubtraction.v b/spartanTest/halfsubtraction.v new file mode 100644 index 0000000..cde8d5d --- /dev/null +++ b/spartanTest/halfsubtraction.v @@ -0,0 +1,12 @@ +module halfsubtraction ( + input A, B, + output Difference, Borrow +); + +wire notA; + +xor xo1 (Difference, A, B); +not a1 (notA, A); +and an1 (Borrow, notA, B); + +endmodule diff --git a/spartanTest/lcd.v b/spartanTest/lcd.v new file mode 100644 index 0000000..4d7e68d --- /dev/null +++ b/spartanTest/lcd.v @@ -0,0 +1,53 @@ +module lcd ( + input clk, + output reg lcd_rs, + output reg lcd_rw, + output reg lcd_e, + output reg [7:4] lcd_d, + output [4:0] mem_addr, + input [7:0] mem_bus + ); + + parameter n = 24; + parameter j = 17; // Initialization is slow, runs at clk/2^(j+2) ~95Hz + parameter k = 11; // Writing/seeking is fast, clk/2^(k_2) ~6KHz + parameter noop = 6'b010000; // Allows LCD to drive lcd_d, can be safely written any time + + reg [n:0] count = 0; + reg [5:0] lcd_state = noop; + reg init = 1; // Start in initialization on power on + reg row = 0; // Writing to top or or bottom row + + assign mem_addr = {row, count[k+6:k+3]}; + + initial count[j+7:j+2] = 11; + + always @ (posedge clk) begin + count <= count + 1; + if (init) begin // initalization + case (count[j+7:j+2]) + 1: lcd_state <= 6'b000010; // function set + 2: lcd_state <= 6'b000010; + 3: lcd_state <= 6'b001000; + 4: lcd_state <= 6'b000000; // display on/off control + 5: lcd_state <= 6'b001100; + 6: lcd_state <= 6'b000000; // display clear + 7: lcd_state <= 6'b000001; + 8: lcd_state <= 6'b000000; // entry mode set + 9: lcd_state <= 6'b000110; + 10: begin init <= ~init; count <= 0; end + endcase + // Write lcd_state to the LCD and turn lcd_e high for the middle half of each lcd_state + {lcd_e,lcd_rs,lcd_rw,lcd_d[7:4]} <= {^count[j+1:j+0] & ~lcd_rw,lcd_state}; + end else begin // Continuously update screen from memory + case (count[k+7:k+2]) + 32: lcd_state <= {3'b001,~row,2'b00}; // Move cursor to begining of next line + 33: lcd_state <= 6'b000000; + 34: begin count <= 0; row <= ~row; end // Restart and switch which row is being written + default: lcd_state <= {2'b10, ~count[k+2] ? mem_bus[7:4] : mem_bus[3:0]}; // Pull characters from bus + endcase + // Write lcd_state to the LCD and turn lcd_e high for the middle half of each lcd_state + {lcd_e,lcd_rs,lcd_rw,lcd_d[7:4]} <= {^count[k+1:k+0] & ~lcd_rw,lcd_state}; + end + end +endmodule \ No newline at end of file diff --git a/spartanTest/logicUnit.v b/spartanTest/logicUnit.v new file mode 100644 index 0000000..81819af --- /dev/null +++ b/spartanTest/logicUnit.v @@ -0,0 +1,39 @@ +module logicUnit ( + input [2:0] opCode, + input [3:0] A, B, + output [3:0] resultA, resultO, resultX +); + +wire [3:0] and1, or1, xor1; + +and a01 (and1[0], A[0], B[0]); +and a02 (and1[1], A[1], B[1]); +and a03 (and1[2], A[2], B[2]); +and a04 (and1[3], A[3], B[3]); + +or o01 (or1[0], A[0], B[0]); +or o02 (or1[1], A[1], B[1]); +or o03 (or1[2], A[2], B[2]); +or o04 (or1[3], A[3], B[3]); + +xor xor01 (xor1[0], A[0], B[0]); +xor xor02 (xor1[1], A[1], B[1]); +xor xor03 (xor1[2], A[2], B[2]); +xor xor04 (xor1[3], A[3], B[3]); + +and a_o1 (resultA[0], opCode[0], and1[0]); +and a_o2 (resultA[1], opCode[0], and1[1]); +and a_o3 (resultA[2], opCode[0], and1[2]); +and a_o4 (resultA[3], opCode[0], and1[3]); + +and o_o1 (resultO[0], opCode[1], or1[0]); +and o_o2 (resultO[1], opCode[1], or1[1]); +and o_o3 (resultO[2], opCode[1], or1[2]); +and o_o4 (resultO[3], opCode[1], or1[3]); + +and x_o1 (resultX[0], opCode[2], xor1[0]); +and x_o2 (resultX[1], opCode[2], xor1[1]); +and x_o3 (resultX[2], opCode[2], xor1[2]); +and x_o4 (resultX[3], opCode[2], xor1[3]); + +endmodule diff --git a/spartanTest/logicUnitTB.v b/spartanTest/logicUnitTB.v new file mode 100644 index 0000000..6e905b4 --- /dev/null +++ b/spartanTest/logicUnitTB.v @@ -0,0 +1,37 @@ +module logicUnitTB (); + +reg [2:0] opCode; +reg [3:0] A, B; +wire [3:0] resultA, resultO, resultX; + +logicUnit uut ( + .opCode(opCode), + .A(A), + .B(B), + .resultA(resultA), + .resultO(resultO), + .resultX(resultX) +); + +initial begin + $dumpfile("logicUnit.vcd"); + $dumpvars; + opCode = 3'b001; A = 4'b0001; B = 4'b0001; #2; + opCode = 3'b001; A = 4'b0011; B = 4'b0001; #2; + opCode = 3'b001; A = 4'b1001; B = 4'b1001; #2; + opCode = 3'b001; A = 4'b1111; B = 4'b1111; #2; + opCode = 3'b001; A = 4'b0000; B = 4'b0000; #2; + + opCode = 3'b010; A = 4'b0001; B = 4'b0101; #2; + opCode = 3'b010; A = 4'b1001; B = 4'b0101; #2; + opCode = 3'b010; A = 4'b0001; B = 4'b1111; #2; + opCode = 3'b010; A = 4'b0000; B = 4'b0101; #2; + + opCode = 3'b100; A = 4'b0000; B = 4'b0101; #2; + opCode = 3'b100; A = 4'b0000; B = 4'b0000; #2; + opCode = 3'b100; A = 4'b0000; B = 4'b0101; #2; + opCode = 3'b100; A = 4'b1111; B = 4'b1111; #2; + $finish; +end + +endmodule diff --git a/spartanTest/multiplier.v b/spartanTest/multiplier.v new file mode 100644 index 0000000..2c5ab0b --- /dev/null +++ b/spartanTest/multiplier.v @@ -0,0 +1,76 @@ +module multiplier ( + input [3:0] A, B, + output [7:0] Y +); + +wire [3:0] b0, a0, a1, a2; +wire [4:0] S0, S1, S2; +wire carry0, carry1, carry2; +wire overflow0, overflow1, overflow2; + +// Partial product generation +and (Y[0], A[0], B[0]); // LSB of the result + +// Generate partial products for B[0] and B[1] +and ab00 (b0[0], A[1], B[0]); +and ab01 (b0[1], A[2], B[0]); +and ab02 (b0[2], A[3], B[0]); +not ab03 (b0[3], 1'b1); // Initialize b0[3] to 0 + +and aa00 (a0[0], A[0], B[1]); +and aa01 (a0[1], A[1], B[1]); +and aa02 (a0[2], A[2], B[1]); +and aa03 (a0[3], A[3], B[1]); + +// First addition +addition add0 ( + .A(a0), + .B(b0), + .CarryIN(1'b0), + .Y(S0[3:0]), + .CarryOUT(S0[4]), + .overflow(overflow0) +); + +// Generate partial products for B[2] +and aa10 (a1[0], A[0], B[2]); +and aa11 (a1[1], A[1], B[2]); +and aa12 (a1[2], A[2], B[2]); +and aa13 (a1[3], A[3], B[2]); + +// Second addition +addition add1 ( + .A(a1), + .B(S0[4:1]), + .CarryIN(1'b0), + .Y(S1[3:0]), + .CarryOUT(S1[4]), + .overflow(overflow1) +); + +// Generate partial products for B[3] +and aa20 (a2[0], A[0], B[3]); +and aa21 (a2[1], A[1], B[3]); +and aa22 (a2[2], A[2], B[3]); +and aa23 (a2[3], A[3], B[3]); + +// Third addition +addition add2 ( + .A(a2), + .B(S1[4:1]), + .CarryIN(1'b0), + .Y(S2[3:0]), + .CarryOUT(S2[4]), + .overflow(overflow2) +); + +// Combine results into the final output Y +or o01 (Y[1], S0[0], 1'b0); +or o02 (Y[2], S1[0], 1'b0); +or o03 (Y[3], S2[0], 1'b0); +or o04 (Y[4], S2[1], 1'b0); +or o05 (Y[5], S2[2], 1'b0); +or o06 (Y[6], S2[3], 1'b0); +or o07 (Y[7], S2[4], 1'b0); + +endmodule diff --git a/spartanTest/multiplierTB.v b/spartanTest/multiplierTB.v new file mode 100644 index 0000000..d45c10b --- /dev/null +++ b/spartanTest/multiplierTB.v @@ -0,0 +1,22 @@ +module multiplierTB(); +reg [3:0] A, B; +wire [7:0] Y; + +multiplier uut( + .A(A), + .B(B), + .Y(Y) +); + +initial begin + $dumpfile("multiplier.vcd"); + $dumpvars; + A = 4'b0000; B = 4'b0000; #2; + A = 4'b0000; B = 4'b1000; #2; + A = 4'b1000; B = 4'b1000; #2; + A = 4'b0111; B = 4'b0111; #2; + A = 4'b1111; B = 4'b1111; #2; + $finish; +end + +endmodule diff --git a/spartanTest/opCode.v b/spartanTest/opCode.v new file mode 100644 index 0000000..f8e9e03 --- /dev/null +++ b/spartanTest/opCode.v @@ -0,0 +1,25 @@ +module opCode ( + input [2:0] A, + output [7:0] opCode +); + wire and1, and2, and3, and4, notA, notB, notC; + + not n1(notA, A[2]); + not n2(notB, A[1]); + not n3(notC, A[0]); + + and a01(and1, A[2], A[1]); + and a02(and2, notA, A[1]); + and a03(and3, A[2], notB); + and a04(and4, notA, notB); + + and a1(opCode[0], and4, notC); + and a2(opCode[1], and4, A[0]); + and a3(opCode[2], and2, notC); + and a4(opCode[3], and2, A[0]); + and a5(opCode[4], and3, notC); + and a6(opCode[5], and3, A[0]); + and a7(opCode[6], and1, notC); + and a8(opCode[7], and1, A[0]); + +endmodule diff --git a/spartanTest/opCodeTB.v b/spartanTest/opCodeTB.v new file mode 100644 index 0000000..67df050 --- /dev/null +++ b/spartanTest/opCodeTB.v @@ -0,0 +1,26 @@ +module opCodeTB(); + +reg [2:0] A; +wire [7:0] opCode; + +opCode uut ( + .A(A), + + .opCode(opCode) +); + +initial begin + $dumpfile("opCode.vcd"); + $dumpvars; + A = 3'b000; #3; + A = 3'b001; #3; + A = 3'b010; #3; + A = 3'b011; #3; + A = 3'b100; #3; + A = 3'b101; #3; + A = 3'b110; #3; + A = 3'b111; #3; + $finish; +end + +endmodule diff --git a/spartanTest/selectorTB.v b/spartanTest/selectorTB.v new file mode 100644 index 0000000..2148f69 --- /dev/null +++ b/spartanTest/selectorTB.v @@ -0,0 +1,26 @@ +module selectorTB(); + +reg [3:0] select, A, B; +reg [7:0] Y; +reg [2:0] opCodeA; +wire [7:0] s0; + +selector uut ( + .select(select), + .A(A), + .B(B), + .opCodeA(opCodeA), + .s0(s0) +); + +initial begin + $dumpfile("selector.vcd"); + $dumpvars; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0010; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b1111_0000; select = 4'b0001; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b0100; #5; + A = 4'b0001; B = 4'b0010; opCodeA = 3'b111; Y = 8'b0111_0000; select = 4'b1000; #5; + $finish; +end + +endmodule diff --git a/spartanTest/spartan3e.ucf b/spartanTest/spartan3e.ucf new file mode 100644 index 0000000..03177c2 --- /dev/null +++ b/spartanTest/spartan3e.ucf @@ -0,0 +1,22 @@ +# Clock signal +NET "clk" LOC = "C9" | IOSTANDARD = LVCMOS33 ; + +# Slide Switches +NET "switches<0>" LOC = "L13" | IOSTANDARD = LVCMOS33 | PULLUP ; +NET "switches<1>" LOC = "L14" | IOSTANDARD = LVCMOS33 | PULLUP ; +NET "switches<2>" LOC = "H18" | IOSTANDARD = LVCMOS33 | PULLUP ; +NET "switches<3>" LOC = "N17" | IOSTANDARD = LVCMOS33 | PULLUP ; + +# Rotary Encoder +NET "rot_a" LOC = "K18" | IOSTANDARD = LVCMOS33 | PULLUP ; +NET "rot_b" LOC = "G18" | IOSTANDARD = LVCMOS33 | PULLUP ; +NET "rot_center" LOC = "V16" | IOSTANDARD = LVCMOS33 | PULLDOWN ; + +# LCD Interface +NET "lcd_e" LOC = "M18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_rs" LOC = "L18" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_rw" LOC = "L17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_d<4>" LOC = "R15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_d<5>" LOC = "R16" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_d<6>" LOC = "P17" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; +NET "lcd_d<7>" LOC = "M15" | IOSTANDARD = LVCMOS33 | DRIVE = 4 | SLEW = SLOW ; diff --git a/spartanTest/subtraction.v b/spartanTest/subtraction.v new file mode 100644 index 0000000..30f33e7 --- /dev/null +++ b/spartanTest/subtraction.v @@ -0,0 +1,16 @@ +module subtraction ( + input [3:0] A, B, + input BorrowIN, + output [3:0] Y, + output BorrowOUT //Overflow signal'ini yani negatif gonderecek +); + +wire [3:0] tempB; + +// Full Subtraction logic for each bit (borrow-in for each subsequent bit) +fullsubtraction f0 (.A(A[0]), .B(B[0]), .BorrowIN(BorrowIN), .Difference(Y[0]), .BorrowOut(tempB[0])); +fullsubtraction f1 (.A(A[1]), .B(B[1]), .BorrowIN(tempB[0]), .Difference(Y[1]), .BorrowOut(tempB[1])); +fullsubtraction f2 (.A(A[2]), .B(B[2]), .BorrowIN(tempB[1]), .Difference(Y[2]), .BorrowOut(tempB[2])); +fullsubtraction f3 (.A(A[3]), .B(B[3]), .BorrowIN(tempB[2]), .Difference(Y[3]), .BorrowOut(BorrowOUT)); + +endmodule diff --git a/spartanTest/subtractionTB.v b/spartanTest/subtractionTB.v new file mode 100644 index 0000000..efc7db9 --- /dev/null +++ b/spartanTest/subtractionTB.v @@ -0,0 +1,41 @@ +module subtractionTB; + +reg [3:0] A, B; +reg BorrowIN; +wire [3:0] Y; +wire BorrowOUT; + +// Instantiate the subtraction module +subtraction uut ( + .A(A), + .B(B), + .BorrowIN(BorrowIN), + .Y(Y), + .BorrowOUT(BorrowOUT) +); + +initial begin + $dumpfile("subtraction.vcd"); + $dumpvars; + // Initialize inputs + A = 4'b0000; // Set A to 0 + B = 4'b0000; // Set B to 0 + BorrowIN = 0; // No borrow input + + // Apply test cases + #10 A = 4'b0110; B = 4'b0010; BorrowIN = 0; // A = 6, B = 2 + #10 A = 4'b0010; B = 4'b0110; BorrowIN = 0; // A = 2, B = 6 + #10 A = 4'b1100; B = 4'b0100; BorrowIN = 0; // A = -4, B = 4 + #10 A = 4'b1000; B = 4'b1000; BorrowIN = 0; // A = -8, B = -8 + #10 A = 4'b1111; B = 4'b0001; BorrowIN = 1; // A = -1, B = 1, with borrow input + + // Wait for the results + #10 $finish; +end + +//initial begin + // Monitor the values of Y and overflow + // $monitor("At time %t: A = %b, B = %b, Y = %b, BorrowOut = %b, overflow = %b", $time, A, B, Y, BorrowOut, overflow); +//end + +endmodule diff --git a/spartanTest/switchRotary.v b/spartanTest/switchRotary.v new file mode 100644 index 0000000..6ef120a --- /dev/null +++ b/spartanTest/switchRotary.v @@ -0,0 +1,61 @@ +module switchRotary( + input clk, // Clock signal + input [3:0] switches, // Slide switches SW3 to SW0 + input rot_a, rot_b, // Rotary encoder signals + input rot_center, // Rotary encoder push button + output reg [3:0] A = 0, // Value of A + output reg [3:0] B = 0, // Value of B + output reg [2:0] opCode = 0 // Value of opCode +); + // Internal signals for rotary encoder + reg [1:0] rot_state = 2'b00; + reg [1:0] rot_prev = 2'b00; + + // Selected register for modification + reg [1:0] selected = 2'b00; // 0 = A, 1 = B, 2 = opCode + + // Debouncing for rotary center button + reg [15:0] debounce_counter = 0; + reg debounce_pressed = 0; + + // Update selected register on rotary center press + always @(posedge clk) begin + if (rot_center && !debounce_pressed) begin + debounce_pressed <= 1; + selected <= selected + 1; + end + if (!rot_center) begin + debounce_pressed <= 0; + end + end + + // Handle rotary encoder signals + always @(posedge clk) begin + rot_prev <= rot_state; + rot_state <= {rot_a, rot_b}; + + // Detect clockwise or counterclockwise rotation + if (rot_prev == 2'b01 && rot_state == 2'b11) begin + case (selected) + 2'b00: if (A < 15) A <= A + 1; + 2'b01: if (B < 15) B <= B + 1; + 2'b10: if (opCode < 7) opCode <= opCode + 1; + endcase + end else if (rot_prev == 2'b11 && rot_state == 2'b01) begin + case (selected) + 2'b00: if (A > 0) A <= A - 1; + 2'b01: if (B > 0) B <= B - 1; + 2'b10: if (opCode > 0) opCode <= opCode - 1; + endcase + end + end + + // Update A, B, or opCode based on switches + always @(posedge clk) begin + case (switches) + 4'b0001: A <= switches[3:0]; + 4'b0010: B <= switches[3:0]; + 4'b1000: opCode <= switches[2:0]; + endcase + end +endmodule diff --git a/spartanTest/top.v b/spartanTest/top.v new file mode 100644 index 0000000..5373c68 --- /dev/null +++ b/spartanTest/top.v @@ -0,0 +1,62 @@ +module top ( + input clk, // Clock signal + input [3:0] switches, // Slide switches SW3 to SW0 + input rot_a, rot_b, // Rotary encoder signals + input rot_center, // Rotary encoder push button + output lcd_rs, // LCD Register Select + output lcd_rw, // LCD Read/Write + output lcd_e, // LCD Enable + output [7:4] lcd_d // LCD Data +); + // Internal signals + wire [3:0] A; + wire [3:0] B; + wire [2:0] opCode; + wire [7:0] Y; + wire [4:0] mem_addr; + wire [7:0] mem_bus; + + // ALU Instance + ALU alu_inst ( + .A(A), + .B(B), + .CarryIN(1'b0), // No carry-in for this implementation + .opCodeA(opCode), + .Y(Y), + .CarryOUT(), // Unused output + .overflow() // Unused output + ); + + // Switch and Rotary Controller + switch_and_rotary switch_rotary_inst ( + .clk(clk), + .switches(switches), + .rot_a(rot_a), + .rot_b(rot_b), + .rot_center(rot_center), + .A(A), + .B(B), + .opCode(opCode) + ); + + // Character Memory + char_mem char_mem_inst ( + .addr(mem_addr), + .bus(mem_bus), + .A(A), + .B(B), + .opCode(opCode), + .Y(Y) + ); + + // LCD Controller + lcd lcd_inst ( + .clk(clk), + .lcd_rs(lcd_rs), + .lcd_rw(lcd_rw), + .lcd_e(lcd_e), + .lcd_d(lcd_d), + .mem_addr(mem_addr), + .mem_bus(mem_bus) + ); +endmodule