diff --git a/iverilog/tobb/lab7/bib3A b/iverilog/tobb/lab7/bib3A index 38a0ec0..75ce1f0 100644 --- a/iverilog/tobb/lab7/bib3A +++ b/iverilog/tobb/lab7/bib3A @@ -7,40 +7,42 @@ :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/vhdl_textio.vpi"; :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/v2005_math.vpi"; :vpi_module "/usr/lib/x86_64-linux-gnu/ivl/va_math.vpi"; -S_0x5574a61fa040 .scope module, "bib3AdvancedTB" "bib3AdvancedTB" 2 1; +S_0x55a2c2765ba0 .scope module, "bib3AdvancedTB" "bib3AdvancedTB" 2 1; .timescale 0 0; -v0x5574a62143c0_0 .var "basla", 0 0; -v0x5574a6214480_0 .net "bitti", 0 0, v0x5574a6213cf0_0; 1 drivers -v0x5574a6214550_0 .var "buyruk", 8 0; -v0x5574a6214650_0 .var "clk", 0 0; -v0x5574a6214720_0 .var/i "i", 31 0; -v0x5574a62147c0 .array "memory", 0 15, 8 0; -v0x5574a6214860_0 .net "sonuc", 3 0, v0x5574a6214240_0; 1 drivers -S_0x5574a61fa1d0 .scope module, "uut" "bib3Advanced" 2 10, 3 1 0, S_0x5574a61fa040; +v0x55a2c2780cc0_0 .var "basla", 0 0; +v0x55a2c2780d80_0 .net "bitti", 0 0, v0x55a2c27805f0_0; 1 drivers +v0x55a2c2780e50_0 .var "buyruk", 8 0; +v0x55a2c2780f50_0 .var "clk", 0 0; +v0x55a2c2781020_0 .var/i "i", 31 0; +v0x55a2c27810c0 .array "memory", 15 0, 8 0; +v0x55a2c2781160_0 .net "sonuc", 3 0, v0x55a2c2780b40_0; 1 drivers +S_0x55a2c2765d30 .scope module, "uut" "bib3Advanced" 2 10, 3 1 0, S_0x55a2c2765ba0; .timescale 0 0; .port_info 0 /INPUT 1 "clk"; .port_info 1 /INPUT 1 "basla"; .port_info 2 /INPUT 9 "buyruk"; .port_info 3 /OUTPUT 4 "sonuc"; .port_info 4 /OUTPUT 1 "bitti"; -v0x5574a61bac00_0 .var/i "a", 31 0; -v0x5574a6213b70_0 .var/i "b", 31 0; -v0x5574a6213c50_0 .net "basla", 0 0, v0x5574a62143c0_0; 1 drivers -v0x5574a6213cf0_0 .var "bitti", 0 0; -v0x5574a6213db0_0 .net "buyruk", 8 0, v0x5574a6214550_0; 1 drivers -v0x5574a6213ee0_0 .var/i "c", 31 0; -v0x5574a6213fc0_0 .net "clk", 0 0, v0x5574a6214650_0; 1 drivers -v0x5574a6214080_0 .var/i "count", 31 0; -v0x5574a6214160_0 .var/i "i", 31 0; -v0x5574a6214240_0 .var "sonuc", 3 0; -E_0x5574a61f2a20 .event posedge, v0x5574a6213fc0_0; - .scope S_0x5574a61fa1d0; +v0x55a2c2723c00_0 .var/i "a", 31 0; +v0x55a2c2780470_0 .var/i "b", 31 0; +v0x55a2c2780550_0 .net "basla", 0 0, v0x55a2c2780cc0_0; 1 drivers +v0x55a2c27805f0_0 .var "bitti", 0 0; +v0x55a2c27806b0_0 .net "buyruk", 8 0, v0x55a2c2780e50_0; 1 drivers +v0x55a2c27807e0_0 .var/i "c", 31 0; +v0x55a2c27808c0_0 .net "clk", 0 0, v0x55a2c2780f50_0; 1 drivers +v0x55a2c2780980_0 .var/i "count", 31 0; +v0x55a2c2780a60_0 .var/i "i", 31 0; +v0x55a2c2780b40_0 .var "sonuc", 3 0; +E_0x55a2c275ba20 .event posedge, v0x55a2c27808c0_0; + .scope S_0x55a2c2765d30; T_0 ; - %wait E_0x5574a61f2a20; - %load/vec4 v0x5574a6213c50_0; + %wait E_0x55a2c275ba20; + %load/vec4 v0x55a2c2780550_0; %flag_set/vec4 8; %jmp/0xz T_0.0, 8; - %load/vec4 v0x5574a6213db0_0; + %pushi/vec4 0, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 6, 4; %dup/vec4; %pushi/vec4 0, 0, 3; @@ -75,240 +77,258 @@ T_0 ; %cmp/u; %jmp/1 T_0.10, 6; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; %jmp T_0.11; T_0.3 ; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 3, 3; %pad/u 4; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 0, 2; %pad/u 4; %add; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.4 ; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 3, 3; %pad/u 4; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 0, 2; %pad/u 4; %sub; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.5 ; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 3, 3; %pad/u 4; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 0, 2; %pad/u 4; %and; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.6 ; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 3, 3; %pad/u 4; - %load/vec4 v0x5574a6213db0_0; + %load/vec4 v0x55a2c27806b0_0; %parti/s 3, 0, 2; %pad/u 4; %or; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.7 ; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6214160_0, 0, 32; + %store/vec4 v0x55a2c2780a60_0, 0, 32; T_0.12 ; - %load/vec4 v0x5574a6214160_0; + %load/vec4 v0x55a2c2780a60_0; %cmpi/s 4, 0, 32; %flag_or 5, 4; %jmp/0xz T_0.13, 5; - %load/vec4 v0x5574a6213db0_0; - %load/vec4 v0x5574a6214160_0; + %load/vec4 v0x55a2c27806b0_0; + %load/vec4 v0x55a2c2780a60_0; %part/s 1; - %load/vec4 v0x5574a6213db0_0; - %load/vec4 v0x5574a6214160_0; + %load/vec4 v0x55a2c27806b0_0; + %load/vec4 v0x55a2c2780a60_0; %addi 1, 0, 32; %part/s 1; %cmp/e; %jmp/0xz T_0.14, 4; %pushi/vec4 15, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; %jmp T_0.15; T_0.14 ; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; T_0.15 ; ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a6214160_0; + %load/vec4 v0x55a2c2780a60_0; %pushi/vec4 1, 0, 32; %add; - %store/vec4 v0x5574a6214160_0, 0, 32; + %store/vec4 v0x55a2c2780a60_0, 0, 32; %jmp T_0.12; T_0.13 ; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.8 ; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a61bac00_0, 0, 32; + %store/vec4 v0x55a2c2723c00_0, 0, 32; T_0.16 ; - %load/vec4 v0x5574a61bac00_0; + %load/vec4 v0x55a2c2723c00_0; %cmpi/s 5, 0, 32; %flag_or 5, 4; %jmp/0xz T_0.17, 5; - %load/vec4 v0x5574a6213db0_0; - %load/vec4 v0x5574a61bac00_0; + %load/vec4 v0x55a2c27806b0_0; + %load/vec4 v0x55a2c2723c00_0; %part/s 1; %pad/u 32; %cmpi/e 1, 0, 32; %jmp/0xz T_0.18, 4; %pushi/vec4 15, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; %jmp T_0.19; T_0.18 ; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; T_0.19 ; ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a61bac00_0; + %load/vec4 v0x55a2c2723c00_0; %pushi/vec4 1, 0, 32; %add; - %store/vec4 v0x5574a61bac00_0, 0, 32; + %store/vec4 v0x55a2c2723c00_0, 0, 32; %jmp T_0.16; T_0.17 ; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.9 ; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6214080_0, 0, 32; + %store/vec4 v0x55a2c2780980_0, 0, 32; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6213b70_0, 0, 32; + %store/vec4 v0x55a2c2780470_0, 0, 32; T_0.20 ; - %load/vec4 v0x5574a6213b70_0; + %load/vec4 v0x55a2c2780470_0; %cmpi/s 5, 0, 32; %flag_or 5, 4; %jmp/0xz T_0.21, 5; - %load/vec4 v0x5574a6213db0_0; - %load/vec4 v0x5574a6213b70_0; + %load/vec4 v0x55a2c27806b0_0; + %load/vec4 v0x55a2c2780470_0; %part/s 1; %pad/u 32; %cmpi/e 1, 0, 32; %jmp/0xz T_0.22, 4; - %load/vec4 v0x5574a6214080_0; + %load/vec4 v0x55a2c2780980_0; %addi 1, 0, 32; - %store/vec4 v0x5574a6214080_0, 0, 32; + %store/vec4 v0x55a2c2780980_0, 0, 32; T_0.22 ; ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a6213b70_0; + %load/vec4 v0x55a2c2780470_0; %pushi/vec4 1, 0, 32; %add; - %store/vec4 v0x5574a6213b70_0, 0, 32; + %store/vec4 v0x55a2c2780470_0, 0, 32; %jmp T_0.20; T_0.21 ; - %load/vec4 v0x5574a6214080_0; + %load/vec4 v0x55a2c2780980_0; %pushi/vec4 2, 0, 32; %mod/s; %cmpi/e 0, 0, 32; %jmp/0xz T_0.24, 4; %pushi/vec4 15, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; %jmp T_0.25; T_0.24 ; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; T_0.25 ; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.10 ; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6214080_0, 0, 32; + %store/vec4 v0x55a2c2780980_0, 0, 32; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6213ee0_0, 0, 32; + %store/vec4 v0x55a2c27807e0_0, 0, 32; T_0.26 ; - %load/vec4 v0x5574a6213ee0_0; + %load/vec4 v0x55a2c27807e0_0; %cmpi/s 5, 0, 32; %flag_or 5, 4; %jmp/0xz T_0.27, 5; - %load/vec4 v0x5574a6213db0_0; - %load/vec4 v0x5574a6213ee0_0; + %load/vec4 v0x55a2c27806b0_0; + %load/vec4 v0x55a2c27807e0_0; %part/s 1; %pad/u 32; %cmpi/e 1, 0, 32; %jmp/0xz T_0.28, 4; - ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a6214080_0; - %pushi/vec4 1, 0, 32; - %add; - %store/vec4 v0x5574a6214080_0, 0, 32; + %load/vec4 v0x55a2c2780980_0; + %addi 1, 0, 32; + %store/vec4 v0x55a2c2780980_0, 0, 32; T_0.28 ; ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a6213ee0_0; + %load/vec4 v0x55a2c27807e0_0; %pushi/vec4 1, 0, 32; %add; - %store/vec4 v0x5574a6213ee0_0, 0, 32; + %store/vec4 v0x55a2c27807e0_0, 0, 32; %jmp T_0.26; T_0.27 ; - %load/vec4 v0x5574a6214080_0; + %load/vec4 v0x55a2c2780980_0; %pushi/vec4 2, 0, 32; %mod/s; %cmpi/e 0, 0, 32; %jmp/0xz T_0.30, 4; %pushi/vec4 0, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; %jmp T_0.31; T_0.30 ; %pushi/vec4 15, 0, 4; - %assign/vec4 v0x5574a6214240_0, 0; + %assign/vec4 v0x55a2c2780b40_0, 0; T_0.31 ; + %pushi/vec4 1, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; %jmp T_0.11; T_0.11 ; %pop/vec4 1; - %pushi/vec4 1, 0, 1; - %assign/vec4 v0x5574a6213cf0_0, 0; + %jmp T_0.1; T_0.0 ; + %pushi/vec4 0, 0, 1; + %assign/vec4 v0x55a2c27805f0_0, 0; + %pushi/vec4 0, 0, 4; + %assign/vec4 v0x55a2c2780b40_0, 0; +T_0.1 ; %jmp T_0; .thread T_0; - .scope S_0x5574a61fa040; + .scope S_0x55a2c2765ba0; T_1 ; - %load/vec4 v0x5574a6214650_0; + %load/vec4 v0x55a2c2780f50_0; %inv; - %store/vec4 v0x5574a6214650_0, 0, 1; + %store/vec4 v0x55a2c2780f50_0, 0, 1; %delay 5, 0; %jmp T_1; .thread T_1; - .scope S_0x5574a61fa040; + .scope S_0x55a2c2765ba0; T_2 ; %vpi_call 2 25 "$dumpfile", "bib3Advanced.vcd" {0 0 0}; %vpi_call 2 26 "$dumpvars" {0 0 0}; %pushi/vec4 0, 0, 1; - %store/vec4 v0x5574a6214650_0, 0, 1; + %store/vec4 v0x55a2c2780f50_0, 0, 1; %pushi/vec4 0, 0, 1; - %store/vec4 v0x5574a62143c0_0, 0, 1; + %store/vec4 v0x55a2c2780cc0_0, 0, 1; %pushi/vec4 0, 0, 9; - %store/vec4 v0x5574a6214550_0, 0, 9; - %vpi_call 2 28 "$readmemb", "memory.mem", v0x5574a62147c0 {0 0 0}; + %store/vec4 v0x55a2c2780e50_0, 0, 9; + %vpi_call 2 28 "$readmemb", "memory.mem", v0x55a2c27810c0 {0 0 0}; %delay 10, 0; %pushi/vec4 1, 0, 1; - %store/vec4 v0x5574a62143c0_0, 0, 1; + %store/vec4 v0x55a2c2780cc0_0, 0, 1; %pushi/vec4 0, 0, 32; - %store/vec4 v0x5574a6214720_0, 0, 32; + %store/vec4 v0x55a2c2781020_0, 0, 32; T_2.0 ; - %load/vec4 v0x5574a6214720_0; + %load/vec4 v0x55a2c2781020_0; %cmpi/s 16, 0, 32; %flag_or 5, 4; %jmp/0xz T_2.1, 5; - %ix/getv/s 4, v0x5574a6214720_0; - %load/vec4a v0x5574a62147c0, 4; - %store/vec4 v0x5574a6214550_0, 0, 9; + %ix/getv/s 4, v0x55a2c2781020_0; + %load/vec4a v0x55a2c27810c0, 4; + %store/vec4 v0x55a2c2780e50_0, 0, 9; %delay 10, 0; ; show_stmt_assign_vector: Get l-value for compressed += operand - %load/vec4 v0x5574a6214720_0; + %load/vec4 v0x55a2c2781020_0; %pushi/vec4 1, 0, 32; %add; - %store/vec4 v0x5574a6214720_0, 0, 32; + %store/vec4 v0x55a2c2781020_0, 0, 32; %jmp T_2.0; T_2.1 ; %pushi/vec4 0, 0, 1; - %store/vec4 v0x5574a62143c0_0, 0, 1; + %store/vec4 v0x55a2c2780cc0_0, 0, 1; %delay 10, 0; %vpi_call 2 36 "$finish" {0 0 0}; %end; diff --git a/iverilog/tobb/lab7/bib3Advanced.v b/iverilog/tobb/lab7/bib3Advanced.v index da0b5d0..91917b2 100644 --- a/iverilog/tobb/lab7/bib3Advanced.v +++ b/iverilog/tobb/lab7/bib3Advanced.v @@ -1,4 +1,4 @@ -module bib3Advanced ( +module bib3Advanced ( input clk, input basla, input [8:0] buyruk, @@ -8,48 +8,73 @@ module bib3Advanced ( integer i, a, b, c, count; always@(posedge clk) begin if(basla) begin - case (buyruk[8:6]) - default: sonuc <= 4'b0000; - 3'b000: sonuc <= buyruk[5:3] + buyruk[2:0]; - 3'b001: sonuc <= buyruk[5:3] - buyruk[2:0]; - 3'b010: sonuc <= buyruk[5:3] & buyruk[2:0]; - 3'b011: sonuc <= buyruk[5:3] | buyruk[2:0]; - 3'b100: begin - for (i = 0; i <= 4; i++) - if (buyruk[i] == buyruk[i+1]) - sonuc <= 4'b1111; - else + bitti <= 1'b0; + case (buyruk[8:6]) + default: begin sonuc <= 4'b0000; - end - 3'b101: for (a = 0; a <= 5; a++) begin - if (buyruk[a] == 1) - sonuc <= 4'b1111; - else + end + 3'b000: begin + sonuc <= buyruk[5:3] + buyruk[2:0]; + bitti <= 1'b1; + end + 3'b001: begin + sonuc <= buyruk[5:3] - buyruk[2:0]; + bitti <= 1'b1; + end + 3'b010: begin + sonuc <= buyruk[5:3] & buyruk[2:0]; + bitti <= 1'b1; + end + 3'b011: begin + sonuc <= buyruk[5:3] | buyruk[2:0]; + bitti <= 1'b1; + end + 3'b100: begin + for (i = 0; i <= 4; i++) begin + if (buyruk[i] == buyruk[i+1]) + sonuc <= 4'b1111; + else sonuc <= 4'b0000; + end + bitti <= 1'b1; + end + 3'b101: begin + for (a = 0; a <= 5; a++) begin + if (buyruk[a] == 1) + sonuc <= 4'b1111; + else + sonuc <= 4'b0000; + end + bitti <= 1'b1; + end + 3'b110: begin + count = 0; + for (b = 0; b <= 5; b++) begin + if (buyruk[b] == 1) + count = count + 1; + end + if (count % 2 == 0) + sonuc <= 4'b1111; + else + sonuc <= 4'b0000; + bitti <= 1'b1; + end + 3'b111: begin + count = 0; + for (c = 0; c <= 5; c++) + if (buyruk[c] == 1) + count = count + 1; + if (count % 2 == 0) + sonuc <= 4'b0000; + else + sonuc <= 4'b1111; + bitti <= 1'b1; + end + endcase end - 3'b110: begin - count = 0; - for (b = 0; b <= 5; b++) begin - if (buyruk[b] == 1) - count = count + 1; - end - if (count % 2 == 0) - sonuc <= 4'b1111; - else - sonuc <= 4'b0000; + else begin + bitti <= 1'b0; + sonuc <= 4'b0000; end - 3'b111: begin - count = 0; - for (c = 0; c <= 5; c++) - if (buyruk[c] == 1) - count++; - if (count % 2 == 0) - sonuc <= 4'b0000; - else - sonuc <= 4'b1111; - end - endcase - bitti <= 1'b1; - end end endmodule diff --git a/iverilog/tobb/lab7/bib3Advanced.vcd b/iverilog/tobb/lab7/bib3Advanced.vcd index 93564cd..df5d190 100644 --- a/iverilog/tobb/lab7/bib3Advanced.vcd +++ b/iverilog/tobb/lab7/bib3Advanced.vcd @@ -1,5 +1,5 @@ $date - Thu Jan 30 07:20:34 2025 + Thu Jan 30 07:38:04 2025 $end $version Icarus Verilog @@ -45,6 +45,9 @@ x" bx ! $end #5 +b0 ! +b0 ( +0" 1% #10 0% @@ -65,6 +68,7 @@ b1 & #25 b11 ! b11 ( +1" 1% #30 0% @@ -74,6 +78,7 @@ b10 & #35 b100 ! b100 ( +1" 1% #40 0% @@ -83,6 +88,7 @@ b11 & #45 b111 ! b111 ( +1" 1% #50 0% @@ -92,6 +98,7 @@ b100 & #55 b1111 ! b1111 ( +1" b101 - 1% #60 @@ -102,6 +109,7 @@ b101 & #65 b0 ! b0 ( +1" b101 - 1% #70 @@ -112,6 +120,7 @@ b110 & #75 b1111 ! b1111 ( +1" b110 ) 1% #80 @@ -120,6 +129,7 @@ b110100001 $ b110100001 ' b111 & #85 +1" b110 * b10 , 1% @@ -131,6 +141,7 @@ b1000 & #95 b0 ! b0 ( +1" b110 + b10 , 1% @@ -142,6 +153,7 @@ b1001 & #105 b10 ! b10 ( +1" 1% #110 0% @@ -151,6 +163,7 @@ b1010 & #115 b11 ! b11 ( +1" 1% #120 0% @@ -160,6 +173,7 @@ b1011 & #125 b100 ! b100 ( +1" 1% #130 0% @@ -169,6 +183,7 @@ b1100 & #135 b111 ! b111 ( +1" 1% #140 0% @@ -178,6 +193,7 @@ b1101 & #145 b1111 ! b1111 ( +1" b101 - 1% #150 @@ -188,6 +204,7 @@ b1110 & #155 b0 ! b0 ( +1" b101 - 1% #160 @@ -198,6 +215,7 @@ b1111 & #165 b1111 ! b1111 ( +1" b110 ) 1% #170 @@ -208,6 +226,7 @@ b10000 & #175 b0 ! b0 ( +0" 1% #180 0% diff --git a/iverilog/tobb/lab7/bib3AdvancedTB.v b/iverilog/tobb/lab7/bib3AdvancedTB.v index ae6c8f4..0904f25 100644 --- a/iverilog/tobb/lab7/bib3AdvancedTB.v +++ b/iverilog/tobb/lab7/bib3AdvancedTB.v @@ -3,7 +3,7 @@ module bib3AdvancedTB(); reg clk; reg basla; reg [8:0] buyruk; - reg [8:0] memory [15:0]; + reg [8:0] memory [0:15]; wire [3:0] sonuc; wire bitti; diff --git a/iverilog/tobb/lab7/bib3_gelismis.v b/iverilog/tobb/lab7/bib3_gelismis.v new file mode 100644 index 0000000..e69de29 diff --git a/iverilog/tobb/lab7/paramBib3Advanced.v b/iverilog/tobb/lab7/paramBib3Advanced.v new file mode 100644 index 0000000..2f2e87c --- /dev/null +++ b/iverilog/tobb/lab7/paramBib3Advanced.v @@ -0,0 +1,12 @@ +module paramBib3Advanced #(parameter N = 3) ( + input clk, + input basla, + input [(N*2)+2:0] buyruk, + output reg [N:0] sonuc, + output reg bitti +); + +genvar i; +generate + for (i = 0; i < N) +endgenerate \ No newline at end of file