From 1bbcfd0963a82d12d58d04d824c6ae99e02fc524 Mon Sep 17 00:00:00 2001 From: k0rrluna Date: Mon, 2 Dec 2024 02:29:38 +0300 Subject: [PATCH] formatter test --- iverilog/nand2tetris/nands/andGate.v | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/iverilog/nand2tetris/nands/andGate.v b/iverilog/nand2tetris/nands/andGate.v index 7ae875c..69a32ba 100644 --- a/iverilog/nand2tetris/nands/andGate.v +++ b/iverilog/nand2tetris/nands/andGate.v @@ -1,16 +1,12 @@ - module andGate ( - input wire A_i, - input wire B_i, - output wire Y_o + input wire A_i, + input wire B_i, + output wire Y_o ); - wire nand_out; - nand nand1 (nand_out, A_i, B_i); - nand nand2 (Y_o, nand_out, nand_out); endmodule