kaltinsoy/verilog
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rearrangement

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This commit is contained in:
k0rrluna
2024-12-01 02:01:08 +03:00
parent 7466f916d3
commit 0237c7bcb2
277 changed files with 56884 additions and 56884 deletions
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18
gowin/seq_light_test/impl/temp/rtl_parser.result
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@ -1,10 +1,10 @@
[
{
"InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/seq_light_test/src/seqBlink.v",
"InstLine" : 1,
"InstName" : "seqBlink",
"ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/seq_light_test/src/seqBlink.v",
"ModuleLine" : 1,
"ModuleName" : "seqBlink"
}
[
{
"InstFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/seq_light_test/src/seqBlink.v",
"InstLine" : 1,
"InstName" : "seqBlink",
"ModuleFile" : "//wsl.localhost/Debian/home/koray/code/verilog/gowin/seq_light_test/src/seqBlink.v",
"ModuleLine" : 1,
"ModuleName" : "seqBlink"
}
]