57 lines
1.3 KiB
Verilog
57 lines
1.3 KiB
Verilog
/*
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* A dummy IVERILOG module to get some configured variables from
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* verilog sources and output them to FIRMWARE/config.mk.
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* (see TOOLS/make_config.sh)
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*/
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`include "femtosoc_config.v"
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module dummy();
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initial begin
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$display("ARCH=",`NRV_ARCH);
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$display("OPTIMIZE=",`NRV_OPTIMIZE);
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$display("ABI=",`NRV_ABI);
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$display("RAM_SIZE=%d",`NRV_RAM);
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// Note1: for now we only need FGA here for conditional
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// compilation of OLED->FGA emulation (that pulls too
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// much code on the IceStick). The rest of the code uses
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// hardware config registers to query config and adapt
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// dynamically.
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// Note2: need to be "-DXXX=1" rather than "-DXXX" because
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// the makefile also passes that to the assembler after
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// some text substitution, and the assembler needs "=1"
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$write("DEVICES=");
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`ifdef NRV_IO_FGA
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$write(" -DFGA=1");
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`endif
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`ifdef NRV_IO_SSD1351
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$write(" -DSSD1351=1");
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`endif
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`ifdef NRV_IO_SSD1331
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$write(" -DSSD1331=1");
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`endif
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`ifdef NRV_IO_SDCARD
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$write(" -DSDCARD=1");
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`endif
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`ifdef NRV_IO_MAPPED_SPI_FLASH
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$write(" -DSPIFLASH=1");
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`endif
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`ifdef ICE_STICK
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$write(" -DICE_STICK=1");
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`endif
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`ifdef ICE_BREAKER
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$write(" -DICE_BREAKER=1");
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`endif
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`ifdef ICE_SUGAR_NANO
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$write(" -DICE_SUGAR_NANO=1");
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`endif
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$write("\n");
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end
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endmodule
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