newStep.v
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46
RTL/CONFIGS/icebreaker_config.v
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46
RTL/CONFIGS/icebreaker_config.v
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// Default femtosoc configuration file for IceStick
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`define NRV_NEGATIVE_RESET
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/************************* Devices **********************************************************************************/
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`define NRV_IO_LEDS // Mapped IO, LEDs D1,D2,D3,D4 (D5 is used to display errors)
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`define NRV_IO_UART // Mapped IO, virtual UART (USB)
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`define NRV_IO_SSD1351 // Mapped IO, 128x128x64K OLed screen
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`define NRV_IO_MAX7219 // Mapped IO, 8x8 led matrix
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`define NRV_MAPPED_SPI_FLASH // SPI flash mapped in address space. Can be used with MINIRV32 to run code from SPI flash.
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/************************* Processor configuration ******************************************************************/
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//`define NRV_FEMTORV32_QUARK_BICYCLE // RV32I
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`define NRV_FEMTORV32_ELECTRON // RV32IM
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//`define NRV_FEMTORV32_INTERMISSUM // RV32IM + IRQ
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//`define NRV_FEMTORV32_GRACILIS // RV32IMC + IRQ
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//`define NRV_FEMTORV32_PETITBATEAU // RV32IMFC + IRQ, does not fit on IceBreaker
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`define NRV_FREQ 20 // Frequency in MHz. Recomm: 15 MHz Overclocking: 20-25 MHz
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`define NRV_RESET_ADDR 32'h00820000 // Jump execution to SPI Flash (800000h, +128k(20000h) for FPGA bitstream)
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// tinyraytracer: 30 MHz RV32IM electron 3:12
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// 20 MHz RV32IM gracilis 3:44
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// 20 MHz RV32IMC gracilis 3:32
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// 25 MHz RV32IMC gracilis 2:49
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/************************* RAM (in bytes, needs to be a multiple of 4)***********************************************/
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// Using the 128 kbytes of single-ported RAM of the ice40-up5k
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// Note: cannot initialize it from .hex file, need to run from SPI Flash
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`define ICE40UP5K_SPRAM
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`define NRV_RAM 131072
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// (other option, the 12 kbytes of BRAM, this one can be initialized from .hex file).
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//`define NRV_RAM 12288
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/************************* Advanced devices configuration *********************************************************/
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`define NRV_RUN_FROM_SPI_FLASH // Do not 'readmemh()' firmware from '.hex' file
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`define NRV_IO_HARDWARE_CONFIG // Comment-out to disable hardware config registers mapped in IO-Space
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// (only if you use your own firmware, libfemtorv32 depends on it)
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/******************************************************************************************************************/
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`define NRV_CONFIGURED
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