kaltinsoy/4-bit-ALU
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k0rrluna
2025-01-23 06:58:05 +03:00
parent 8579de5ebc
commit 8f854d046b
193 changed files with 42478 additions and 2 deletions
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gowin/ALU/impl/gwsynthesis/ALU_syn_rsc.xml Normal file
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@ -0,0 +1,4 @@
<?xml version="1.0" encoding="UTF-8"?>
<Module name="top" Lut="13" T_Lut="141(13)">
<SubModule name="s1" Lut="128" T_Lut="128(128)"/>
</Module>